image sensors with 3d heterogeneous integration

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Oct 21st 2009 1 UMPC meeting STMicroelectronics Image Sensors with 3D Heterogeneous Integration GIP-CNFM November, 26th 2009 Jean-Luc Jaffard : Deputy General Manager ST Imaging Division Yvon Cazaux : Imaging Expert at LETI

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Image Sensors with 3D Heterogeneous Integration. Jean-Luc Jaffard : Deputy General Manager ST Imaging Division Yvon Cazaux : Imaging Expert at LETI. GIP-CNFM November, 26th 2009. Main Applications-Visible Domain. Mobile Phone By far the dominant market Webcam Digital camera - PowerPoint PPT Presentation

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Oct 21st 2009 1UMPC meeting STMicroelectronics

Image Sensors with

3D Heterogeneous Integration

GIP-CNFM November, 26th 2009

Jean-Luc Jaffard : Deputy General Manager ST Imaging Division

Yvon Cazaux : Imaging Expert at LETI

Oct 21st 2009 2UMPC meeting STMicroelectronics

Main Applications-Visible Domain

Mobile PhoneBy far the dominant market

WebcamDigital cameraBiomedical (endoscopes)Automotive : emerging market

Oct 21st 2009 3UMPC meeting STMicroelectronics

Mobile Imaging Driving Factors

CostProcess complexity

200mm 300mm

90nm ; 65nm

FSI vs BSI …..

Physical Size

Resolution

Pixel size

Module height

Optics

Performances

Low Light

SNR ratio

Crosstalk

Speed

ST 'Grade123 165Lux' SNR10(Y): measured and Simulation

0

5

10

15

20

25

30

0 100 200 300 400 500 600 700 800 900 1000

Scene I llumination

Lum

inanace

SN

R p

ost

CM

851Gr3 851 Simulation (Measured Grade123 QE)

3D INTEGRATION

ARENA

Oct 21st 2009 4UMPC meeting STMicroelectronics

VGA Module Size Evolution

00.10.20.30.40.50.60.70.80.9

1

Cu

bic

Cen

tim

ete

r

8µm pixel

Fixed focus

Two element lens

1.xµm pixel

Wafer level optics

3D Integration

Oct 21st 2009 5UMPC meeting STMicroelectronics

Yellow duck-White light or White duck-Yellow light

Oct 21st 2009 6UMPC meeting STMicroelectronics

Mechanical DesignMechanical DesignOptical DesignOptical Design

Silicon DesignSilicon DesignAlgorithmsAlgorithms

START

STOP

Y N

Y

Y

Y YNN

N

N

Y=X²+Z+16

Y

R&D Challenges : Mastering key technologies

Oct 21st 2009 7UMPC meeting STMicroelectronics

● Cost reduction● Always more pixels (5MPix,8MPix,

12MPix…) Smaller and smaller pixel size

● Race for miniaturization Electrical and Optical

Integration● Many challenges for CMOS

technologies Lack of sensibility Temporal & Fix Pattern Noises Dark Current Dynamic Range

Dedicated Imaging Process

Very Fast Market Evolution Pixel Size vs Years

year

Pix

el

siz

e (m

) 3T Pixel

1.75T Pixel

4T Pixel

2.5T Pixel

PN Photodiode Photodiode with charge transfer

4T Pixels with MOS sharing

Oct 21st 2009 8UMPC meeting STMicroelectronics

Mains Challenges for Performances

Bayer pattern

SOURCE IEDM2006_ ST Microelectronics

●Sensitivity as high as possible Large Photodiode (MOS sharing) lens to focus photons on the photodiode Very small dielectric stack, Light Guide, Back side illumination…

● Noise Reduction Dark Current optimization Fix and Random Readout Noises reduced with Double Correlated Sampling (CDS)

High Signal to Noise Ratio (SNR)

● Dynamic Range Very Small Pixel Capacitance (~1fF) A Few thousands of electrons at Saturation level

● Crosstalk Optical : Light Diffraction, reflexion on metal lines Electrical : Carriers Diffusion in the epitaxial layer

Colour Crosstalk

Oct 21st 2009 9UMPC meeting STMicroelectronics

● The Way for very Small Pixels to collect all Photons

● QE improvement ● Less sensitive to the optical aperture

(metal lines shading in front side)

● Pros High Sensitivity (~100% Fill Factor) Suitable to Large Optical Apertures

● Cons Process Complexity Crosstalk more critical Cost

Source STMicro.

Back Side Illumination

Oct 21st 2009 10UMPC meeting STMicroelectronics

0.51.52.53.54.55.56.57.58.59.5

µm

CMOS Process

Imager options

Imager Process

CMOS Capable

Imager process evolution

Oct 21st 2009 11UMPC meeting STMicroelectronics

Product spec – standards, interfaces

Partitioning of a CMOS sensor-based imaging system

ADC

Tx RxColour

ProcessorData

Format

Compression(MPEG4)

SystemInterfac

e

FrameStore

Sensor Module Video Processor System Interface

Possible levelsof integrationusing CMOStechnology

Cable or Flex Connector

Raw Bayer YUV

Oct 21st 2009 12UMPC meeting STMicroelectronics

Through Silicon Via Concept

● Wire bonding based package

Al Pad

Wire Bond

Package Lead Image Sensor

Through Silicon Interconnect

Bump

Image Sensor

● TSV based package

Oct 21st 2009 13UMPC meeting STMicroelectronics

Through Silicon Via Pros and Cons

Through via contacts From top to bottom

● Pros Allow smaller package outline No pad extension needed Wire bonding compatible layout Better density

● Cons More complex technology

• Glass • Silicon • Back-end processes

Cost

Oct 21st 2009 14UMPC meeting STMicroelectronics

Through Silicon Via Product Through Silicon Via Product

Oct 21st 2009 15UMPC meeting STMicroelectronics

Wirebond and TSV modules Physical dimensions comparison

0%

20%

40%

60%

80%

100%

120%

140%

160%

5 10 20 30 40 50 60 70 80 90 100 110

VGA

5MP

Image Sensor Surface (mm²)

WB

vs T

SV

mod

ule

siz

e

Swb4 = (Xs+Wb+Lm)²

Swb2 = (Xs+Wb+Lm) x (Xs+Lm)

Stsv= Xs²

Xs=sqrt (Sensor surface)3MP

Wb

Lm

Oct 21st 2009 16UMPC meeting STMicroelectronics

● Principle Lens stacks manufactured at the Wafer

level Dicing of a total Module

● Main benefits compared to conventional modules: Lower Cost Compact size (die size footprint) Low building height Very accurate alignment

● Current and Future Developments Fixed focus Auto focus image stabilization devices Zoom

Optical Integration at the Wafer Level

Source:

http://www.polight.no

Autofocus with piezo actuator

Conventional module

Oct 21st 2009 17UMPC meeting STMicroelectronics

● Principle CMOS wafers stacking Electrical connexion between wafers

TSV Molecular Bonding

● Benefits Compact camera Processing close to the pixel array Processor integrated in the BSI handler New Architecture capability (smart sensors)

● Cons Complex Assy Process Cost Yield

Si-725µm

Cu-1µmCu-1µm

Si-10 µm

BondingInterface

SiO2-500nm

200 mm

TiN-10nm

SiO2-500nm

Si-725µm

Cu-1µmCu-1µm

Si-10 µm

BondingInterface

SiO2-500nm

200 mm

TiN-10nm

SiO2-500nm

Cu-Cu molecular bonding3D CMOS Integration at the Wafer Level

Photodetection

A to D Converter

Processor

3D with TSV (MIT-USA)

Oct 21st 2009 18UMPC meeting STMicroelectronics

Camera Module Future Integration3D Heterogeneous

TSV image sensor Image processingImage memory

Lenses

Benefits Physical sizeHigh precision environment

Assembly rulesClean environment

Simplified test flow

Technical challengesManufacturing yieldMechanical and thermal effectsOptical performancesDicingCost

Oct 21st 2009 19UMPC meeting STMicroelectronics

Oct 21st 2009 20UMPC meeting STMicroelectronics

Conclusions

● Addressing Imaging Market means mastering multiple technologies ● µelectronics● µoptics ● µmechanics● Image processing

● Physical size reduction introduces more dependancies between elements and technologies

● 3D integration is even more demanding for multiple technology mastering

Oct 21st 2009 21UMPC meeting STMicroelectronics

Thank you for your attention