ieee transactions on power electronics, vol. 32, no. 1 ... · index terms—battery...

IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 32, NO. 1, JANUARY 2017 233

An Online Transformerless Uninterruptible PowerSupply (UPS) System With a Smaller Battery Bank

for Low-Power ApplicationsMuhammad Aamir and Saad Mekhilef, Senior Member, IEEE

Abstract—Uninterruptible power supplies (UPS) are widely usedto provide reliable and high-quality power to critical loads in allgrid conditions. This paper proposes a nonisolated online UPSsystem. The proposed system consists of bridgeless PFC boost rec-tifier, battery charger/discharger, and an inverter. A new batterycharger/discharger has been implemented which ensures the bidi-rectional flow of power between dc link and battery bank, re-ducing the battery bank voltage to only 24V, and regulates thedc-link voltage during the battery power mode. Operating batter-ies in parallel improves the battery performance and resolve theproblems related to conventional battery banks that arrange bat-teries in series. A new control method, integrating slide mode andproportional-resonant control, for the inverter has been proposedwhich regulates the output voltage for both linear and nonlin-ear loads. The controller exhibits excellent performance duringtransients and step changes in load. The operating principle andexperimental results of 1-kVA prototype have been presented forvalidation of the proposed system.

Index Terms—Battery charger/discharger, power factor correc-tion, transformerless uninterruptible power supply (UPS).

I. INTRODUCTION

UNINTERRUPTIBLE power supplies (UPS) provideclean, conditioned, and reliable power to critical loads

such as communication systems, network servers, medicalequipment’s, etc., in all grid conditions [1], [2]. Typically, theUPS provides unity power factor, high efficiency, high reliabil-ity, low cost, and low transients response time from grid modeto battery mode and vice versa [3], [4].

UPS systems can be categorized as online, offline, and line in-teractive UPS systems [5]. Online UPS systems are most popularand common configuration among them, as it provides isolationto load from the grid and has negligible switching time. A con-ventional online UPS system consists of a rectifier for PFC, abattery bank, and an inverter connected to the load [6].

Grid frequency transformers are normally employed to reducethe battery bank voltage and provide isolation from the transients

Manuscript received October 14, 2015; revised January 13, 2016; acceptedFebruary 18, 2016. Date of publication March 8, 2016; date of current versionSeptember 16, 2016. This work was supported by the High Impact Researchof University of Malaya—Ministry of Higher Education of Malaysia underProject UM.C/HIR/MOHE/ENG/24, FRGS-FP014–2014A, and by the BrightSpark Unit. Recommended for publication by Associate Editor D. Xu.

The authors are with the Power Electronics and Renewable Energy ResearchLaboratory, Department of Electrical Engineering, University of Malaya, KualaLumpur 50603, Malaysia (e-mail: [email protected]; [email protected]).

Color versions of one or more of the figures in this paper are available onlineat http://ieeexplore.ieee.org.

Digital Object Identifier 10.1109/TPEL.2016.2537834

and spikes generated inside the grid. Since the transformer isoperating at line frequency, thus increasing the size and weightof the system substantially. An online UPS system with high-frequency transformer isolation has been used to overcome theproblem related to the grid frequency transformer UPS system[7]. Although the size has been reduced, the efficiency of thesystem decreases due to high number of active switches in thesetopologies.

In order to overcome the problems related to aforementionedtopologies, the transformerless UPS system has been intro-duced. Transformerless UPS systems have comparatively highefficiency, small weight and volume of the system. The onlydisadvantage in the transformerless UPS system is their sus-ceptibility toward the interference caused by the devices con-nected to the same grid. This makes the transformerless UPSmore suitable for environments where the connected grid is lesspolluted [8].

Several transformerless topologies has been proposed in [9]–[12], focusing on efficiency improvement, volume and weightreduction, decreasing the number of switches, and capital costof the system. But the size of the battery bank in all the proposedsystems so far is enormously high. Generally, the batteries areconnected in series to achieve the high battery bank voltage. Butseries battery arrangement has major drawbacks and limitationsin charging and discharging. Small imbalance in voltages occursacross the battery cells during charging and discharging sincebattery cells are not equal. Hence, these cannot provide the sameperformance during operation. Overcharging will cause severeoverheating, low performance, and even destruction [13]. Sim-ilarly, deep discharge may cause the battery cell to be damagedpermanently [14]. Due to this reason, a small battery bank withbatteries operating in parallel improves the performance of thebattery bank significantly. The batteries operating in parallelhave following advantages:

1) the number of batteries is not restricted to the dc-link volt-age. The volume, weight, and backup time of the batterybank should be designed according to specific application;

2) cost reduction as no extra voltage balancing circuit isrequired;

3) damaged batteries can be isolated or replaced from thebattery bank, thus, leaving the sensitive system opera-tion uninterrupted. This is the prime function of the UPSsystem;

4) since discharging currents of the batteries can be profiledindividually. Hence, the stored energy in the batteries canbe utilized more efficiently.

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234 IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 32, NO. 1, JANUARY 2017

Fig. 1. Circuit diagram of the proposed UPS system.

A UPS topology is proposed in [15] which employs onlythree-leg converter for both rectification and dc–ac conversion.But the battery bank of 360 V is connected to the dc link, whichis enormously high and all the current drawn by the batteriesis pulsating. This pulsating current affects the reliability of thebattery bank. In [16], a transformerless UPS has been proposedwith bidirectional battery charger and discharger connected tothe battery bank. But still the battery bank is very high and isnot suitable for low-power applications. Nonisolated topologyof the UPS system has been proposed in [17]. It reduces thebattery bank to nine batteries but it employs an autotransformerto achieve high dc-link voltage that increases the size and weightof the system.

In this paper, a novel transformerless online UPS has beenproposed as shown in Fig. 1. The proposed UPS employsa high-gain bidirectional converter which operates betweenthe dc-link voltage and the battery bank. Using bidirectionalcharger/discharger, the battery bank is reduced to only 24 V(single battery), thus, it eliminates the drawbacks related to largestring of series-connected batteries. The bridgeless boost recti-fier provides the regulated dc-link voltage to feed the inverterand maintains the power factor correction. A new controllercombining slide mode and proportional-resonant (PR) controlhas been implemented for the inverter control which showsgood performance with low total harmonics distortion (THD)and high stability for both nonlinear and impulsive loads. Thesize and cost of the proposed system is comparatively very lowas no bulky transformer has been used, with small battery bankand high efficiency. Hence, the proposed UPS system is excel-lent choice for low-power application with low cost and weightof the system.

Experimental results based on 1-kVA laboratory prototypehave been presented to validate the performance of the system.The proposed UPS system shows excellent steady state and dy-namic performance. The advantages of the proposed system areas follows: 1) new battery charger and discharger has been intro-duced which reduce the size of the battery bank significantly, 2)high input power factor, 3) new robust inverter control schemefor nonlinear and impulse load, and 4) high efficiency and lowcost of the system.

II. PROPOSED SYSTEM DESCRIPTION

The schematic of the proposed single-phase online UPS sys-tem is shown in Fig. 1. The proposed system consists of a

Fig. 2. Modes of operation of the proposed UPS system.

bridgeless PFC boost rectifier, a bidirectional converter, and anH-bridge inverter. The boost rectifier provides the power fac-tor correction and regulated dc-link voltage. The efficiency ofthe bridgeless rectifier is also high as compared to conventionalrectifiers because it eliminates some devices from the powerflow path and reduces the conduction losses considerably. In-troducing a bidirectional converter for battery charging and dis-charging with high-voltage gain reduces the size of the batterybank significantly. The H-bridge inverter with new robust con-trol scheme is proposed for regulating the nonlinear load andprovides fast transient response during change of modes.

A. Modes of Operation

The operation of the UPS can be divided into two modes ofoperation. Grid mode and battery mode as shown in the Fig. 2.

Grid Mode: When the grid voltage is stable and there isno power failure, the UPS system operates in the grid mode.The rectifier provides the regulated dc-link voltage to feed theinverter while the bidirectional converter keeps charging thebattery bank.

Battery Mode: In case of power failure or voltage sag atinput, the magnetic contactor (MC) is opened and the rectifier isdisabled. Then, the power is supplied to the load by the batterywhich uses the battery discharger and the inverter. The value ofthe dc-link capacitor is kept high in order to provide sufficientenergy to the inverter during the transition between the batterymode and the grid mode of operation.

A bypass switch has been added in the system to increase thereliability of the system. In case of internal fault in the system

AAMIR AND MEKHILEF: ONLINE TRANSFORMERLESS UNINTERRUPTIBLE POWER SUPPLY (UPS) SYSTEM WITH A SMALLER BATTERY 235

Fig. 3. Characteristic waveforms of the buck mode of operation.

or overloading and overheating of the circuit, the bypass switchturns ON and provides a direct path for the power from theutility grid to the connected load [2].

B. Bidirectional Converter

A new nonisolated bidirectional dc–dc converter with acoupled inductor has been proposed which works as batterycharger/discharger and operates between the battery bank andthe dc link. The converter has following advantages:

1) high-voltage gain in both the buck and boost mode;2) less number of passive components in the circuit;3) only three active switches are used to perform bidirec-

tional operation;4) zero voltage switching (ZVS), synchronous rectification,

and voltage clamping circuit are used that reduce theswitching and conduction losses.

A coupled inductor has been used with LP as primary induc-tance and LS as the secondary inductance. The capacitor Cb2inserted in the main power across the primary and secondarywindings of the transformer gives high-voltage conversion ra-tio and reduces the peak current stress allowing the continuouscurrent in the primary. Also, the voltage stress of the capacitorCb2 is minimum at this position in the circuit.

1) Battery Charging/Buck Operation: The characteristicwaveforms of the converter during the battery charging modeare shown in Fig. 3. D1 is the duty cycle of S3 and Sax , while D3is the duty cycle of switch S4 . Both D1 and D3 are related to eachother by a relationship D1(= 1 − D3). Lm is the magnetizinginductance of the coupled inductor with turns ratio N = N2/N1 ,where N1 is the number of turns in primary winding and N2 isthe number of turns for secondary winding. The operation ofthe circuit during the battery charging mode in each interval isshown in Fig. 4.

Interval 1 (t0 ∼ t1): The Switch S4 remains ON while theswitches S3 and Sax are OFF during interval 1. The current iLSflows from dc link to the battery bank through the capacitor Cb2and both the windings of the coupled inductor. Applying KVL,we get

Vd = VLS + VCb2 + VLP + VBat (1)

Vd = VLP (1 + N) + VCb2 + VBat . (2)

The diode Db3 is also conducting with the continuous inductorcurrent iLb into the battery bank. Hence, VBat is the voltageacross the inductor Lb .

Interval 2 (t1 ∼ t2): At the start, the switch S4 turns OFF.Due to the storage energy in the leakage inductor, the polar-ities are reversed across the primary and secondary windings(LS andLP ) of the coupled inductor. Switch S4 is OFF in thismode, but the secondary current iLS is still conducting, so theswitch Sax body diode is forward bias in order to keep the cur-rent iLS flowing. The diode Db3 remains forward biased in thismode. The body diode of switch S3 gets forward biased as thesecondary current iLS decreases, however, the primary currentiLP remains the same.

Interval 3 (t2 ∼ t3): Both the Switches S3 and Sax turnsON following the ZVS condition. The capacitor Cb2 starts dis-charging across the battery bank through the switch Sax and theinductor Lb . Thus, the secondary current is induced in reverseby the discharging capacitor Cb2 . The clamp capacitor Cb1 alsodischarges through the diode Db2 by adding small current i3into the secondary current flowing into the battery bank.

Using the voltage second balance, VCb2 will be

VCb2 = VLb + VBat + VLS . (3)

The stored energy in the coupled inductor is released by theprimary current through the switch S3 into the battery bank.

Using the voltage–second balance, the VLb is given by

D1VLb = D3VBat . (4)

The primary winding voltage VLP can be obtained as

D3VLP = D1VBat . (5)

Putting (4) and the values of VLb and VLP into (2), the voltagegain during the buck mode of operation is given by

Gbuck = VBat/Vd = [D3 (1 − D3)] /[2N (1 − D3)

2 + 1].

(6)Interval 4 (t3 ∼ t4): Both the switches S3 and Sax turn OFF

at the start of this mode. The primary and secondary windingcurrents iLPandiLS will continue conduction due to the leakageinductance of the coupled inductor. The secondary current willcharge the parasitic capacitance of the switches S3andSax , anddischarge the parasitic capacitance of the switch S4 . When thevoltage across the switch Sax equals to Vd , the body diode ofthe switch S4 get forward biased. The primary current iLP startsdecreasing unless it gets equal to the secondary current iLS , thenthis mode finishes.

Interval 5 (t4 ∼ t5): The switch S4 turns ON under ZVScondition. The capacitor Cb1 is charged through the clampeddiode Db1 . The primary and secondary current starts increasing.


Fig. 4. Topological stages in the buck mode. (a) Mode 1. (b) Mode 2. (c) Mode 3. (d) Mode 4. (e) Mode 5.

Fig. 5. Characteristic waveforms of the boost mode.

At the end of this mode, the circuit starts repeating interval 1 ofthe next cycle.

2) Battery Discharging/Boost Operation: The characteris-tic waveform of the bidirectional converter during the batterydischarge mode is shown in Fig. 5. The bidirectional convertersteps up the low battery bank voltage to the high dc-link voltage.The switch Sax remains OFF during battery discharging. Thebattery discharger operation during each interval is shown inFig. 6.

Interval 1 (t0 ∼ t1): During interval 1, the switch S3 was ON,while the switch S4 was OFF. The low battery bank voltage isapplied at the low-voltage side of the circuit. The capacitor Cb2remains charged before interval 1 and the magnetizing currentiLm of the coupled inductor increases linearly as shown in Fig. 5.Applying KVL, we get

VBat = VLp = VLS/N. (7)

The voltage across the primary winding may be derived usingvoltage second balance

VLPD3 = VBatD1 . (8)

Interval 2 (t1 ∼ t2): The switch S3 turns OFF in interval 2. Theprimary current iLP charges the parasitic capacitance across theswitch S3 and the secondary current iLS discharges the parasiticcapacitance across switch S4 . When the voltage across switchS3 becomes equal to the capacitor voltage VCb1 , this intervalfinishes.

Interval 3 (t2 ∼ t3): Since the switch S3 is OFF, the leakageinductance causes the primary current iLP to decrease while thesecondary current iLS increases. As a result, the body diode ofswitch S4 gets forward biased. The capacitor Cb1 starts chargingthrough diode Db1 because the voltage across the switch S3 getshigher than the capacitor Cb1 . This limits the voltage stressacross the switch S3 . The voltage across the C1 is given by

VC 1 = Vbat + VLP . (9)

Using (7)

VC 1 = VBat/D3 . (10)

Interval 4 (t3 ∼ t4): The switch S4 turns ON under the condi-tion of ZVS. The primary and secondary windings of the coupledinductor and the capacitor Cb2 are all now connected in seriesto transfer the energy to the dc link. iLS starts increasing untilit reaches iLP , then, it follows iLP till the end of the interval 4.Thus, the energy stored in the primary and secondary windingsdischarges across the dc link. Both the diodes Db1 and Db2 re-main reverse biased during this interval as shown in Fig. 6(d).Using voltage second balance, we get

Vd = VBat + VLS + VC 2 + VLp (11)

Vd = VBat + VC 2 + (N + 1)VLP . (12)

Interval 5 (t4 ∼ t5): During this interval, the switch S4 turnsOFF. The current iLS charges the parasitic capacitance of the


Fig. 6. Topological stages in the boost mode. (a) Mode 1. (b) Mode 2. (c) Mode 3. (d) Mode 4. (e) Mode 5. (f) Mode 6.

Fig. 7. Voltage conversion ratio w.r.t. duty cycle D1 and D3 .

switch S4 . The capacitor Cb1 starts discharging across the ca-pacitor Cb2 through the diode Db2

VCb2 = VCb1 = VBat/D3 . (13)

By putting (8) and (13) into (12), the voltage gain of thecircuit is

Vd = VBat + VBat/D3 + (N + 1)D1/D3VBat (14)

Gboost = Vd/VBat = (2 + ND1)/(1 − D1). (15)

The body diode of the switch S3 starts forward biased becauseof the polarities of the capacitor Cb2 and inductor LP .

TABLE ICOMPARISON OF PROPOSED BIDIRECTIONAL CONVERTER

Features [18] [19] [20] [21] Proposed Topology

Switches 4 5 4 4 3Auxiliary Capacitors 2 3 2 2 2Coupled-Inductor 1 1 1 0 1Auxiliary Inductor 1 0 0 1 1MB O O S T

N1−D

1 + N( 1−D ) + N 2 + N

D2

1−D2 + N D

1−D

MB U C KDN

D1 + N + D N

DN + 2

D2

D ( 1−D )2 N ( 1−D ) 2 + 1

Efficiency 97% 96% 95% 94% 96%Size Large Large Medium Medium SmallEstimated Cost(US $) ∼130 ∼172 ∼118 ∼136 ∼116

Interval 6 (t5 ∼ t6): During interval 6, the switch S3 turns ONunder the condition of ZVS. Since S3 is not deriving any currentfrom the clamped circuit, thus, the switching losses remain lowdue to ZVS and the efficiency of the circuit increases. Whenboth VCb1 and VCb2 get equal, then, the next switching cyclestarts and repeats the operation in interval 1.

The turn ratio N is selected as such to satisfy Gboost andGbuck gains for required dc link and battery bank voltage. Fig. 7shows the voltage gain of buck and boost modes with respect toduty cycle D3 and D1 , respectively, at different turn ratio. Turnratio N = 4 satisfies the operation of the bidirectional converterbetween the required dc link and battery bank.

Table I shows the comparison of different bidirectional con-verters recently published. The voltage conversion ratio of theproposed converter shows more diversity as compared to [20]and [21], with less number of switches. In [18], the authors haveshown high gain ratio, but with five switches, that increases thesize and cost of the circuit. The size of the proposed circuit isconsiderably small with small heat sink for the given power rat-ing, and only few passive auxiliary components are used. Sincethe battery voltage is very low and high current flows from thebattery bank into the converter. Thus, it increases conduction


Fig. 8. Rectifier operation during the positive half cycle. a) Switches S1 and S2 are ON. b) Switches S1 and S2 are OFF.

Fig. 9. Control circuit of the proposed UPS system.

losses. However, the switching losses are not significant as allthe switches of the bidirectional dc–dc converter are followingZVS condition. The high current can increase the size and costof the system, hence limits the operation of proposed topologyfor very high-power applications where the input current can bevery high.

C. Rectifier

The rectifier performing the unity power factor consists of thebridgeless PFC boost rectifier. The bridgeless PFC boost rectifierdoes not use the full-wave bridge rectifier, reducing one semi-conductor device in the main current path. Thus, the conductionlosses are reduced, which increases the efficiency of the rectifier.The bridgeless PFC has the advantage of reducing the conduc-tion loss by 30% [22]. This topology is suitable for applicationswhere high power density and high efficiency are required. Thebridgeless rectifier consists of two boost converters, each op-erating in the half cycle of the ac supply. By adding two slowdiodes Da ∼ Db , the common mode noise (EMI Losses) can besuppressed considerably and high efficiency can be achieved ascompared to the conventional rectifier. Both the switches S1 and

S2 of the rectifier are driven by the same gate signal, thus makesthe control of the circuit quite easy. The inductors L11 and L12of the boost rectifier can be wound in the same core in order toincrease the utilization of the magnetic material [23].

The operation of the rectifier during only positive half cyclehas been shown in Fig. 8. The switch S1 turns ON, as the inputvoltage Vin (ac) turns positive. The current flows from the inputthrough the inductor L11 and L12 , storing the energy in both theinductors. The change in the input current iin is same as thechange in the inductor current, given by

Δiin =1

L11 + L12VinDTs. (16)

When the switch S1 turns OFF, the energy is released by theinductors. The current flows through the diode D1 into the dclink Vd , returning through the body diode of the switch S2 intothe input supply. The input current in D1 and S2 is same as theinductor current given by

Δiin =1

L11 + L12(Vin − Vd)(1 − D)Ts. (17)


Depending on the duty cycle D of both the switches S1 andS2 , the input current variation for one complete switching cycleTS is given by

(L11 + L12)ΔiinTS

= VinDTs + (Vin − Vd) (1 − D) Ts. (18)

The EMI noise is generated due to high-frequency switch-ing that is leaked through the parasitic capacitance from theconverter to the ground. Therefore, the EMI noise suppressiondiodes Da and Db are used, as they provide the conducting pathbetween the output bus and the input line during both the posi-tive and negative cycles, thus, the voltage potential of the outputbus is stabilized [24].

III. CONTROL STRATEGY

The control scheme for the inverter keeps operating in boththe grid and battery mode. For the rectifier, the control schemeoperates only in the grid mode, while the battery charger anddischarger also switch during the change of modes. The controlschemes for controlling different parts of the UPS in differentmodes of operation are shown in Fig. 9.

A. Inverter Control

A conventional full-bridge voltage source inverter has beenused to perform dc to ac conversion. Different high performancecontrol schemes have been presented for the inverter. Amongthese control schemes, deadbeat control [25] is the most popularcontrol technique because of its fast dynamic response, as thetracking error settles to zero in finite sampling steps. However,the deadbeat control is very sensitive to model uncertainties,parameters mismatch, and noise in the high sampling frequency.The repetitive controller (RC) [26] also provides good regulationfor the nonlinear loads with periodic distortions and excellentharmonics rejection. However, the dynamic response of the RCis relatively very slow, that is why another fast response controlscheme is usually integrated with the RC to increase the responsetime of the controller. Moreover, poor tracking accuracy andlarge memory requirement are additional limitations in the RCcontroller. Model predictive control [27] predicts the behaviorof the output voltage for each switching state at every samplinginterval. A cost function is derived to predict the next switchingstate. Though this control imposes very small computationalburden, it requires very high sampling rate and does not provideany analysis of stability and robustness.

For the nonlinear load, the slide mode control (SMC) strat-egy has gained special interest because of its effective perfor-mance and high-frequency switching control in power invertersagainst nonlinear system with uncertainties. A major featureof the SMC is its robustness, good dynamic response, stabilityagainst nonlinear loading conditions, and easy implementation.SMC provides good regulation in a wide range of operatingconditions. The integral SMC method has been proposed forefficient ac tracking of the system in [28]. Though this sys-tem has reduced the harmonics contents in the output voltagebut offers limited ability for high-order harmonics. SMC withthe continuous time control method has been implemented in

Fig. 10. Block diagram of inverter control.

[29]. The hysteresis-type switching function has been intro-duced for each leg of the inverter which increases the hardwarecomplexity. In rotating SMC [30], the time-varying slope basedon the SMC method was proposed which rotates the slidingsurface in order to get the faster response for the nonlinearconditions. This different value for the slope has been appliedduring the transient and steady-state operation, causing the sur-face to rotate according to load variation. Multiresonant SMChas been implemented for the grid-connected inverters [31]. Itrelatively reduces the tracking error and THD of the grid cur-rent. But this controller is preferred for the grid-connected in-verter with low THD, and also, the system parameters determinethe reference signal which may degrade the robustness of thecontroller.

In order to control the output voltage of the inverter, a cas-caded control algorithm of SMC and PR control has beenanalyzed for the proposed UPS topology. It is a new controlscheme for the single-phase bipolar voltage source inverter ofthe UPS system. The inner current loop is controlled by theSMC while the outer voltage loop is controlled by the PR con-trol. The chattering phenomenon in the SMC is eliminated byusing the smoothed control law in the narrow boundary layer.The smoothed control law applied to the pulse width modulatorresults in a fixed switching frequency operation of the inverter.Thus, the proposed controller adopted the characteristics of bothSMC and PR control. The controller shows good response withlow THD and high stability for nonlinear loads. The main ad-vantages of the proposed controller are as follows:

1) very low THD for both linear and nonlinear load;2) very robust in operation;3) fast transient response;4) easy implementation.

The circuit diagram of the single-phase inverter with the LCfilter and proposed controller for the nonlinear load is shown inFig. 10, where Vd is the applied dc-link voltage, Vout is the filtercapacitor, and Cf is the output voltage. iLf is the inductor, Lf

is the current, and iO is the output current through the load R,given by iO = Vout/R. The state equations of the inverter are


given as

d

dt

[VoutiLf

]=

[0 1/Cf

−1/Lf 0

] [VoutiLf

]+

[0

Vd/Lf

]u

+[−io/Cf

0

](19)

where u = Control input = {−1, 0,+1}.In order to implement the sliding mode control, the voltage

error x1 , and its derivative x2 = x1 need to be find

x1 = Vout − Vref

x2 = x1 = Vout − Vref = iCf/Cf − Vref ,

where Vref = Vm Sin(ωt)[

x1x2

]=

[0 1

−1/Lf Cf −1/RCf

] [x1x2

]+

[0

Vd/Lf Cf

]u

+[

0−Vref/Lf Cf

]. (20)

Consider the slide surface equation

S = λx1 + x2 . (21)

In order to ensure the stability of the sliding function, theLyapunov function V (t) = S2/2 has to be satisfied with theminimum condition V (t) < η |s|, keeping the scalar s at zerowhile η is strictly positive constant. Hence, the condition forstability will be V (t) < 0

V (t) = SS (22)

V (t) = S [λx1 + x2 ] (23)

V = S

[λx2 −

1Lf Cf

x1 +VDC

Lf Cfu − V ref

Lf Cf− x2

RCf

]. (24)

In order to satisfy the sliding condition (22), despite of theuncertainty on the dynamics of the nonlinear function, u is re-placed by the “–sign(s)” function

u (t) = −sign (s) =

{+1, if S (x) > 0

−1, if S(x) < 0(25)

V = S

[λx2 − 1

Lf Cf

x1 − VDC

Lf Cf

sign(s) − V refLf Cf

− x2

RCf

](26)

V = |S|[sign (x)

[λx2 − 1

Lf Cf

x1 − V refLf Cf

− x2

RCf

]]

− VDC

Lf Cf

(27)

sign (x)[λx2 − 1

Lf Cf

x1 − V refLf Cf

− x2

RCf

]<

VDC

Lf Cf

. (28)

Hence, it is clear that the stability condition is fulfilled when(28) is satisfied. Now to apply the sliding control law to theinverter, put the value of x1 and x2

S = λ (Vout − Vref ) +iCf

Cf− V ref (29)

S = λ (Vout − Vref ) +1

Cf(iCf

− iref ). (30)

Fig. 11. Inverter control. (a) Smooth control law for boundary surface. (b)Control interpolation in boundary layer.

Since the sliding mode controller has the common inherentproperty of chattering phenomena, it causes low control ac-curacy and high losses in the circuit. In order to overcome thechattering phenomena, a smoothed SMC has been implemented.This can be achieved by smoothing out the control discontinuityin a thin boundary layer neighboring the sliding surface

B (t) = {x, |S (x; t)| ≤ ø} ø > 0, (31)

where ø is the boundary layer thickness and ε = φλ

is the bound-ary layer width. Hence, B (t) is chosen as such that all the tra-jectories starting at B (t = 0) remain inside B (t) for all t > 0as shown in Fig. 11(a). Hence, we interpolate S inside B (t) forinstance, and replace S by an expression S/ø. Thus, (30) will be

S(x)ø

=λ

ø[Vout − Vref ] +

1Cf ø

[iCf

− iref]. (32)

The smoothing control discontinuity assigns a low-pass filterstructure to the local dynamics thus eliminates chattering. Thesmoothed control law applied to the pulse width modulatorresults in the fixed switching frequency of the inverter. Thecontrol law needs to be tuned very precisely in order to achievea tradeoff between the tracking precision and robustness to theuncontrolled dynamics as shown in Fig. 11(b).

Conventionally, the PR controller provides a large gain atthe fundamental frequency and strictly follows the sinusoidalreference, reducing the steady-state error and improving thestability of the system. The transfer function of the ideal PRcontroller is given by

GPR = KP +2KRs

s2 + ω2o

(33)

where KP is the proportional gain, ω0 is the resonant frequency,and KR is the resonant gain.


The ideal PR controller gives the infinite gain at the reso-nant frequency but no gain and phase shift at other frequencies.Hence, more appropriate is nonideal PR control, given as

GPR = KP +2KRωcs

s2 + 2ωcs + ω2o

. (34)

Hence, selecting a suitable cutoff frequency ωc can widen thebandwidth, reducing the sensitivity toward the frequency varia-tions. By combining the PR controller with the SMC, the perfor-mance of the inverter is improved, as the resonance controllerprovides better regulation of the output voltage and reduces thetotal harmonic distortion considerable.

Hence, the final equation for the control of the inverter can bederived by combining the PR control and SMC for the currentloop

S (x)ø

=1

Cf ø[iCf

− iref]+

λ

ø

[Kp (Vout − Vref )

+ki

(2s

s2 + 2ωcs + ω2o

)(Vout − Vref )

]. (35)

Thus, (35) shows the dynamic behavior of the system withboth SMC and PR compensator. The error in the voltage loop iscompensated by the appropriate PR parameters, thus, the outputvoltage is compelled to follow the reference ac voltage leading tothe system stability while the SMC drives the system to the zerosliding surface with maximum stability. Since the capacitor errorcurrent contains the ripples from the inductor, the current peakmay reach high values. So, ø should be carefully assigned valuein order to compensate the slope from the high-current rippleof the capacitor. Hence, the PR controller eliminates the steady-state error at resonant frequency or harmonic at that frequency.

The response time of the system λ determines the dynamicsand robustness of the system. It is clear from (35), that smallervalue of λ leads to slow response time, while higher λ valuesthough increase the response time but take larger time to reachthe sliding surface. Thus, the optimal value for λ is equal to theswitching frequency of the inverter.

According to [32], the slope of the carrier wave is given as4Vm × fs, where Vm is the magnitude and fs is the frequency ofthe carrier wave. The slope of the error signal to the modulatoris given by VDC/4LCø. According to the limitation of the pulsewidth modulator

slope of error signal < slope of the carrier signal

4Vm × fs < Vd/4Lf Cf ø. (36)

Thus, the minimum value of ø can be calculated by

ø ∼= 10Vd

16Lf Cf Vm fS. (37)

In order to design the controller for the inverter as shown inFig. 10, the value of ø can be derived using (37) consideringthe circuit parameters from Table VIII. Kp and KR are theproportional gain and resonant gain selected for stable responseof the PR controller. The value of α is the division factor tobring the output voltage compatible to reference and is selectedconsidering the electronic circuit limitations. λ is the dynamicresponse of the inverter and it is equal to the switching frequency

TABLE IICONTROL PARAMETERS OF THE INVERTER

Sr. No PARAMETERS Value

1 KP 2.52 KR 303 λ 20 0004 Φ 1268305 Vm 8V6 α 0.022277 V r e f 220 V

TABLE IIICOMPARISON OF DIFFERENT CONTROL SCHEMES

ModelPredictive [27]

SPWMControl [33]

RotatingSMC [30]

Fix-FreqSMC [34]

ProposedWork

VD C 529 405 300 360 180VR M S 150 220 200 220 110Cf (μF) 40 202 100 9.4 6.6Lf (mH) 2.4 0.03 0.250 0.357 0.84THD (L) 2.85% 1.11% - 1.1% 0.45%THD (NL) 3.8% 3.8% 2.66% 1.7% 1.25%Ts (ms) 50 60 - 0.5 0.3

of the modulator. The magnitude of the carrier Vm is selected torealize the inequality (36). Final control parameters have beenderived for the stable operation of the inverter and are presentedin Table II.

Table III shows the comparison of the proposed controlscheme with the SMC and other common controllers. The pro-posed controller shows an improvement in terms of reducing theTHD and transient response with robust control of the inverter.

B. Rectifier Control

The rectifier of the UPS system is controlled by well-knownaverage current mode control as shown in Fig. 9. In this con-trol scheme, the faster inner current loop regulates the inductorcurrent so that its average value during each period follows therectified input voltage. The slower outer voltage loop maintainsthe rectified output voltage close to the reference voltage andgenerates the control signal vc for the current loop. The steady-state analysis of the rectifier shows stable performance duringthe grid mode. The state-space equations of the rectifier arederived as

diLdt

=Vin

L11 + L12D +

(Vin − Vd)L11 + L12

(1 − D) (38)

dvd

dt= − Vd

RCdD +

(iLCd

− Vd

RCd

)(1 − D). (39)

Assuming that the current loop has high bandwidth as com-pared to voltage loop, and the output capacitor Cd is largeenough to give approximately constant output voltage, i.e.,dvd/dt = 0. With Vin = 0, the small signal control d to inputcurrent iL transfer function GiL d(s) of the inner current loop is


TABLE IVBATTERY SPECIFICATIONS

Parameters Value

Rated Capacity 35 AhNominal Voltage 24 VMin. Voltage 16 VMax. Charging Current limit 9.9 AMax. Discharge Current 105 AInitial SoC 70%Internal Resistance 8 mΩ

Fig. 12. Bode response of the rectifier. (a) Current loop gain. (b) Voltage loopgain.

give as

GiL d(s) =iL

d=

Vd

s(L11 + L12). (40)

The stability of the current loop depends on the currentloop gain, hence, suitable proportional-integral (PI) controller,Gi(s) = kpi + ki i

s , is used for compensating the current loop.The Bode plot of the current loop gain Ti = GiL d (s) .Gi(s) isobtained considering the circuit parameters shown in Table IV.The value of proportional gain Kpi and integral gain Kii is se-lected as 2.3 and 1200, respectively, for the stable operation ofthe current loop. Fig. 12(a) presents the bode plot of the currentloop gain with phase margin of 89° and stable operation of therectifier. Same approach is used to compensate the voltage loopof the average current control scheme. vc is the reference currentfor the current loop. Assuming the constant input voltage, thesmall signal control vc to output transfer function GVd Vc

(s) of

TABLE VSPECIFICATIONS OF THE PROPOSED UPS SYSTEM

Parameters SYMBOL Value

Input voltage V in 220 VOutput voltage Vo u t 220 VGrid frequency fr 50 HzOutput frequency fo 50 HzNumber of batteries Vb 2 Parallel connected (24 V/35 Ah)Maximum output power Po , m a x 1 kVADC-link voltage Vd 360 V

TABLE VIDESIGN PARAMETERS OF THE RECTIFIER


Input Inductor L1 1 , L1 2 800 μH, Coupled ToroidDiodes D1 , D2 BYC10–600Switches S1 , S2 SPP11N60C3Slow Diodes Da , Db GBJ1508Switching frequency fs 30 000 Hz

TABLE VIISPECIFICATION OF THE BATTERY CHARGER/DISCHARGER


DC-link voltage Vd 360 VBattery bank voltage Vb 24 VSwitching frequency f s 30 000 HzCoupled inductor LP , LS Turns ratio N = 4; Lm = 107 μH;

PQ-5050 core;Inductor Lb 300 μHCapacitor Cb 1 , Cb 2 , Cd Cb 1 , Cb 2 = 2 × 2.2 μF (ceramic),

Cd = 1900 μFSwitches S3 , S4 , Sa x IPW60R045CP MOSFETDiodes Db 1 , Db 2 , Db 3 Ultrafast Recovery diode UF5408

the voltage loop is derived as

GVd Vc(s) =

vd

vc=

VinR

2Vd(sCR + 2). (41)

In order to force the output voltage to follow the referencevoltage VRef , a PI compensator has been employed. Combiningthe power stage with the PI controller Gv (s) = kpv + ki v

s pro-vides the overall loop gain Tv = Gv .GVd Vc

(s) of the voltageloop. The value of Kpv and Kiv in voltage loop is selected as1.2 and 13, respectively. The stability of the voltage loop canbe analyzed using the Bode plot obtained by considering theparameters from Table VI, as shown in Fig. 12(b). The systemshows good stability with positive phase margin.

C. Battery Charger and Discharger Control

The controller for the battery charger/discharger during bothgrid mode and battery mode has been shown in Fig. 9. Duringbattery charging, the controller operates as constant current (CC)mode or constant voltage (CV) mode depending on the batteryvoltage, while in battery discharging, the controller regulatesthe dc-link voltage as well as the primary inductor current. It is


Fig. 13. Bode response of the battery charger/discharger. (a) Current loopgain. (b) Voltage loop gain.

Fig. 14. Thevenin battery model.

assumed that the primary inductor current iLP flows continu-ously. The steady-state analysis of the battery charger/dischargeris performed using the average state variable method [35]. Thestate-space equations for the charger with the coupled inductorare

diPdt

=VBat

dtD +

(VBat − Vd)(1 − D)Lm (N + 1)

(42)

dVo

dt=

ipC (N + 1)

(1 − D) − Vo

RC. (43)

TABLE VIIIDESIGN PARAMETERS OF THE INVERTER


Switching frequency fs 20 000 HzSwitches S5 ∼ S8 SPP11N60C3Output filter inductor Lf 840 μHOutput filter capacitor Cf 6.6 μFCutoff frequency fc u t 1700 Hz

Fig. 15. Input voltage and current waveform.

Solving state-space equations gives the primary inductor tocontrol transfer function GiL p d (s) and output to control transferfunction Gvo d (s) of the battery charger/discharger as

GiL p d (s) =iLp

d=

NVBat + Vd

(N + 1) RCLm

×(s + 1

RC

)(s2 + s 1

RC + (1−D )2

(1+N )2 Lm C

) (44)

Gvo d (s) =vo

d=

s(− IP

C (N +1)

)+ (1−D )

C (N +1)

(NVB a t−Vd

Lm (N +1)

)

s2 + s 1RC + (1−D )2

(1+N )2 Lm C

.

(45)

Considering the gain due to the clamp capacitor Cb2 , thetransfer equation is given by

Gvo d (s) =vo

d

=s(− IP

C (N +1)

)+ (1−D )

C (N +1)

(NV B a t −(Vd −VB a t / (1−D )

L m (N +1)

)

s2 + s 1RC + (1−D )2

(1+N )2 L m C

. (46)

The right-half plane zero in the control to output trans-fer function has been placed properly with suitable selectingthe design components. Using current mode control and se-lecting optimum value of LM , load current, and duty cycleD of the converter, keeps the circuit operation under stablecondition [36], [37].

In battery discharging control, the voltage loop with the PIcompensator Gv = kp + ki

s regulates the dc-link voltage Vd


Fig. 16. Drain to source voltage and current of switches S3 and S4 during battery charging (buck mode).

Fig. 17. Drain to source voltage and current of switches S3 and S4 during battery discharging (boost mode).

Fig. 18. Voltage and current of the battery charger.

and provides the reference current iref for the current loop.Similarly, the PI compensator is added in the current loop toforce the primary inductor current iP to follow the referencecurrent iref from the voltage loop. The Bode plot of the currentloop gain and voltage loop gain has been generated consideringthe battery charger/discharger circuit parameters from Table VII.The values of kp and ki are 1.7 and 9, respectively, for the voltageloop, while 2.3 and 2300, respectively, for the current loop. Thesystem shows good stability with the positive phase margin andhas no right-half plane poles as shown in Fig. 13. It is easy toachieve higher cross over frequencies by adjusting a suitablegain of the compensators as the phase never reaches to –180.

For designing the battery charging controller, the equiva-lent electric circuit of the battery is presented in Fig. 14. TheThevenin battery model is most commonly used model [38],

Fig. 19. Output voltage and current for the linear load.

which consist of an ideal battery voltage EO , internal resistanceRi , polarization capacitor CP , and polarization resistance RP .All the elements used in the model are functions of battery stateof charge (SoC). NS and NP are the number of cells in seriesand parallel, respectively. The battery terminal voltage VBat canbe presented as

VBat = Ns(E0 − IBatRi − Vcp), (47)

where VCP is the polarization voltage and IBat = IL o a dNp

is thebattery current. Model parameters have been identified for thebattery as shown in Table IV.

In the charging mode, the controller operates as CC modeor CV mode depending on the battery voltage as shown in theFig. 9. In the current loop, the battery input current iBat is forced


Fig. 20. Output voltage and current for the nonlinear load.

Fig. 21. Experimental waveform of step change, 0 to 100%.

Fig. 22. Experimental waveform of step change, 100% to 0.

to follow the reference current iRef using the PI compensator in

i∗ = Kp (iRef − iBat ) + Ki

∫(iRef − iBat )dt. (48)

Similarly, the battery voltage is regulated by the voltage loopusing the PI compensator that forces the output battery voltageVBat to follow the reference voltage Vref . The current limiter isintroduced to limit the maximum charging current of the batteryas specified in Table IV. If iref is greater than ilimit , the batteryis charged at the CC mode, in contrast if iref is less than ilimit ,the battery is charged at the CV mode.

IV. EXPERIMENTAL RESULTS

To verify the performance of the proposed UPS system, a lab-oratory prototype has been implemented with the specificationsshown in Table V. The control scheme for inverter, rectifier, and

Fig. 23. Transition from grid to battery mode, Input voltage Vin and currentIin , Output voltage Vout and current Iout .

Fig. 24. Transition from battery to grid mode, Input voltage Vin and currentIin , Output voltage Vout and current Iout .

Fig. 25. Efficiency graph in grid and battery mode.

battery charger/discharger has been implemented using DSPTMS320F28335. The design parameters of the rectifier, batterycharger/discharger, and inverter are shown in Tables VI, VII,and VIII, respectively. The backup storage system consists oftwo batteries (each battery is 24 V/35 Ah), or parallel batteriesdepending upon the backup time for the connected load.

The utility input voltage and the current waveform in the gridmode of operation is shown in the Fig. 15. The input currentwaveform is very close to the sinusoidal and has almost unitypower factor with THD 4.5%. Fig. 16 and 17 show drain tosource voltage of the switches S3 and S4 of the bidirectionalconverter (battery charger) during both the buck and boost mode


TABLE IXCOMPARISON OF THE PROPOSED SYSTEM

Properties UPS Topology Efficiency PowerRatings

SystemSpecifica-

tion

Batterybank

Size andWeight

Transformerless offlineUPS system [39]

High 1 kVA 220 V 144 V Medium

A reconfigurable UPS formultiple power quality[15]

High 1 kVA 110 V 300 V -

Transformerless onlineUPS system[16]

96% 3 kVA 220 V 192 V Smaller

Nonisolated UPS with110/220 V input–outputvoltage [17]

86% 2.6 kVA 110 V and220 V

108 V Medium

Z-source inverter basedUPS system [40]

>90% 3 kVA 220 V 360 V Smaller

Proposed UPS system 92% 1 kVA 220 V 24 V Smallest

of operation, respectively. Both the switches are operating underthe condition of ZVS. Similarly, the output voltage and currentof the bidirectional converter during battery charging has beenshown in Fig. 18. The output voltage and the current waveformduring the linear load are shown in Fig. 19. The waveform issinusoidal with THD less than 1%. Also, the system is connectedwith the nonlinear load designed according to the standard ofIEC62040–3. The system shows good performance with THDof 1.25% for the nonlinear load as shown in the Fig. 20.

Figs. 21 and 22 show the output voltage and the currentwaveform during step change in load from 0 to 100% and from100% to 0. The system shows good response to step changesand provides the regulated output voltage regardless of the loadchanges. When the grid power is interrupted and the systemswitches from grid mode to battery mode, the rectifier is nomore in operation and the battery charger/discharger operatesin discharging mode giving the regulated dc-link voltage. Thetransient effect in the output voltage is very small and the UPSsystem provides uninterruptible power to the load as shown inFig. 23. Similarly, the transition from battery mode back to gridmode upon the restoration of the grid power is shown in Fig. 24.Simple RC snubber has been used to discharge the inductors L11and L12 , preventing the overvoltage spike when the MC opens.

Fig. 25 shows the efficiency graph with maximum efficiencyof 94% during battery mode and 92% during grid mode of op-eration. Thus, utilizing soft switching in bidirectional converterreduces the switch losses and increases the efficiency of thesystem. The efficiency in the battery mode is high as comparedto the grid mode, because less number of power stages are inoperation during this mode. The efficiency is slightly less forthe transformerless system, due to the high battery chargingcurrent. Table IX shows the comparison of the different trans-formerless UPS system. The proposed UPS shows the distinctimprovement in terms of reducing the size of the battery bank,decreasing the overall volume and weight of the system.

V. CONCLUSION

A single-phase transformerless online UPS has been pro-posed in this paper. A bridgeless boost rectifier has been used

with the average current control method that increases the effi-ciency of the system and provides the power factor correction.A new bidirectional converter for battery charging/discharginghas been implemented which ensures transformerless operationand reduces the battery bank significantly. A new control for theinverter provides the regulated sinusoidal output voltage withlow THD for both linear and nonlinear load. Overall, the vol-ume of the system is minimized by reducing the size, weight,and battery bank of the system. The experimental results showgood dynamic and steady-state performance. It may be recom-mended to extend this proposed UPS system to the three-phasetransformerless online UPS system.

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Muhammad Aamir received the B.Eng. (Hons.) de-gree in electrical engineering from the University ofEngineering and Technology, Peshawar, Pakistan, in2007, and the master’s degree from Hanyang Uni-versity, Seoul, South Korea, in 2011. He is currentlyworking toward the Ph.D. degree in the Power Elec-tronics and Renewable Energy Research Laboratory,Department of Electrical Engineering, University ofMalaya, Kuala Lumpur, Malaysia.

His research interests include uninterruptiblepower supplies, power conversion, and control of

power converters.

Saad Mekhilef (M’01–SM’12) received the B.Eng.degree in electrical engineering from the Univer-sity of Setif, Setif, Algeria, in 1995, and the mas-ter’s degree in engineering science and the Ph.D. de-gree in electrical engineering from the University ofMalaya, Kuala Lumpur, Malaysia, in 1998 and 2003,respectively.

He is currently a Professor and the Director ofthe Power Electronics and Renewable Energy Re-search Laboratory, Department of Electrical Engi-neering, University of Malaya. He is the author or

co-author of more than 300 publications in international journals and proceed-ings. His research interests include power conversion techniques, control ofpower converters, renewable energy, and energy efficiency.

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