ieee international integrated reliability workshop october...
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VDE VDE –– ITG 8.5.6ITG 8.5.6ffWLRWLR/WLR, Simulation & Qualifikation/WLR, Simulation & Qualifikation
XX--FAB Semiconductor Foundries AG,FAB Semiconductor Foundries AG, Dresden,Dresden, Germany, Germany, 09./10. Juni 201109./10. Juni 2011
IEEE INTERNATIONAL INTEGRATED IEEE INTERNATIONAL INTEGRATED RELIABILITY WORKSHOP RELIABILITY WORKSHOP
October 17October 17--2121
Andreas Aal
MELEXIS Microelectronic Integrated Systems
A.Aal, Melexis Microelectronic Systems Slide Number: 2
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2010 International Integrated Reliability 2010 International Integrated Reliability Workshop (IEEE)Workshop (IEEE)Stanford Sierra Conference Centre-South Lake Tahoe CaliforniaOctober 17-21, 2010 75 attendees (5 women) High diversity of topics for the
presentation Invited talk, keynote 6 (great) tutorials Sessions
BTI Fabless & foundry interaction Photovoltaic Soft errors BEOL (too short!) Transistors Reliability Product reliability Memory
26 + 8 Presentations, 22 Posters Special interest discussion groups
fWLR Product reliability NBTI
A.Aal, Melexis Microelectronic Systems Slide Number: 3
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any Interesting topics Interesting topics
Discussion groups Tuesday BEOL Wednesday Fast WLR clear statement about impossibility of fast metallisation tests (lifetime) Consensus about more effort in intelligent monitoring
Other interesting presentations Session Fabless and Foundry Interaction Fabless company Qualcomm
o Requirements of effective fables/foundry interactions for achieving robust product reliability
– “Statistical reliability models for NBTI process variations are needed”– “Electromigration continuous to be a major reliability concern
Foundry GlobalFoundieso “Foundry reliability engineering requirements and challenges”
– “Level 0 = Early Reliability Assessment”– “This is the phase to highlight any reliability issue that required a major change to the
process architecture.”
A.Aal, Melexis Microelectronic Systems Slide Number: 4
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Impressions Impressions around Fallen Leaf
Lake ~15km
A.Aal, Melexis Microelectronic Systems Slide Number: 5
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Impressions Impressions around Fallen Leaf
Lake ~15km
A.Aal, Melexis Microelectronic Systems Slide Number: 6
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Impressions Impressions around Fallen Leaf
Lake ~15km
A.Aal, Melexis Microelectronic Systems Slide Number: 7
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Impressions Impressions around Fallen Leaf
Lake ~15km
A.Aal, Melexis Microelectronic Systems Slide Number: 8
VDE
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any
Impressions Impressions around Fallen Leaf
Lake ~15km
A.Aal, Melexis Microelectronic Systems Slide Number: 9
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any JEDEC 14.2 meeting JEDEC 14.2 meeting
Separated from IIRW2010 only 2010 !!! Hotel Inn by the Lake – South Lake Tahoe Small number of members, guests 9 persons Only members get information via e-mail !
Thursday NBTI only formal faults ballot finished 1 group HC JEDEC 14
o Questionnaire next month feedback – building working group JP001 presently guideline, goal standard
o Attend work group JP001
Friday Tim Sullivan prepared summary JP001
discussion: guideline is used as standard, confusion
A lot of global changes All things with same failure rate Definition minimum requirements
A.Aal, Melexis Microelectronic Systems Slide Number: 10
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any JEDEC JEDEC 14.2 meeting14.2 meeting
JP001 handled still like standard will go to be a standard
Reduced restrictions Stay at the chapter numbers Problem JEDEC form Publications as references Fixed contents only level 1 which is really
responsibility of foundry Discussion
SWEAT IP cells responsibility Test structure descriptions in report Small working group for every test Links to standards Definition qualification lot Needs and limits for mixed signal
Discussion: difference technology qualification &device (library) qualification – JP001 only fortechnology qualification
Package level separate document ?
A.Aal, Melexis Microelectronic Systems Slide Number: 11
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any Questions?Questions?