[ieee asp-dac 2001. asia and south pacific design automation conference 2001 - yokohama, japan (30...

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A Single-Inductor Dual-Output Integrated DC/DC Boost Converter for Variable Voltage Scheduling Dongsheng Ma, Wing-Hung Ki, Chi-Ying Tsui and Philip K. T. Mok Department of Electrical and Electronic Engineering The Hong Kong University of Science and Technology Clear Water Bay, Hong Kong SAR, China Fax: (852)-2358-1485 E-mail: [email protected] Abstract- An integrated boost DC/DC converter that provides two different outputs with a 1.8V input us- ing only one inductor is presented. The converter works in discontinuous conduction mode and employs time divi- sion multiplexing in switching the inductor current to the two outputs. Synchronous rectification for high efficiency is implemented. Techniques for current sensing, inductor ringing suppression and controller design are discussed. At an oscillator frequency of lMHz, the conversion efficiency reaches 90% at 350mW. I. INTRODUCTION ITH the proliferation of battery-operated portable W applications, power dissipation plays an important role in evaluating the performance of a system. For a digi- tal processor, one effective way to reduce power consump- tion is to employ a variable voltage scheme. A DC/DC converter is required to provide the variable output volt- age to the processing elements [l]. For system-on-chip (SOC) applications, different optimal voltages are required for different processor cores and a DC/DC converter that provides multiple output voltages, of which the values can be changed according to speed and power requirement, is very desirable. In this research, a DC/DC converter with a single inductor and two output voltages is presented. A single-inductor multiple-output DC/DC boost converter is discussed in [2] recently. Two timing schemes were suggested, but the controller was not discussed and no experimental results were shown. Besides, the con- verter needs 2Ni-1 power devices for N outputs, which is detrimental to the efficiency of the converter, especially for outputs with low voltages. 11. CONVERTER ARCHITECTURE A. Circuit topology and control scheme Fig.1 shows the block diagram of the proposed single-inductor dual-output DC/DC boost converter. The two sub-converters A and B both work in discontinuous conduction mode (DCM) with a fixed switching frequency of fs and a period of T. The control scheme is one form of time division multiplexing (TDM). For converter A, the ramp-up time of the inductor current is D1,T and the ramp-down time is Dz,T. The duration of zero cur- rent is thus (l-D1,-Dza)T. Similar definitions for Dlb and 026 can be applied to converter B. For the converter to work properly, the conditions that D1,+Dza < 0.5 and Dlb+Dzb < 0.5 have to be imposed, so that the inductor works in discontinuous conduction mode. Two comple- mentary control signals PH, and PHb are generated by a ........ .. ...... .., . ....... ........ Fig. 1. The Schematic of the Proposed Converter Pha DIa , I DZr j F'hb 1 Dlb I 1 ' 1 D2b \ Fig. 2. The Timing Diagram of the Proposed Converter T flip-flop the clock signal of which comes from an on-chip oscillator. These control signals decide which output node the current should flow to in each period. Dza and 026 are determined by the outputs of the error amplifiers and the current sensing signals of the converter. Fig.2 shows the timing diagram of the converter. The topology can easily be extended to generate multiple output voltages. For a conventional design, if N output voltages are needed, N inductors and 2N power devices are required. For the pro- posed topology, only one inductor and N+1 power devices are used, and saves N power devices as compared to the converter proposed in [2]. Of course, the inductor and the main power switch have to sustain larger current stress. B. Circuit design consideration Synchronous rectification is a technique to replace free-wheeling diodes by transistors with low on-resistance, and emulate the diodes by switching off the transistors when the currents attempt to flow in the reverse direction. 19 0-7803-6633-6/01/$10.00 02001 IEEE.

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Page 1: [IEEE ASP-DAC 2001. Asia and South Pacific Design Automation Conference 2001 - Yokohama, Japan (30 Jan.-2 Feb. 2001)] Proceedings of the ASP-DAC 2001. Asia and South Pacific Design

A Single-Inductor Dual-Output Integrated DC/DC Boost Converter for Variable Voltage Scheduling

Dongsheng Ma, Wing-Hung Ki, Chi-Ying Tsui and Philip K. T. Mok Department of Electrical and Electronic Engineering

The Hong Kong University of Science and Technology Clear Water Bay, Hong Kong SAR, China

Fax: (852)-2358-1485 E-mail: [email protected]

Abstract- An integrated boost DC/DC converter that provides two different outputs with a 1.8V input us- ing only one inductor is presented. The converter works in discontinuous conduction mode and employs time divi- sion multiplexing in switching the inductor current to the two outputs. Synchronous rectification for high efficiency is implemented. Techniques for current sensing, inductor ringing suppression and controller design are discussed. At an oscillator frequency of lMHz, the conversion efficiency reaches 90% at 350mW.

I. INTRODUCTION

ITH the proliferation of battery-operated portable W applications, power dissipation plays an important role in evaluating the performance of a system. For a digi- tal processor, one effective way to reduce power consump- tion is to employ a variable voltage scheme. A DC/DC converter is required to provide the variable output volt- age to the processing elements [l]. For system-on-chip (SOC) applications, different optimal voltages are required for different processor cores and a DC/DC converter that provides multiple output voltages, of which the values can be changed according to speed and power requirement, is very desirable. In this research, a DC/DC converter with a single inductor and two output voltages is presented.

A single-inductor multiple-output DC/DC boost converter is discussed in [2] recently. Two timing schemes were suggested, but the controller was not discussed and no experimental results were shown. Besides, the con- verter needs 2Ni-1 power devices for N outputs, which is detrimental to the efficiency of the converter, especially for outputs with low voltages.

11. CONVERTER ARCHITECTURE

A . Circuit topology and control scheme

Fig.1 shows the block diagram of the proposed single-inductor dual-output DC/DC boost converter. The two sub-converters A and B both work in discontinuous conduction mode (DCM) with a fixed switching frequency of fs and a period of T. The control scheme is one form of time division multiplexing (TDM). For converter A, the ramp-up time of the inductor current is D1,T and the ramp-down time is Dz,T. The duration of zero cur- rent is thus (l-D1,-Dza)T. Similar definitions for Dlb and 0 2 6 can be applied to converter B. For the converter to work properly, the conditions that D1,+Dza < 0.5 and Dlb+Dzb < 0.5 have to be imposed, so that the inductor works in discontinuous conduction mode. Two comple- mentary control signals PH, and PHb are generated by a

........ .. ...... .., . ....... ........

Fig. 1. The Schematic of the Proposed Converter

Pha

DIa , I

DZr j

F'hb

1 Dlb

I 1 ' 1 D2b

\

Fig. 2. The Timing Diagram of the Proposed Converter

T flip-flop the clock signal of which comes from an on-chip oscillator. These control signals decide which output node the current should flow to in each period. Dza and 0 2 6 are determined by the outputs of the error amplifiers and the current sensing signals of the converter. Fig.2 shows the timing diagram of the converter. The topology can easily be extended to generate multiple output voltages. For a conventional design, if N output voltages are needed, N inductors and 2N power devices are required. For the pro- posed topology, only one inductor and N+1 power devices are used, and saves N power devices as compared to the converter proposed in [2]. Of course, the inductor and the main power switch have to sustain larger current stress.

B. Circuit design consideration Synchronous rectification is a technique to replace

free-wheeling diodes by transistors with low on-resistance, and emulate the diodes by switching off the transistors when the currents attempt to flow in the reverse direction.

19 0-7803-6633-6/01/$10.00 02001 IEEE.

Page 2: [IEEE ASP-DAC 2001. Asia and South Pacific Design Automation Conference 2001 - Yokohama, Japan (30 Jan.-2 Feb. 2001)] Proceedings of the ASP-DAC 2001. Asia and South Pacific Design

By implementing a slight modification of this feature in the controller to direct the power flow, those diodes in [2] that are connected in series with power transistors can be eliminated [3]. The present design uses PMOS power tran- sistors as switches to pass energy from the inductor to the outputs. For a boost converter, the two output voltages are both higher than the supply voltage. The substrate of the switches and the supply voltage of the dead-time control buffer (used to drive the switching transistors) are connected to the highest DC voltage in the system, so that both switches can be fully turned on and off. To implement synchronous rectification, consider that once a switch is turned on, the current can flow in either direc- tion. To prevent the inductor current from flowing back to the source, zero (inductor) current detection is needed. To enhance efficiency and to reduce pin-count, current sensing is done by transistor scaling [4] rather than using external sensing resistor. Since the inductor works in DCM, there are time intervals that all switches are off. The inductor and the filtering capacitor then forms an oscillatory cir- cuit, with damping only controlled by the load resistance. Very often, large ringing occurs at node V,, causing elec- tromagnetic interference and results in reduced efficiency. Our design incorporates a ringing suppression circuit ([5]) to short the inductor when all the power transistors are off. (See Fig.1)

die area conversion efficiency

outDut voltages

Fig. 3. Microphotograph of the converter

2. 4mm2 90%

3.0V 1 3.45V

1.08 v

111. EXPERIMENTAL RESULTS

The converter was designed and fabricated using an HP 0.5pm CMOS process from MOSIS. Fig. 3 is a microphotograph of the chip. Fig. 4 show the waveforms of the inductor current and the voltage of node V, respec- tively. Fig. 5 shows the two outputs of the converter in the steady state with reference to the inductor current. Ta- ble I summaries the testing results of the converter. With an inductor resistance of 125ml2 and capacitor ESRs of 150mS2, the converter achieves an efficiency of 90% when delivering a total power of 350mW.

I I I I I I I I I I I

Fig. 4. Inductor current and votlage of Vx

TABLE I THE EXPERIMENTAL RESULTS O F THE CONVERTER

I inductor I I uH I

switching frequency I 500kHz 1 500kHz maximum loading currents 1 50mA I 50mA

IV. CONCLUSION

In this paper, a single-inductor dual-output DC/DC boost converter and its control schemes are dis- cussed. Experimental results show the validity of the controller with high efficiency. An obvious extension of the topology is easily made for more outputs. Compared with conventional converters, the numbers of inductors

20

* Fig. 5. Outputs of the Converter

and power devices are reduced significantly for the present design, which is very desirable for SOC applications.

REFERENCES [l] V. Gutnik and A.P. Chandrakasan, An eficient controller for

variable supply-voltage low power processing, IEEE Symp. on VLSI Circuits., pp.158-159, 1996.

[2] T. Li, Single inductor multiple output boost regulator, US Patent 6,075,295, June 13, 2000.

[3] W-H Ki, D.S Ma, C-Y Tsui, and P. Mok, Single-inductor multi- output DC/DC converter with synchronous rectification, Inven- tion Disclosure, HKUST, Oct. , 2000.

[4] W-H Ki, Current sensing technique using MOS transistors scal- ing with matched bipolar current sources, U.S. Patent 5,757,174, May 26, 1998.

[5] S-H Jung, N-S Jung, J-T Hwang and G-H Cho, An integrated CMOS DC-DC converter for battev-operated systems, IEEE Power Elec. Specialists Conf., pp.43-47, 1999.