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AbstractThis paper presents an ultra low power 60 GHz SiGe ASK receiver capable of 3-6 Gbps communications. The receiver is based on a 4-stage low-noise amplifier and an ASK detector, all in a 0.12 um SiGe transistor technology. The LNA and ASK detector were designed for wide bandwidth in order to result in a very high data rate. The LNA+Detector chip consumes 11 mW and is capable of 3-6 Gbps communications with a BER < 10 -12 for an input power of -36 dBm. At an input power of -44 dBm, the system can maintain a 3 Gbps link with a BER <10 -9 . This translates to 3.3-1.6 pJ/bit for the LNA+Detector, and to our knowledge, is the state of the art. The chip was tested up to 105°C and maintained > 3 Gbps with a BER < 10 -12 over the entire temperature range. Index Terms60 GHz, amplitude detector, LNA, ASK, OOK, communication. I. INTRODUCTION IGH data rate 60 GHz communication systems have been demonstrated by several groups using ASK, BPSK and QPSK transceivers [1-9]. Most of these systems are based on complex modulation schemes which consume a lot of power per bit, but result in a wide dynamic range and immunity to interferers. As is well known, the ASK (also known as OOK) system results in the lowest power consumption, but has limited dynamic range and virtually no immunity to interferers. However, there are applications such as low-cost short distance point-to-point links where a 60 GHz ASK system is highly advantageous. This is especially applicable if the ASK system is operated with directional antennas (G > 10 dB) and over 0.1-3 meters. This paper presents a SiGe LNA+Detector which have been optimized to result in the lowest power consumption while still being capable of delivering a 3-6 Gbps link at low input power levels (Fig. 1). The ASK detector has a very high NF (> 35 dB) and therefore, an LNA with > 25 dB is used to greatly improve the system NF and sensitivity. For reference purposes, the baseband amplifier is not integrated on-chip and the quoted power is only for the LNA+Detector. Even though the communication link was established using waveguide horn antennas over variable distances, the power is quoted at the receiver input port so as to normalize out the antenna gain and free space loss. II. LNA DESIGN AND MEASUREMENTS Fig. 2a presents a 4-stage SiGe LNA designed for low noise and very high gain. The first stage is designed for low noise with an emitter degeneration inductor and 1 mA of current, while stages 2-4 are designed for high gain and consume 2 mA each. The bias circuits (not shown) are implemented using standard current mirrors and are not a PTAT (proportional to absolute temperature) design. The simulated gain is > 25 dB from 52-61 GHz with a peak of 26.3 dB at 56 GHz. The simulated S 11 and S 22 are < -10 dB and < -8 dB, respectively, over this frequency range. The simulated NF is 5.7-5.8 dB at 55-60 GHz. The amplifier consumes 10.5 mW (7 mA from a 1.5 V source). The amplifier is designed to have an input P1dB of -32 dBm (output P1dB of around -7 dBm). As will be seen in Section III, the detector saturates in a gradual fashion and can withstand -10 dBm of input power. The simulated input IIP3 is -24 dBm for the LNA. The LNA+Detector chip is implemented in the IBM Ultra Low Power 60 GHz ASK SiGe Receiver with 3-6 GBPS Capabilities Woorim Shin, Mehmet Uzunkol and Gabriel M. Rebeiz Electrical and Computer Engineering The University of California, San Diego [email protected], [email protected], [email protected] H Fig. 1: ASK receiver system consisting of a SiGe LNA and a SiGe transistor detector. 978-1-4244-5191-3/09/$26.00 ©2009 IEEE

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Page 1: [IEEE 2009 Annual IEEE Compound Semiconductor Integrated Circuit Symposium - Greensboro, NC, USA (2009.10.11-2009.10.14)] 2009 Annual IEEE Compound Semiconductor Integrated Circuit

Abstract— This paper presents an ultra low power 60

GHz SiGe ASK receiver capable of 3-6 Gbps communications. The receiver is based on a 4-stage low-noise amplifier and an ASK detector, all in a 0.12 um SiGe transistor technology. The LNA and ASK detector were designed for wide bandwidth in order to result in a very high data rate. The LNA+Detector chip consumes 11 mW and is capable of 3-6 Gbps communications with a BER < 10-12 for an input power of -36 dBm. At an input power of -44 dBm, the system can maintain a 3 Gbps link with a BER <10-9. This translates to 3.3-1.6 pJ/bit for the LNA+Detector, and to our knowledge, is the state of the art. The chip was tested up to 105°C and maintained > 3 Gbps with a BER < 10-12 over the entire temperature range.

Index Terms— 60 GHz, amplitude detector, LNA, ASK, OOK, communication.

I. INTRODUCTION IGH data rate 60 GHz communication systems have been demonstrated by several groups using ASK,

BPSK and QPSK transceivers [1-9]. Most of these systems are based on complex modulation schemes which consume a lot of power per bit, but result in a wide dynamic range and immunity to interferers. As is well known, the ASK (also known as OOK) system results in the lowest power consumption, but has limited dynamic range and virtually no immunity to interferers. However, there are applications such as low-cost short distance point-to-point links where a 60 GHz ASK system is highly advantageous. This is especially applicable if the ASK system is operated with directional antennas (G > 10 dB) and over 0.1-3 meters.

This paper presents a SiGe LNA+Detector which have been optimized to result in the lowest power consumption while still being capable of delivering a 3-6 Gbps link at low input power levels (Fig. 1). The ASK detector has a very high NF (> 35 dB) and therefore, an LNA with > 25 dB is used to greatly improve the system NF and

sensitivity. For reference purposes, the baseband amplifier is not integrated on-chip and the quoted power is only for the LNA+Detector. Even though the communication link was established using waveguide horn antennas over variable distances, the power is quoted at the receiver input port so as to normalize out the antenna gain and free space loss.

II. LNA DESIGN AND MEASUREMENTS Fig. 2a presents a 4-stage SiGe LNA designed for low

noise and very high gain. The first stage is designed for low noise with an emitter degeneration inductor and 1 mA of current, while stages 2-4 are designed for high gain and consume 2 mA each. The bias circuits (not shown) are implemented using standard current mirrors and are not a PTAT (proportional to absolute temperature) design. The simulated gain is > 25 dB from 52-61 GHz with a peak of 26.3 dB at 56 GHz. The simulated S11 and S22 are < -10 dB and < -8 dB, respectively, over this frequency range. The simulated NF is 5.7-5.8 dB at 55-60 GHz. The amplifier consumes 10.5 mW (7 mA from a 1.5 V source).

The amplifier is designed to have an input P1dB of -32 dBm (output P1dB of around -7 dBm). As will be seen in Section III, the detector saturates in a gradual fashion and can withstand -10 dBm of input power. The simulated input IIP3 is -24 dBm for the LNA.

The LNA+Detector chip is implemented in the IBM

Ultra Low Power 60 GHz ASK SiGe Receiver with 3-6 GBPS Capabilities Woorim Shin, Mehmet Uzunkol and Gabriel M. Rebeiz

Electrical and Computer Engineering

The University of California, San Diego

[email protected], [email protected], [email protected]

H

Fig. 1: ASK receiver system consisting of a SiGe LNA and a SiGe transistor detector.

978-1-4244-5191-3/09/$26.00 ©2009 IEEE

Page 2: [IEEE 2009 Annual IEEE Compound Semiconductor Integrated Circuit Symposium - Greensboro, NC, USA (2009.10.11-2009.10.14)] 2009 Annual IEEE Compound Semiconductor Integrated Circuit

8HP process with 7 metal layers. This process has 0.12μm SiGe transistors (fT of 180-200 GHz) and 0.12μm CMOS transistors (fT of 90-100 GHz). Grounded CPW transmission lines are used with dimensions of 11/12/11 μm for 50 Ω and with an estimated loss of 0.55 dB/mm at 60 GHz. All inductors are implemented using shorted stubs with an estimated transmission-line Q of 11-12 at 60 GHz. Standard IBM transistor cells and MIM capacitor models are used, and full electromagnetic modeling is done on the transmission-lines and stubs using Sonnet1. The fabricated LNA occupies 0.42 mm2 including pads (Fig. 2b).

The measured S-parameters of 10 different LNA chips are shown in Fig. 3. The peak response occurs at 51 GHz with a gain of 25.7-27.3 dB. The simulated S11 and S22 agree well with measurements. A small shift in frequency is observed and this is currently being investigated. It is possible that this is due to a small additional inductance incurred in the small metal-oxide-metal (40-60 fF) inter-stage capacitors. The NF was measured on 3 different LNAs at 50 GHz (limited by our measurement set-up) and was 6.2-6.7 dB. This compares well with simulations at 50 GHz (6.1 dB). Measured output P1dB is -10.1 dBm, which is enough to drive the subsequent diode detector. (Fig. 4)

The temperature performance of an LNA chip is shown in Fig. 5. The gain of LNA gradually decreases by 4.9 dB as temperature increases to 105°C. The gain response does not shift in frequency.

1 Sonnet, ver. 11.52, Sonnet Software Inc., Syracuse, NY, 1986-2007

(a)

(b)

Fig. 2: Schematic (a) and microphotograph (b) of the 4-stage SiGe amplifier. (0.76 x 0.57 mm2)

(a)

(b)

Fig. 3: Measured S-parameters of 10 LNA chips: (a) S21, and (b) S11 and S22.

(a)

(b)

Fig. 4: Measured (a) noise figure and (b) P1dB of LNA

Page 3: [IEEE 2009 Annual IEEE Compound Semiconductor Integrated Circuit Symposium - Greensboro, NC, USA (2009.10.11-2009.10.14)] 2009 Annual IEEE Compound Semiconductor Integrated Circuit

III. DETECTOR DESIGN AND MEASUREMENTS The SiGe ASK detector is based on a bipolar amplifier

biased in a near class C region with a bias current of 0.35 mA (Fig. 6). Lumped-element emitter degeneration and a base inductor are used to match the detector to 50 Ω at the input port. A 60 GHz LC notch filter (L=59 pH, C= 120 fF) is placed at the collector to filter out the 60 GHz component, and the collector impedance is set to 600 Ω for DC biasing purposes. The fabricated detector occupies 0.24 mm2 including the pads. In most measurements, a 50 Ω load is attached to the output port. The simulated responsivity at 60 GHz is 9100 V/W into an open circuit and 700 V/W into a 50 Ω load. Noise-equivalent power (NEP) is defined as the output noise voltage (2-3 nV/Hz1/2 at > 500 MHz) divided by the responsivity, and is simulated as 3-4.3 pW/Hz1/2 at > 500 MHz. The NEP is the same for an open circuit or for a 50 Ω load since both the output noise and the responsivity drop by the same amount when a 50 Ω load is connected to the detector output port.

The measured S11 and S21 of the SiGe detector are presented in Fig. 7. The detector is well matched over a wide bandwidth and the notch filter response is clearly seen in S21. The measured responsivity is ~635 V/W at 60 GHz with a P1dB of -15 dBm, and the measured output

noise is 2.5-3 nV/Hz1/2 > 500 MHz. The measured output noise includes the noise of 1-1000 MHz Miteq AM1533 amplifier (NF<2 dB, Vn<0.7 nV/Hz1/2) but the gain of the amplifier was normalized out of the measurement. This results in an NEP of 4-4.8 pW/Hz1/2 for >500 MHz and agrees well with simulations. The output noise is high at low frequencies due to the noise coupled from the biasing resistor and it is multiplied by the low frequency gain of the detector. The output noise voltage of the detector could be improved by using a smaller bias resistor.

IV. LNA+DETECTOR MEASUREMENTS The LNA+Detector chip is shown in Fig. 8 and is based

on combining the previously described LNA and ASK detector into a single circuit (area is 0.57 x 1.1 mm2 including pads). From the NEP measurements and assuming an RF input bandwidth of 10 GHz, the estimated NF of the detector is ~40-41 dB. The system NF is therefore 15-16 dB with the LNA, and is completely dominated by the ASK detector. The measured responsivity of the LNA+Detector chip at 55 GHz is 180,000 V/W into a 50 Ω load with a P1dB of -36 dBm.

(a)

(b)

Fig. 5: Measured gain vs. temperature: (a) S21, (b) peak gain.

(a) (b)

Fig. 6: Schematic (a) and microphotograph (b) of the SiGe ASK detector. (0.42 x 0.57 mm2)

Fig. 7: Measured and simulated S-parameters of the ASK detector.

Page 4: [IEEE 2009 Annual IEEE Compound Semiconductor Integrated Circuit Symposium - Greensboro, NC, USA (2009.10.11-2009.10.14)] 2009 Annual IEEE Compound Semiconductor Integrated Circuit

At this power level, the LNA output power (assuming an internal 50 Ω load) is -13 dBm and agrees well with the measured stand-alone detector P1dB.

An ASK modulated system was set up with an Agilent N4903A BER tester sending 231-1 pseudo-random binary sequence (PRBS), a double-balanced mixer and a 55 GHz signal source. A center frequency of 55 GHz was chosen since it results in the widest amplifier bandwidth for double sideband operation. The ASK modulated signal was transmitted and received using horn antennas over variable distances, but this has been normalized out of the experiment and all power are referred to the available input power at the chip. Coaxial 50 Ω wideband amplifiers were used after the LNA+Detector chip and their power consumption is not included in the calculations (they consume ~150 mA to drive 50 Ω over 1 MHz to > 6 GHz). The measured BER vs. input power level for a 3 GBPS link is shown in Fig. 9. The ASK detector shows a dynamic range of 14-23 dB with a BER of less than 10-12 to 10-9. At low powers, the system is limited by the NF, while at high powers, it is limited by the detector compression. For an input power of -36 dBm, we were able to obtain 6 Gbps with a BER of 10-12.

The input power level can also be deduced from the system NF of 15 dB. For a double side-band 3 Gbps signal, the system bandwidth is around 2*(6 GHz)=12 GHz, and the available noise at the input is -174 + 15 + 101 = -58 dBm. A S/N of 15-20 dB is required for excellent BER performance in a simple ASK detector, and thus the -41 dBm minimum signal level for a BER of 10-12. The system operated up to 105°C in a 3 Gbps link, and this will be presented at the conference.

ACKNOWLEDGMENT This work was funded by Intel Corp. and the

UC-Discovery Program, Drs. Ian Young and Jad Rizk, Program Monitors. We also thank Prof. James Buckwalter at UCSD for his help in the BER measurements.

REFERENCES [1] S. Sarkar and J. Laskar, “A Single-Chip 25pJ/bit

Multi-Gigabit 60GHz Receiver Module,” IEEE Int. Microwave Symposium Digest, pp. 475-478, June 2007.

[2] J. Lee et al., “A Low-Power Fully Integrated 60 GHz Transceiver System with OOK Modulation and On-Board Antenna Assembly,” IEEE ISSCC Dig. Tech. Papers, pp. 316-317, Feb. 2009

[3] M. Ko, “A CMOS-Compatible Schottky-Barrier Diode Detector for 60-GHz Amplitude-Shift Keying (ASK) Systems,” IEEE Int. Microwave Symposium Digest, pp. 1557-1560, June 2008.

[4] A. Oncu et al., “60 GHz-Pulse Detector Based on CMOS Nonlinear Amplifier,” IEEE Topical Meeting on Silicon Monolithic IC in RF Systems, pp.1-4, Jan. 2009

[5] A. Tomkins et al., “A Zero-IF 60 GHz Transceiver in 65nm CMOS with > 3.5Gb/s Links,” IEEE Custom Integrated Circuits Conference, pp. 471-474, Sept. 2008

[6] C. Marcu et al., “A 90nm CMOS Low-Power 60 GHz Transceiver with Integrated Baseband Circuitry,” IEEE ISSCC Dig. Tech. Papers, pp. 314-315, Feb. 2009

[7] S. Reynolds et al., “A Silicon 60 GHz Receiver and Transmitter Chipset for Broadband Communications,” IEEE J. Solid-State Circuits, vol. 41, no. 12, pp. 2820-2831, Dec. 2006.

[8] M. Tanomura et al., “TX and RX Front-Ends for 60 GHz Band in 90nm Standard Bulk CMOS,” IEEE ISSCC Dig. Tech. Papers, pp.558-559, Feb. 2008.

[9] T. Mitomo et al., “A 60 GHz CMOS Receiver Front-End With Frequency Synthesizer,” IEEE J. Solid-State Circuits, vol. 43, no. 4, Apr. 2008.

Fig. 9: Measured BER vs input power at 55 GHz. A dynamic range of 23 dB is observed for a BER < 10-9.

Fig. 8: Microphotograph of LNA+detecter. (1.1 x 0.5 mm2)