A SGHZ CMOS VOLTAGE-CURRENT FEEDBACK WIDE-BAND TRANSIMPEDANCE AMPLIFIER FOR OPTICAL TRANSCEIVERS

S. M Rezaul Haran

Department of Electrical & Computer Engineering, University of Sharjah University City, P. 0. Box: 27272

Sharjah, United Arab Emirates 971-6-5050931

hasanmic@sharjah.ac.ae

ABSTRACT

This paper describes an inductively peaked SGHz novel CMOS voltage-current feed-back transimpedance amplifier using TSMC 0.18pm SMZP 3V Digital CMOS process technology. The bandwidth of the amplifier was extended using the inductive peaking technique, and, simulation results indicated a a -3db bandwidth of around 4.7GHz with a transimpedance gain of ii 50dB ohms. The amplifier feahlres wide input dynamic range with automatic gain control. The average output noise voltage spectral density was SnV/sqrt(Hz) (with a peak of - %V/sqrt(Hz) ), while, the input referred noise current spectral density was below 8OpA/sqrt(Hz) within the amplifier frequency band.

Keywords: Transimpedance, voltage-current feedback, wide- band, inductive peaking, optical transceiver.

1. INTRODUCTION

Today's broad-band fibre-optic wire-line transceiver requires high performance Wansimpedance amplifier. Wide-band transimpedance bandwidth in the range of 1 to IOGHz is an usual performance requirement for optical standards such as OC-48 and OC-192. While 1 - IOGHz amplifier designs using GaAs or Si-bipolar technology[6] is quite prevalent, cost-effective fibre- optic consumer products require low-power CMOS transceivers. Design of broadband CMOS trans-impedance amplifiers is thus an important issue in wire-line broad-band communication circuit techniques. This paper describes a novel low noise CMOS current feed-back transimpedance amplifier using a TSMC 0.18pm 5M2P 3V Digital CMOS process technology.

2. NOVEL TRANSIMPEDANCE AMPLIFIER TOPOLOGY

Fig. I shows the topology of the proposed transimpedance amplifier. The optical signal received by the amplifier is converted by a p-i-n photodiode into a current input to the

common-gate input device MI of the amplifier. The lumped circuit model for the external p-i-n photadiode[3] is shown in Fig. Z(a). The width of the input device MI is optimized for low input referred drain current noise [ 5 ] . Fig. 2(b) shows the input referred noise sources for a common-gate stage. Since the common-gate stage directly refer:; back the drain noise current to the input, the current noise SOUII:~ dominates the input referred noise. The resistor R7 was chosen considering the bias current for MI and the thermal noise[8,9]. Also, the bias current of MI was set to obtain a ligml << R7 so that the small-signal drain current of MI is almost the same as the photo-diode current. The value of resistor RI is chosen high enough to provide sufficient output gain while not tcw high to suhstantially alter the low input impedance at the some node of MI (-l/gml). The output from the drain of MI is feed into the telescopic cascode stage M4-MS via the source-follower buffer M2 (biased by current source M3). In order to reduce voltage division at the source follower output

the overdrive of MZ is reduced while increasing it's aspect ratio (W'2IL2) in flowing the same bias current ( ID2 ,3 ) that flows

through M3. Also, L3 (of M3) is in general made wider since

vAW L . The output of the M4-h45 cascode is fed to the output stage via a second source-follower MI0 (biased by the current source device M9). The output siage consists of a cascode (M6- M7) to provide some additional gain along with wide bandwidth, and a source-follower (M8) to provide low impedance output. In order to preseme voltage headroom in all the stages, cascoded active loads or cascoded current mirror stages are generally avoided. This aids in making the output voltage swing of the amplifier wide enough to ensure sufficient sensitivity and low distortion [I]. In addition, linearity of current source/active loads is traded with low parasitic passive resistive loads in order avoid bandwidth bottlenecks due to parasitic capacitances associated with MOS devices. Voltage-curreat feedback is applied from the drain of M7 to the drain of MI thus helping to lower the RC time- constants at these high-impedanse drain nodes and minimize bandwidth bottlenecks. This gives total isolation of the high

0-7803-8163-7/03/$17.00 D 2003 IEEE ICECS-2003 567

photodiode input capacitance from determining the -3dB bandwidth of the amplifier [2]. The drain path of M5 & M7 is provided with inductances L2 & L3 for bandwidth extension.

The closed-loop mid-band transimpedance gain A , =+ for this transimpedance amplifier (in the absence of any Automatic Gain Control circuitry between the drain of M7 and

”,” “I

‘hpa

M5) can be deduced to be: A,, = Azo , where, (1 + Az0.P)

P=l/R3 is the feedback factor in mho(R-’),

(1)

is the open-loop gain transimpedance gain from the drain of MI to the source of MS, with v I= 7 2a0.2 The bandwidth of this transimpedance amplifier in the absence of inductive peaking would be determined by the open-circuit time- constants at the high impedance nodes, namely the drain nodes of MI, M5 and M7. However, the lwp-gain (A,P) through current feed-back via R3 would considerably reduce the

) leaving impedance at the drain node of MI (R = - the drain nodes of M5 & M7 as the main bandwidth “bonle- necks” of the amplifier. Inductive peaking [10,11] is thus used in the drain paths of M5 & M7 to extend the bandwidth of the amplifier. Inductance ( L ) in the drain path improves the bandwidth by replacing the polo due to the RC time-constant at

R this node by a zero (@ - ) and a pair of complex poles ( @I

RI.Rd.RS.R6..r .r .g .g .g .g .g . ( l+qI).(l + 72)

(r g +I) . ( , g +I).(R6.g + I )

0 3 09 012 m4 m6 m9 m10

03 m2 a9 mi0 m 9

Am =

R 1 f AZOP

L

)with R, and C, 2LC,

being the equivalent resistance & equivalent capacitance respectively at the particular drain node. The complex poles peak the frequency response by inducing resonance near the previous -3dB location (without the inductance). The input referred noise current spectral density (Figure 2@)) of the transimpedance amplifier can be written as [3,7]

In,in* (Q = 4 k ~ m + 4kT/R1 +zqigi + zqrgz

+(8kT/3gml) ( 1 / M 2 + lRI2 +(Zxf)’.(Cdhl + Cgsl)’}

+(8kT/3@) (1/Rl2 + IN*+ (2af)’.(Cgdl+Cgd2+ CgsZ)’} (2) The first two terns in the above noise equation represents thermal noise contribution due to R3 and R1.The next two terms in the equation are the noise conmbutions due to the gate leakage currents and are mostly negligible as their values are very small(kT/q;lZ6mV). The last two terms in the equation are the channel thermal noises of the MOS transistors.

In order to allow a wide input dynamic range in this transimpedance amplifier, Automatic Gain Control (AGC) is provided using the triode regime transistor MI1 between the

drains of M7 and M5. This modification provides an inner voltage-current feedback loop for transimpedance variation using AGC control voltages in the range 2.2V ~ 2.6V.

3. SIMULATION RESULTS

SPICE simulations (using Tanner T-SPICE v.7.0) were conducted on the transimpedance amplifier using the TSMC 0.18pm 5M2P 3V Digital CMOS process technology In this design an external p-i-n photodiode with 250fF depletion-capacitance, as shown in Fig. Z(a), was assumed as the input current source and was thus used as the input signal for the circuit simulations. Fig. 3 shows the magnitude of the transimpedance gain indicating twin frequency peakings (due to the two LC resonance frequencies at the the drain nodes of M5 & M7) the higher one being at around 3GHz yielding an overall -3dB bandwidth of around 4.7GHz. A reasonably high transimpedance gain of 50dB ohms was achieved by the amplifier. To our knowledge GigaHertz CMOS transimpedance amplifier of this range of gain-bandwidth has not been reported so far particularly using law-cost digital CMOS process technology. The variation of the transimpedance phase is shown in Fig. 4 clearly indicating the effect of left-halj-plane “zero” and left-halfplane “complex poles” due to inductive peaking. Fig. 5 displays the transient response of the amplifier for a nominal 4 GHz input signal. Figures 6 & 7 indicates respectively the output noise voltage spectral density function and the input referred noise current spectral density function. The average output noise voltage spectral density was =5nV/sqrt(Hz) (with a peak of r%V/sqrt(Hz) ) while the input referred noise current spectral density was below 80pA/sqrt(Hz) within the amplifier’s output noise band-width. The amplifier was found to dissipate around 9OmW which is a marked improvement compared to the design in [4]. Fig. 8 shows the layout of transimpedance amplifier for test fabrication. Compared to the active devices and polysilicon “snake” resistors in the transimpedance amplifier, the spiral inductors (with ground shield) are found to occupy proportionately more silicon area This constitutes a cost factor for bandwidth enhancement using inductive peaking.

4. CONCLUSION

A novel transimpedance design has been described and the SPICE simulation results has been reponed. The amplifier is found to provide high transresistance along with wide bandwidth and is suitable for applications in optical transceivers In addition the transaimpedance amplifier has high noise immunity, wide dynamic range and low power dissipation, and hence, compares favourably to other recently reported transresistance amplifiers developed for optical transceiver applications.

5. REFERENCES

[ I ] K. Ohhata, T. Masuda, K. Imai, R. Takeyari, and K. Washio, ’‘ A wide-dynamic range, high ~ transimpedance Si bipolar preamplifier IC for IO-Gb/s optical fiber links ”,

568

IEEE J ofSolid-State Circuits, Vol. 34, No.], pp.18-24, Jan. 1999.

[2J A. A. Abidi, “Gigahertz tr-sistance amplifiers in fine line NMOS ”. IEEEJ. ofSolid-State Circuitx, Vol. Sc-19, No.6, pp.986-994, Dec. 1984.

[3] C. Toumazou, and S . M. Park, “Wideband low noise CMOS transimpedance amplifier for gigahertz operation”, Electronics Lefters, Vol. 32, No.13, pp. 1194-1196, Jun. 1996.

[4l T. Yoon, and B. Jalali, ” 1 Gbit/s fibre channel CMOS transimpedance amplifier ”, Elecfronics Lefters, Vol. 33, No. 7, pp. 588-589, Mar. 1997.

[5l 2. Chang, and W.M.C.Sansen, “ Low-noise, law-distortion CMOS AM wide-band amplifiers matching a capacitive some”, IEEEJ ofSolid-State Circuits, V01.25, No.3, pp. 833-840, 1990.

[6] T. Vanisri, and C. Toumazou, ‘I Integrated high frequency low-noise current- mode optical transimpedance amplifiers: Theory and Practice ”, IEEE J. ofSolid-Slate Circuifs, Vol. 30, No.6, pp. 677-685, Jun. 1995.

[71 D. A. Johns, and Ken Martin, Analog Integrated Circuit Design, John Wiley & Sons, Inc., 1997.

[XI B. Razavi, RFMicroelectroonics, Prentice Hall, 1998. [9] B. Razavi, Design of ondog CMOS integrated circuits,

McCraw Hill, 2001.

[IO] Thomas H. Lee, The Design of CMOS Radio Frequency Integrated Circuits, Cambridge University Press, 2001.

[I 11 S . S. Mohan, M. M. Hershenson, S. P. Boyd, and T. H. Lee,” Bandwidth extension in CMOS with optimized on-chip inductors”, IEEE J of Solio:Sfate Circuits, Vol. 35, No. 3, pp, 346-355, Mar. 2000.

MI

Figure 1. An inductively peaked voltage-current feed-back wide-band hasimpedance amplifier.

(4 @) Figure 2. (a) Fquivalent circuit of a p-i-n photo-diode, @) Input referred noise sources for the input common-gate stage

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................................................... I \\ .--" ._* Fqaenc? (IW

Figure 3. Trans-impedance gain and bandwidth

' lransinipdma gain @ha)

*.

--. .. ........ .- .i*;-.. ,_. j;

h q m l , ~ (k) Figure 4. The phase (argument) of the transimpedance gain.

i ,..

! .G. -... -... ........................ .:~-".I.x- . . . . . .L ,i ' (Ir

nrnoOu,

Figure 5. The transient response of the transimpedance amplifier.

I \ ....................................................

j . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2- p- .C

Fiquurc? (HO

Figure 6. The magnitude of the output noise voltage spectral density function.

hms n e I ~ - N m n t deluiw

Frcqww(Hi)

Figure I . function.

The input referred noise current spectral density

Figure 8. The layout of transimpedance amplifier far test fabrication.

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