iec 61850-1

IEEE TRANSACTIONS ON POWER DELIVERY, VOL. 26, NO. 2, APRIL 2011 725

Performance of IEC 61850-9-2 Process Bus andCorrective Measure for Digital RelayingMitalkumar G. Kanabar, Student Member, IEEE, and Tarlochan S. Sidhu, Fellow, IEEE

Abstract—International Electrotechnical Commission (IEC)standard 61850 proposes the Ethernet-based communicationnetworks for protection and automation within the power sub-station. Major manufacturers are currently developing productsfor the process bus in compliance with IEC 61850 part 9-2. Forthe successful implementation of the IEC 61850-9-2 process bus,it is important to analyze the performance of time-critical mes-sages for the substation protection and control functions. Thispaper presents the performance evaluation of the IEC 61850-9-2process bus for a typical 345 kV/230 kV substation by studyingthe time-critical sampled value messages delay and loss by usingthe OPNET simulation tool in the first part of this paper. In thesecond part, this paper presents a corrective measure to addressthe issues with the several sampled value messages lost and/ordelayed by proposing the sampled value estimation algorithm forany digital substation relaying. Finally, the proposed sampledvalue estimation algorithm has been examined for various powersystem scenarios with the help of PSCAD/EMTDC and MATLABsimulation tools.

Index Terms—Ethernet, generic object-oriented substationevent (GOOSE), IEC 61850, IEC 61850-9-2, intelligent electronicdevice (IED), process bus, sampled values (SVs), substation au-tomation system (SAS).

I. INTRODUCTION

I EC 61850 standard on “Communication Networks andSystems in Substation” provides the interoperability within

the power substation by defining the communication protocol,data format, and the configuration language [1], [2]. To reducethe cost of complex and long copper wiring, as well as toachieve flexibility in signal communications, IEC 61850 part9-2 has proposed Ethernet based communication networkbetween process level switchyard equipments, and bay levelprotection and control (P&C) intelligent electronic devices(IEDs), which is referred to as process bus [3]. According toIEC 61850-9-2, process bus Ethernet local-area network (LAN)should facilitate the communication of time-critical messages,such as, generic object-oriented substation event (GOOSE) andraw data sampled values (SVs), within the allowable time [3],

Manuscript received August 26, 2009; revised October 27, 2009. First pub-lished February 08, 2010; current version published March 25, 2011. Paper no.TPWRD-00646-2009.

The authors are with the Department of Electrical and Computer Engineering,the University of Western Ontario, London, ON N6A 5B9, Canada (e-mail:[email protected]; [email protected]).

Color versions of one or more of the figures in this paper are available onlineat http://ieeexplore.ieee.org.

Digital Object Identifier 10.1109/TPWRD.2009.2038702

[4]. Tremendous work is going on from various manufacturersto deploy Ethernet communication networks for the processbus [5]–[8]. For the successful implementation of the IEC61850-9-2 process bus, first of all, the implementation issues,such as performance of time-critical messages over the Ethernetcommunication network, reliability and availability of commu-nication architectures, and cost need to be analyzed [9], [10].Reliability and availability analysis of Ethernet switch-basedsubstation communication architectures has been carried outin [11], [12]. However, there is no significant work reportedso far to analyze the performance of a process bus communi-cation network for time-critical messages considering variousnetwork parameters. The performance of Ethernet switchedcommunication network are influenced by many factors, suchas speed of the communication link, packet service rate, net-work background traffic, etc. [13], [14]. On the other hand,according to the IEC 61850 part-5, the message transmissiontime requirements for the substation automation network mustbe ensured under any operating conditions and contingenciesinside the substation. Therefore, the communication delay forthe time-critical messages on process bus, such as sampledvalue packets and GOOSE messages, are of considerableconcern [9]. Especially, the analysis of packet delay and lossfor the sampled value packets is more important, as the samesampled value packet is not being transmitted repeatedly, unlikethe GOOSE.

This paper evaluates the performance of sampled valuepackets over the IEC 61850-9-2 process bus designed for atypical 345 kV/230 kV substation with the help of a dynamiccommunication network simulation tool, OPNET [15]. Thebasic OPNET modeling approach for IEC 61850 substation hasbeen discussed in [16]. However, detailed modeling need to becarried out to consider the various constraints of the practicalEthernet network, and therefore, the efforts have been put inthis work to evolve the dynamic models for several commu-nication mechanisms and protocols, e.g. bit error rate on thecommunication channel and bit error correction mechanism atcommunication port; Ethernet switch packet buffer and bufferoverflow mechanism; priority queuing mechanism for timecritical packets, etc. In addition to that, dynamic models of Eth-ernet switch (ESW), Ethernet based fiber cables and transceiverports, and other less time critical file transfer traffics, etc. havealso been developed to analyze more realistic scenarios for theIEC 61850-9-2 process bus performance evaluation. Finally,the results for the sampled value packet loss and delay havebeen obtained by considering the impact of various processbus network parameters, such as, speed of the communication

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726 IEEE TRANSACTIONS ON POWER DELIVERY, VOL. 26, NO. 2, APRIL 2011

link, sampling frequency of the merging units (MUs), Ethernetswitch buffer size and packet service rate, bit-error rate (BER)of the communication channel, and network background traffic.

Furthermore, [17] has demonstrated the impact of sampledvalue lost on the performance of digital relaying protective func-tions. Reference [9] has also shown the need of smart algorithmsfor the treatment of lost sampled value data into the modernP&C IEDs, which should be compatible to any (time and/orfrequency based) digital relaying algorithm. With these moti-vations, this paper also presents a corrective measure to com-pensate for the delayed or lost sampled values into the digitalrelaying algorithms. And, based on this corrective measure, thispaper proposes the sampled value estimation algorithm whichcan be implemented to work with any digital protection func-tions. Finally, the proposed algorithm has been examined forvarious scenarios using PSCAD/EMTDC and MATLAB sim-ulation tools. Section II introduces the major features and thechallenges related to IEC 61850-9-2 process bus. Detailed dy-namic modeling of process bus devices, protocols, and messagesas well as the performance of sampled value messages over theprocess bus have been discussed using OPNET simulations inSection III. Section IV discusses the proposed sampled valueestimation algorithm and its testing using PSCAD/EMTDC andMATLAB simulation tools. Section V concludes this paper.

II. IEC 61850-9-2 PROCESS BUS

The salient features of IEC 61850-9-2 process bus and thechallenges related to the process bus performance have beendiscussed in this section.

A. Features of IEC 61850-9-2 Process Bus

As Fig. 1 shows, MU is the key element of the IEC 61850-9-2process bus, which is installed in the switchyard near to theprimary equipments. The merging unit gathers all the informa-tion, such as phase voltages and currents from instrument trans-formers, status information from transducers, etc. from switch-yard equipment. All of the analog signals from CTs/CCVTsare converted to digital, merged into a standard sampled valuepacket format, and finally, synchronized using time stamp. Thissampled value packet is published from the MU to the sub-scribed P&C IEDs over the standardized IEC 61850-9-2 processbus network.

B. Challenges With the Performance of the IEC 61850-9-2Process Bus Communication Network

According to IEC 61850, the acceptable maximum commu-nication delay for the time-critical messages is between 3 to 4ms. This has to be achieved for all of the time-critical messages(e.g., GOOSE and sampled values), independent from the net-work traffic load on the process bus communication network. Toreduce additional time delay caused by TCP/IP (TransmissionControl Protocol/Internet Protocol) layers, GOOSE and sam-pled value messages are directly mapped on the Ethernet linklayer. However, this elimination of TCP/IP layer reduces the re-liability of packet communication [13], [14]. Therefore, to en-hance the transmission reliability of GOOSE, the same GOOSE

Fig. 1. IEC 61850-9-2 process bus concept.

message is repeated several times according to IEC 61850-8-1.GOOSE is event triggered and generally sent few times in asecond to the network; whereas, sampled value messages aretime triggered and transmitted at the rate of sampling frequency.Thus, the same sampled value message is not repeated, whichreduces transmission reliability of sampled value messages overthe process bus. Although the priority tagging along with vir-tual local-area network (VLAN) will be provided to the sam-pled value packets, this does not ensure the determinism of com-munication delays and packet loss on the network during worstcase conditions [18]. Therefore, this paper focuses on the perfor-mance of time critical IEC 61850-9-2 sampled value messages(or packets).

III. PERFORMANCE EVALUATION OF IEC 61850-9-2 PROCESS

BUS WITH DETAILED MODELING IN OPNET

The performance analysis of the IEC 61850-9-2 process buswith dynamic modeling has been detailed in this section.

A. Detailed Modeling of Process Bus Using OPNET

This subsection describes the modeling of process bus de-vices, communication protocols, packet format, traffic flows,etc. in compliance with IEC 61850.

1) Packet Format for Sampled Values: The modeling of thestandard sampled value packet using the OPNET packet editorhas been illustrated in Fig. 2.

The sampled values of three-phase-and-neutral voltages andcurrents (i.e., eight signals) are merged in the application pro-tocol data unit (APDU) at the MUs. More details of the afore-mentioned sampled value Ethernet packet can be obtained in [3]and [4].

2) VLANs and Priority Tagging: IEC 61850-9-2 recom-mends the implementation of VLAN and priority taggingbased on IEEE 802.1Q to achieve the QoS for the time criticalmessages. Therefore, the tag protocol identifier (TPID) and tagcontrol information (TCI) packet fields, as shown in Fig. 2, havebeen incorporated in compliance with IEEE 802.1Q with thehelp of process editor of the OPNET. The user priority bits into

KANABAR AND SIDHU: IEC 61850-9-2 PROCESS BUS AND CORRECTIVE MEASURE 727

Fig. 2. Sampled value Ethernet packet format in OPNET.

the TCI packet field are set such a way that time-critical mes-sages (e.g., SVs and GOOSE) have highest priority; whereasless time-critical file transfer messages have lower priorities.

3) P&C IED and MU Models: The P&C IEDs as well asmerging units are designed per the IEC 61850 proposed commu-nication stack based on open systems interconnection (OSI)-7layers [1]. The dynamic model of P&C IED is designed to re-ceive the sampled value packets from the corresponding MUsfor the protection; and also to send GOOSE messages to thecorresponding MUs as well as other P&C IEDs. The developedmodel of MU in OPNET has the capability to communicate inbidirectional mode based on IEC 61850-9-2 [3]. Furthermore,the detailed programming has been carried out in order to in-corporate IEC 61850 packet identification algorithm at the datalink layers, and bit error correction mechanism at transceiverports, for both the models (i.e., P&C IED and MU).

4) Ethernet Switch (ESW) Model: The dynamic model of aEthernet switch with ten fiber-optic ports has been developedfor full duplex communication at the rates of 10 Mb/s and 100Mb/s. Fig. 3 shows the simplified diagram of two port Ethernetswitch to discuss the working of the modeled ESW. Each re-ceived packet is checked for data integrity (bit errors) at the re-ceiving port, and then the packet is sent to the central processingmodule. Processor reads the destination address and sends thepacket to the corresponding output port according to the packetservice rate. Finally, at the output port, the packet is queued intothe ESW buffer according to the priority tagged on the packet.Packets are transmitted to the network from the output porttransmitter base on the priority level of the queue, i.e. highestpriority queue emptied first according to IEEE 802.1p priority(which is part of TCI field of IEEE 802.1Q standard).

5) Communication Links and Ports: For the process bus, op-tical-fiber-based communication is more preferable, due to itsEMI immunity feature. Therefore, two full duplex fiber-opticcommunication links with ports at the data rates of 10 Mb/s and100 Mb/s have been considered for process bus communication.

6) Traffic Modeling for Process Bus: Three different typesof traffic models have been configured in compliance with IEC61850 for process bus application: 1) high priority event trig-gered GOOSE messages; 2) high priority periodic (time trig-gered according to sampling rate) raw data-sampled value mes-

Fig. 3. Ethernet switch node model in OPNET.

Fig. 4. Typical 345 kV/230 kV transmission substation layout.

sages; and 3) low priority background traffics (i.e., event trig-gered client-server applications among the IEDs).

B. Simulation of IEC 61850-9-2 Process Bus Using OPNET

Fig. 4 shows a typical 345/230 kV transmission substationconsidered for the analysis. This substation has total 20 CTsand 8 VTs for the protection and control of total eight substa-tion bays. Furthermore, it has been considered that one mergingunit can be configured with 8 analog signals from 2 three-phaseinstrument transformers (CTs/CCVTs), and also with one cir-cuit breaker. Therefore, there will be need of total 14 MUs intothe switchyard for this substation. The assignment of primaryequipment signals to the particular MU is illustrated in Fig. 4.

Fig. 5 shows a dynamic Ethernet switch based process buscommunication network simulated for 345/230 kV substation


Fig. 5. Process bus network for the sample substation simulated in OPNET.

depicted in Fig. 4. According to number of IEDs and MUs,total four 10-port Ethernet switches have been configured in ringarchitecture, which is one of the practical substation automa-tion architecture [19]. The process bus configuration of total8 bays with corresponding MUs has been tabulated in Fig. 5.To achieve the better traffic load distribution by separating thebroadcast domains, A total of eight VLANs has been config-ured for this network (i.e., each protection bay has the separateVLAN including two P&C IEDs for protection-A and B, andcorresponding MUs).

C. Results and Discussion

The performance of this process bus network has been an-alyzed using various parameters, and the impacts of all theseparameters have been observed from the packet delay and lossof sampled value packets. To study the impact of each param-eter separately, one of the parameter has been varied within thecommercially available range, by keeping other parameters toits nominal values, as tabulated in Table I.

The performance of sampled values has been analyzed forLine-3 P&C IEDs, which have corresponding MUs connected tothe same Ethernet switch; and Bus-1 P&C IEDs, which requiresampled values from remote MUs connected to other Ethernetswitches.

1) Impact of Communication Link Data Rate and MU Sam-pling Rate: The most likely used data rates for substation com-munication links are 10 Mb/s and 100 Mb/s; and sampling fre-quencies are 1920 Hz and 4800 Hz. The remaining parameters

are considered the same as shown in Table I. It can be observedfrom Table II that sampled value packet delays are high for the10 Mb/s network, whereas packet delays for the 100 Mb/s net-work are within the allowable range.

Moreover, as the sampling rate increases from 1920 Hz to4800 Hz, the sampled value packet traffic increases and hence itcauses more sampled value packet delays and average consecu-tive packet loss per second.

2) Impact of BER of the Communication Channel: It can beperceived from Table III that the BER of the communicationchannel has more of an impact on the average number of con-secutive sampled value packet loss per second and almost neg-ligible impact on the packet delays. This is due to the fact thatif the received sampled value packet has higher bit errors evenafter bit-error corrections, the received packet is rejected at thereceiver itself; however, this process has a negligible impact onpacket delays.

3) Impact of Process Bus Background Traffic: It can be dis-covered from Table IV that as background traffic (client/serverapplication packets) increases from 250 kB/s (kilobytes persecond) to 350 kB/s, the sampled value packet delay as well asaverage number of consecutive packet loss per second wouldincrease, even though the sampled value packets have higherpriorities compared to client/server applications. This is due tothe fact that if the transmission of large client/server packet willstart (in absence of higher priority packet in buffer); a higherpriority packet has to wait in queue until this large packet istransmitted [18].


TABLE IPARAMETERS FOR OPNET SIMULATION

TABLE IIIMPACT OF DATA AND SAMPLING RATES

TABLE IIIIMPACT OF COMMUNICATION CHANNEL BER

4) Impact of Ethernet Switch Buffer Size and Packet ServiceRate: Due to the “store and forward” mechanism, packets arealways stored into the buffer first, and then forwarded. There-fore, as buffer size reduces from 2 Mb to 0.5 Mb, the sam-pled value packet delay increases, however, it has negligibleimpact on sampled value packet loss as shown in Table V. Fur-thermore, as Ethernet switch packet service rate decreases from0.5 Mp/s (mega packets per second) to 0.15 Mp/s, the sam-pled value packet delay is more affected because sampled valuepackets have to wait more, before they are forwarded to the cor-responding output port. The slow rate of packet service rate does

TABLE IVIMPACT OF BACKGROUND TRAFFIC

TABLE VIMPACT OF ESW BUFFER SIZE

not cause overflow of any buffer, and hence it has little impacton sampled value packet loss, as shown in Table VI.

It is also important to note that these results would changeaccording to the size of a substation, and it may be even worsefor a larger process bus communication network with the samecommunication parameters. Therefore, the possible correctivemeasures have to be taken in order to accommodate the sampledvalue packet delay and loss.

D. Corrective Measures for Process Bus Digital Relaying

Traditional digital relaying algorithms have been working sat-isfactorily using analog signals between bay level and processlevel over the copper wires. The performance of these robustdigital relaying algorithms should not be affected by the imple-mentation of IEC 61850-9-2 based digital process bus in anypossible worst case scenarios. Hence, there is a need for somekind of corrective measures which can compensate the sampledvalue packets delay and loss, as demonstrated in this section.One of the methods is to use adaptive filtering, as discussedin [17]. However, the proposed adaptive filtering is based onphasor estimation using least error square (LES) and hence, itis limited to those digital relaying algorithms which use LES;and also only feasible for one sampled value loss. The major re-quirements for any corrective measure are as follows:

1) The algorithm should be able to work for almost all ofthe digital relaying algorithms, regardless of the type oftechnique (e.g., frequency based or time based).

2) It is simple and easy to implement into the P&C IEDs withfewer computations.

3) It is accurate even for a few consecutive sampled valuespacket loss.

The SV estimation algorithm to enhance process bus perfor-mance by meeting almost all aforementioned requirements isexplained in the following section.


TABLE VIIMPACT OF ESW PACKET SERVICE RATE

Fig. 6. Sampled values for the second-order SV estimation technique: Scenario(a): next samples are not available. Scenario (b): only one next sample is avail-able. Scenario (c): two next samples are available.

IV. SAMPLED VALUE (SV) ESTIMATION ALGORITHM FOR

DIGITAL PROCESS BUS BASED PROTECTION FUNCTIONS

This section explains the sampled value estimation tech-niques, and SV estimation algorithm as a one of the correctivemeasures for sampled value lost or delay.

A. Sampled Value Estimation Technique

There are several numerical methods available for the estima-tion (e.g., polynomial approximation, spline techniques, curvefitting, etc. [20]). However, implementations of any of thesecomplex numerical methods require additional computationalcapability. This paper provides the coefficients for estimationtechniques using the Lagrange polynomial method, which iseasy to implement compared to other available methods, and isapplicable to any digital relaying algorithm.

According to Lagrange polynomial method, a unique poly-nomial of degree can be obtained from the given

distinct sampled values. SV estimation techniques utilizethis polynomial function to estimate the lost or delayed sampledvalues at a given time , as shown

(1)

(2)

(3)

where is the estimated sampled value at th instant,is the coefficient of n-order polynomial at the th instant, isthe sampled value at the th instant, and is the time at the thinstant.

Using these equations, the second-order SV estimation tech-nique has been explained as follows. The second-order polyno-mial (i.e., as shown in (4)) can be used to estimate the lostor delayed sampled value by selecting three appropriate knownsampled values , , and for a given set of stored coeffi-cients , , and

(4)

where

The set of second-order SV estimation technique coefficientsneeds to be derived by considering all of the ap-

propriate scenarios. As demonstrated in Fig. 6, there are a totalof three possible scenarios for the second-order SV estimationtechnique: 1) next samples have not been arrived (set-1); 2) nextone sample at has been arrived (set-2); and 3) followingtwo samples at and have been arrived (set-3). Threesets of coefficients corresponding to each scenario of Fig. 6can be obtained for second-order SV estimation, as tabulatedin Table VII.

A sample procedure to derive these coefficients is demon-strated in the Appendix. All different sets of coefficients for first-and third-order SV estimation techniques have been tabulated inthe Appendix. The sets of coefficients for the desired order ofSV estimation techniques can be derived by following the sameprocedure.

B. Proposed Sampled Value Estimation Algorithm

Fig. 7 shows the flow diagram of the second-order SV esti-mation algorithm—it starts with the loop when the processorof P&C IED is expecting the sampled value packet for the cor-responding MU at the th instant. If the sampled value packetarrives, it will be stored into the buffer and traditional digitalrelaying algorithms will use it from the buffer. However, if thesampled value packet does not arrive, IED supposed to wait forshort duration (i.e., ). The value of can be set aroundtwo to three sampling intervals (i.e., 0.417 ms to 0.625 ms for4800 Hz sampling frequency). Even after waiting, if sampledvalue packet does not arrive, SV estimation will be initiated,and check for the conditions whether next samples have beenarrived or not. According to the availability of next samples, theset of coefficients ( , , and ) will be selected fromTable VII, and the assignment of corresponding sampled valuesto the will be done accordingly. The selection of thesevalues in the algorithm has been carried out in order to minimizethe estimation error. These selected values ( , , , ,and , ) will be used in (4) to solve for . The counter


TABLE VIISETS OF COEFFICIENTS FOR THE SECOND-ORDER SV ESTIMATION METHOD

count calculates the total number of consecutive sampled valuepackets lost or delayed.

The utilization of the estimated sampled value for the con-secutive packet loss should be within some limit (max. count).Therefore, if the number of consecutive packet lost is higherthan max. count, IED should ALARM the condition, as thismay be due to failure of communication link, Ethernet switch,merging unit, or any damage in process bus LAN network. Fur-thermore, the value of max. count is also depend upon the re-quired estimation accuracy, which is explained in following sub-section. Finally, if the consecutive SV estimation is less than themax. count, it will store the estimated value into the sampledvalue buffer, so that traditional digital relaying algorithm canutilize this value. If delayed sample value packets arrive at anytime, the estimated sampled value should be replaced with thearrived actual value into the buffer. Moreover, if protection isexecuted at every few sets of sampling interval, this estimationprocedure should also be carried out with same set of samplinginterval in order to achieve higher estimation accuracy by uti-lizing the latest sampled values.

It can be noticed that SV estimation algorithm can be imple-mented to work with any traditional digital relaying algorithmfrom any IED manufacturer. Furthermore, it is comparativelyeasy to implement into the IEDs and requires very less compu-tations and memory space. Fig. 7 shows SV estimation usingsecond order estimation technique, however, the same conceptof SV estimation algorithm can be applied to any order SV es-timation techniques by including the corresponding sets of co-efficients and known sampled values.

C. Results and Discussion

To analyze the overall performance of SV estimation algo-rithm, a typical 345 kV/230 kV substation (as shown in Fig.4) has been simulated using PSCAD/EMTDC simulation tool.The proposed SV estimation algorithms for the substation P&CIEDs have been developed using MATLAB simulation tool. TheCOMTRADE recorder in PSCAD/EMTDC resembles the func-tion of MU at process level, as it samples the analog signalcollected from the secondary of CTs/CCVTs. The MATLABextracts the sampled value streams of each signal from corre-sponding COMTRADE file. The MATLAB code has also beendeveloped to incorporate various sampled value lost and delayedscenarios obtained from the OPNET. It can be observed fromTables II–VI that the maximum number of SV packet loss oc-curred is 6 and sampled value packet delay varies between 16

Fig. 7. Flow diagram of the proposed second–order SV estimation algorithm.

ms to 26 ms. Therefore, in order to analyze the worst case sce-nario, up to 10 simultaneous sampled values packet loss havebeen examined coinciding with the time of fault inception (A-Gfault created at in line-3 of the Fig. 4). This worst case scenario(up to 10 simultaneous SV packets lost coinciding with the timeof fault inception) has been examined on A-phase CT secondarycurrent by considering various source impedance ratios (SIRs),point-on-wave (POW) for faults, noise level in the signal, sam-pling frequency, and different instances on the wave. For allthese different scenarios, the maximum absolute errors in esti-mating simultaneous SV lost from first, second, and third orderSV estimation algorithms have been compared with the actualvalues, which is the maximum absolute error incurred withoutSV estimation algorithm.

1) Effect of SIR of the System and POW of the Fault:Table VIII shows the comparison of maximum absolute error in


TABLE VIIIEFFECT OF VARIOUS SIRS AND POW

CT secondary current with different SV estimation algorithmsand the actual values of the lost samples (or the maximumabsolute error incurred without SV estimation algorithms) forvarious system SIR and fault POW by considering differentnumber of sampled values lost at the fault inception. ThePOW at zero, mid and peak refers to the points at 0 , 45 , and90 , respectively, on the A-phase voltage. It can be observedfrom the table that for the overall maximum absolute error of14.806 A, the second order SV estimation technique estimatesthe sampled values with maximum absolute error of 0.9541A(6.5%), whereas, first order and third order techniques haveerror of 2.179A (14.71%) and 3.617 A (24.43%), respectively.Although the maximum absolute error for first-, second-, andthird-order techniques varies with SIRs and POW, these max-imum sampled value estimation errors are considerably lesscompared to the error incurred without estimating the sampledvalues (i.e. actual value of the lost sample).

2) Effect of Noise Into the Power Signal: It is also importantto examine the effect of possible noise levels present into thereceived sampled values. Fig. 8 presents the maximum estima-tion error incurred from the SV estimation algorithms and com-pares with the maximum absolute error without estimating SVs.for different signal-to-noise ratios (SNRs) in dB. It can be seenfrom the figure that even for 10 consecutive sampled values lostwith 40 dB SNR, the maximum absolute error without sampledvalue estimation is 9.466 A; whereas, the maximum percentageerrors from first-, second-, and third-order estimation techniquesare 16.11%, 6%, and 0.7%, respectively.

Fig. 8. Effect of different noise levels (SNR).

TABLE IXEFFECT OF VARIOUS SAMPLING FREQUENCIES

If further higher levels of noise are expected, using a spe-cific filter to attenuate the noise before the SV estimation isrecommended.

3) Effect of Sampling Frequency: The effect of different sam-pling rate of the MUs on the proposed estimation algorithm for1920 Hz and 4800 Hz has been tabulated in Table IX. The tabu-lated result shows that for 1920 Hz sampling frequency with 10consecutive sampled value lost, the first, second and third orderestimation techniques have maximum estimation error as highas 27%, 21%, and 8%, respectively. Whereas, for the 4800 Hzsampling frequency, the maximum absolute error using first-,second-, and third-order estimation techniques are 15%, 2.5%,and 9%, respectively. Therefore, it is recommended that the al-lowable maximum number of sampled values for the estimationshould be selected based on sampling frequency too.

4) Effect of Sampled Lost Instance on the Wave: Fig. 9 showsthe different instances considered to calculate maximum abso-lute error incurred by using the SV estimation technique.

Fig. 10 shows that maximum absolute error incurred dueto sampled values lost also depends upon the actual value ofthe signal at a particular instant. The estimated sampled valuesusing second- and third-order SV estimation techniques havelow maximum absolute error compared to the first order for 10consecutive sampled value loss.


Fig. 9. Sampled value lost at different instances during the fault.

Fig. 10. Effect of different instances on the wave.

The aforementioned tabulated results from various scenariosshow that the accuracy of the estimated sampled value does notalways improve with the higher order of the SV estimation tech-niques in all cases. This is due to the nonlinear characteristic ofvoltage and current signals with decaying dc component and/ornoise at the time of fault inception. If more accuracy is requiredor a large number of consequent sampled value packet loss isexpected, the higher order or other more complex estimationtechniques, such as spline, curve fitting, etc. have to be used byadding more processing power.

V. CONCLUSION

The performance of IEC 61850-9-2 process bus has beenevaluated for Ethernet switched ring architecture of a typical345 kV/230 kV substation. Using the OPNET simulationtool, the dynamic models of IEC 61850-based process busdevices and communication protocols have been developed toanalyze the delay and packet loss for the sampled value packetsby considering various communication parameters, such asspeed of the communication data link, sampling frequencyof the merging units, network background traffic, Ethernetswitch buffer size, packet services rate, and the communicationchannel bit error rate. It has been demonstrated that theseprocess bus parameters have influence on the sampled value

packet loss and maximum delays. For this particular processbus network, the observed maximum sampled value delay is upto 26 ms; whereas, the average number of consecutive sampledvalue lost per second are 6. In order to alleviate the impact oflost and delayed sampled values on digital relay algorithms,the corrective measure, i.e. sampled value estimation tech-niques have also been presented in this paper. Using these SVestimation techniques, this paper proposes the SV estimationalgorithm with the sets of coefficients. To examine the accuracyof the proposed SV estimation algorithm, same 345 kV/230kV substation has been simulated in PSCAD/EMTDC and thesampled value estimation algorithm has been programmed inMATLAB, for the various scenarios, such as system SIRs, faultPOW, noise levels in the received signal, and instances on thewave. Moreover, the rare worst case scenarios have been pre-sented by considering up to 10 consecutive sampled values lost,coinciding with the fault inception. For various SIRs and POWscenario, the maximum estimation errors are 8.5%, 7.6%, and3.2% incurred to estimate up to 5 consecutive sampled valueslost or delayed of the maximum actual value using first, second,and third order SV estimation techniques respectively. In caseof different noise levels, the maximum absolute errors fromfirst, second and third order SV estimation are 7%, 5%, and1.1%, respectively, up to 5 consecutive samples lost. Moreover,if the sampling frequency reduces from 4800 Hz to 1920 Hz,the maximum absolute error would increase up to 17% for 5consecutive sampled values lost. For the same scenarios with10 consecutive sampled values lost, the maximum estimationerrors are 25% or more. However, up to 5 consecutive sampledvalues loss at 4800 Hz sampling frequency, the proposedsampled value estimation algorithm not only offers the reason-able accuracy, but also less computational requirements, andcompatibility with any traditional digital relaying algorithm.If even more estimation accuracy is needed, higher order SVestimation techniques or more complex numerical methodscan be implemented using the same concept of SV estimationalgorithm presented here. It is recommended that the correctivemeasure techniques (first order, second order, third order, orany other techniques) should be selected considering requiredestimation accuracy (selectivity constraints) and available pro-cessing capability (speed constraint) for a particular protectionIED.

APPENDIX

COEFFICIENTS OF SV ESTIMATION

Sample procedure to obtain coefficients for second order SVestimation technique as well as coefficients for first and thirdorder SV estimation techniques have been explained in this Ap-pendix. The calculations to derive set-3 coefficients have beenexplained here by referring the Fig. 6(c). For a constant sam-pling frequency , the time difference between any consecu-tive samples will remain same as follows:


TABLE XSETS OF COEFFICIENTS FOR THE FIRST-ORDER SV ESTIMATION METHOD

TABLE XISETS OF COEFFICIENTS FOR THIRD-ORDER SV ESTIMATION METHOD

According to second order SV estimation algorithm, the co-efficients for SV estimations can be wrote in terms of [fromthe Fig. 6(c)], as follows:

The aforementioned obtained coefficients are used for the con-dition when two next sampled values are available, as explainedin Section IV.

The coefficients for first order SV estimation technique using(2) can be written as follows:

With respect to first order SV estimation, there are two pos-sible conditions for the SV lost or delayed: a) next sample at

has not been arrived (set-1); b) next sample at hasbeen arrived (set-2). According to these two scenarios, both co-efficients ( and ) can be obtained as shown in Table X.

The coefficients for third-order SV estimation using (2) canbe derived as follows:

Furthermore, there will be a total of four possibilities for sam-pled value lost, and accordingly, when a total of four sets of co-efficients has been derived, as tabulated in Table XI.

REFERENCES

[1] IEC Standard for Communication Network and Systems in Substations,IEC Std. 61850, 2003–04, 1st ed.

[2] K. P. Brand, V. Lohmann, and W. Wimmer, Substation AutomationHandbook, 1st ed. Switzerland: Utility Automation ConsultingLohmann, 2003, pp. 301–312.

[3] IEC Standard for Communication Network and Systems inSubstations Part-9-2: Specific Communication Service Mapping(SCSM)-Sampled Values over ISO/IEC 8802-3, IEC 61850-9-2,2004, 1st ed.

[4] UCA international users group, Implementation Guidelines for DigitalInterface to Instrument Transformers Using IEC 61850-9-2. Tech. Rep.IEC 61850-9-2LE. [Online]. Available: http://www.tc57wg10.info/downloads/digifspec92ler21040707cb.pdf

[5] B. Kasztenny, D. Mcginn, S. Hodder, D. Ma, J. Mazereeuw, and M.Goraj, “Practical IEC61850-9-2 process bus architecture driven bytopology of the primary equipment,” presented at the CIGRE SessionParis, France, Aug. 2008, paper B5-105.

[6] L. Andersson, K. P. Brand, and D. Fuechsle, “Optimized architecturesfor process bus with IEC 61850-9-2,” presented at the CIGRE SessionParis, France, Aug. 2008, paper B5-101.

[7] L. Hossenlopp, D. Tholomier, D. P. Bui, and D. Chartrefou,“Process bus: Experience and impact on future system architectures,”presented at the CIGRE Session, Paris, France, Aug. 2008, paperB5-104.

[8] T. Schaeffler, H. Bauer, W. Fischer, D. Gebhardt, J. Glock, C. Hoga,R. Kutzner, U. Nolte, W. Steingraeber, F. Steinhauser, T. Stirl, andK. Viereck, “Process communication in switchgear according toIEC 61850-architectures and application examples,” presented at theCIGRE Session Paris, France, Aug. 2008, paper B5-106.

[9] B. Kasztenny, J. Whatley, E. A. Udren, J. Burger, D. Finney, and M.Adamiak, “Unanswered questions about IEC 61850—What needs tohappen to realize the vision?,” presented at the 32nd Annual WesternProtective Relay Conf. Spokane, WA, Oct. 2005.

[10] T. S. Sidhu, M. G. Kanabar, and P. P. Parikh, “Implementation issueswith IEC 61850 based substation automation systems,” presented at theNational Power System Conf Mumbai, India, Dec. 2008.

[11] M. G. Kanabar and T. S. Sidhu, “Reliability and availability analysis ofIEC 61850 based substation communication architectures,” presentedat the IEEE Power Eng. Soc. General Meeting Calgary, AB, Canada,Jul. 2009.

[12] L. Andersson, K. P. Brand, C. Brunner, and W. Wimmer, “Reliabilityinvestigations for SA communication architectures based on IEC61850,” presented at the IEEE Power Tech. St. Petersburg, Russia,Aug. 2005.

[13] C. E. Spurgeon, Ethernet: The Definitive Guide. Sebastopol, CA:OReilly, 2000.

[14] W. Stallings, Local and Metropolitan Area Networks, 5th ed. Engle-wood Cliffs, NJ: Prentice-Hall, 1997.

[15] OPNET Modeler—OPNET Technologies Inc. [Online]. Available:http://www.OPNET.com

[16] T. S. Sidhu and Y. Yin, “Modelling and simulation for performanceevaluation of IEC 61850 based substation communication systems,”IEEE Trans. Power Del., vol. 22, no. 3, pp. 1482–1489,Jul. 2007.

[17] E. Demeter, T. S. Sidhu, and S. O. Faried, “An open system approach topower system protection and control integration,” IEEE Trans. PowerDel., vol. 21, no. 1, pp. 30–37, Jan. 2006.

[18] J.-D. Decotignie, “Ethernet-based real-time and industrial communica-tions,” Proc. IEEE, vol. 93, no. 6, pp. 1102–1117, Jun. 2005.

[19] IEEE PSRC H6 Working Group, Application consideration of IEC61850/UCA2 for substation ethernet local area network communica-tion for protection and control May 2005, Tech. Rep.

[20] M. J. Maron and R. J. Lopez, Numerical Analysis: A Practical Ap-proach, 3rd ed. Belmont, CA: Wadsworth, 1991.


Mitalkumar G. Kanabar (S’05) received the B.E.degree from Sardar Patel University, Gujarat, India,in 2003, the M.Tech. degree from the Indian Insti-tute of Technology (IIT) Bombay, Mumbai, India, in2007, and is currently pursuing the Ph.D. degree inelectrical and computer engineering at the Universityof Western Ontario, London, ON, Canada.

His research areas include power system pro-tection, control and automation, implementationof the IEC 61850 standard, and communicationapplications for smart grid; and grid integration

issues with distributed energy resources.

Tarlochan S. Sidhu (M’90–SM’94–F’04) receivedthe B.E. (Hons.) degree from the Punjabi University,Patiala, India, in 1979 and the M.Sc. and Ph.D. de-grees from the University of Saskatchewan, Saska-toon, SK, Canada, in 1985 and 1989, respectively.

He was with the Regional Computer Center,Chandigarh, India; Punjab State Electricity Board,India; and Bell-Northern Research Ltd., Ottawa,ON, Canada. From 1990 to 2002, he was with theDepartment of Electrical Engineering, Universityof Saskatchewan, where he was Professor and

Graduate Chairman of the Department. Currently, he is Professor and Chairof the Electrical and Computer Engineering Department at the University ofWestern Ontario, London. He is also the Hydro One Chair in Power SystemsEngineering. His research interests are power system protection, monitoring,control, and automation.

Dr. Sidhu is a Fellow of the Institution of Engineers (India) and a Fellow ofthe Institution of Electrical Engineer (U.K.). He is also a Registered ProfessionalEngineer in the Province of Ontario and a Chartered Engineer in the U.K.

iec 61850-1

Documents

performance of iec

communication of time

substation protection

performance of time

critical messages

kv230 kv substation

sampled values svs

communication protocol