hwk2_sol

8/7/2019 HWK2_Sol

http://slidepdf.com/reader/full/hwk2sol 1/3

ECE 346 Homework – Non-volatile Memory

Due: Monday April 18, 2011

The 2864 family of memory circuits are 8Kx8 (i.e., 8K bytes) of non-volatile (NV, i.e.,

the memory stays even if the power is removed) read/write memory. Unlike the 2764,which is read-only, the 2864 circuits can be written to by the processor.

Suppose we have an application that requires 12K bytes of program (more than will fit onone 2864) but also requires 4K bytes of non-volatile writeable data. The non-volatile

data bytes will hold user-changeable data such as passwords and preferences. A pair of

2864 memory circuits would provide enough memory for both the 12K bytes of program

and 4K bytes of non-volatile writeable data space.

Recall that the pins of a 2864 circuit are:

• A0-A12 13 address pins

•D0-D7 8 data pins

• /CE chip enable

• /OE output enable

• /WR write

• GND, +5V power

a. The two memories are to occupy the first 16K bytes of address space. The program

part should occupy bytes 0-(12K-1) of program space, and the non-volatile data area

should occupy bytes 12K-(16K-1). Write out the beginning and ending addresses for each of these areas in both HEX and BINARY format.

HEX BINARYfirst program byte address 0000H 0000 0000 0000 0000last program byte address 2FFFH 0010 1111 1111 1111

first data byte address 3000H 0011 0000 0000 0000last data byte address 3FFFH 0011 1111 1111 1111

b. Suppose we want to be very conservative and make sure that each 2864 is enabledonly when it is being accessed, i.e., when the 16-bit address falls within the

corresponding range. What 8051 pins you would use, and how to meet this requirement?

Write equations for the two chip enables in terms of 8051 signals:

/CE memory 0 = A13 or A14 or A15 or /PSEN to /CE

/CE memory 1 = /A13 or A14 or A15 to /CE

The A14 and A15 are needed to remove aliasing and to deactivate the memory

when not in use.

8/7/2019 HWK2_Sol


c. Memory 0 (the first 8K bytes) contains only program. Write equations for /OEand /WR for this 2864 circuit in terms of 8051 signals?

/OE = /PSEN

/WR = +Vcc

d. Memory 1 (bytes 8K to (16K-1)) contains program bytes in the first 4K and read/write

data in the last 4K. We want to be very safe and guarantee that the processor can'taccidentally write to one of the program bytes (thereby changing the program. Write

equations for /OE and /WR for this 2864 circuit in terms of 8051 signals?

/OE = /PSEN or /RD

/WR = A12 and A13 and /WR

e. The non-volatile data memory was specified to be at addresses 12K-(16K-1). Do you

think it is possible to arrange for this data memory to be at addresses 0-(4K-1) and havethe program addresses be 0-(12K-1)? If yes, explain how. If no, explain why not.

Yes. It is possible we have to map 12k-16k-1 to 0-4k-1 when we want to access the datamemory.

/CE of 0= A13 or A14 or A15 or /PSEN/CE of 1= { (/(/PSEN and A13)) or A14 or A15} or {(nor of A12-A15) and (/(/PSEN))}

/OE of 0=/PSEN

/OE of 1=/RD

/WR of 0= +Vcc

/WR of 1= /WR

This concept should be used to map the virtual data address to real physical address.

The input to the address pins of 2864 should be such:

A12 of 8051 or /PSENA12 of 2864

A13 of 8051 or /PSENA13 of 2864

8/7/2019 HWK2_Sol


For this particular question me and Rushi got together to solve it. So it is a joint effort.

hwk2_sol

Documents