huffman encoder activity report 2 advisor:dr.goudarzi advanced topics in design hardware january...
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Huffman Encoder
Activity Report 2
Advisor:Dr.Goudarzi
Advanced topics in design hardware
January 2006
What is the aim?
Implement an embedded system both in hardware and software (Codesign)
Tools to be used : EDK as a platform to evolve a complete system in hardware and software simoultaineusly
Hardware language:VHDL,Verilog Software language:C Simulation:Modelsim
Project phases:
Think up your system in top level
Hardware/Software partitioning
Choosing an optimal algorithm
Using EDK
Behavorial simulation using Modelsim
Algorithm
Almost 15 source codes for Huffman algorithm were investigated but most of them weren’t optimized for hardware implementation
Writing the code from scratch was our final decision
Using a simple static huffman instead of the dynamic one
Data Compression Classification:
• Lossy vs Lossless
• Fixed vs Variable Length
Huffman encoding:A Brief Overview
Lossy vs Lossless:
Lossy
CS & Q
MPEG
JPEG
Lossless
Huffman
LZW
Delta
Fixed vs Variable:
Method Input Output
CS & Q fixed fixed
Huffman Fixed variable
Arithmetic variable variable
LZW variable fixed
Binary trees* can be used in an interesting way to construct minimal
length encodings for messages when the frequency of letters used
in the messages is known.
A special kind of binary tree, called a Huffman coding
tree is used to accomplish this.
*Binary tree is a tree that each node has 2 children
To build the Huffman tree :
1.sort the frequencies into increasing order.
2.choose the two smallest values.
3.construct a binary tree with labeled edges.
4. replace the two smallest values with their sum.
5. getting a new sequence
6. again take the two smallest values and construct a labeled
binary tree.
7.Go to step 2 until remain no letter.
8.Finish!
E 29
I 5
N 7
P 12
S 4
T 8
Example :letters Frequency
Smallest value
4+5=9 new sequence:(7, 8, 9, 12, 29). (N ,T,IS, P, E)
Smallest value
(9, 12,15, 29)
(IS, P,NT, E)
Smallest value
(15, 21, 29)
(NT,ISP,E)
Smallest value
(29 , 36 )
(E,INPST)
Last Combination
(36,29)
E 1
I 0110
P 010
N 000
S 0111
T 001
Result !
SENT
0111 1 000 001
PREFIX coding
As soon as a 1 is read, you know it is an E.
0110 is an I.
you do not need to see any more bits.
When a 01 is seen, it is either I or P or S, etc.
NOTE:it does not make any difference which one is placed as the left subtree and which in the right subtree.
We had 6 letters so we need 3 bitsfor each letter in normal coding.
If the entire message is 65 characters long so 3*65=195 bits
to code it but if we use “Huffman” the message require:
1*29+4*5+3*12+3*7+4*4+3*8=146 bits.
We save 100-(146/195)*100=25% of our memory!
Project phases:
Hardware/Software partitioning
Decide which parts to
implement in software and what parts in
hardware
Think up your system in top level
Using EDK
Behavorial simulation using ModelSim
Hardware/software partitioning:
Design includes a powerpc core The Encoder is attached to the on-chip
peripheral Bus(OPB) Data stored in two RAMs attached to the
OPB
PPCPPC
RAM1 RAM2 Huff Enc
OPB
PLBBRAM
Hardware/software partitioning:
Hardware: Create the binary code
Add character to the tree Update the tree
Software: Reset the hardware Read character from RAM1 Send character to hardware Read binary code from hardware Write compressed binary code to
RAM2
Project phases:
Using EDK Hardware/Software partitioning
Think up your system in top level
Behavorial simulation using ModelSim
Embedded Processor Design:
Hardware components (e.g. IO devices ,timers,…)
Memory Map Software Applications (hardware drivers ,ISR,
…)
Embedded DevelopmentTool Flow Overview
Data2MEM
Bitstream
Compiler/Linker
(Simulator)
C Code
Debugger
Standard Embedded SWDevelopment Flow
CPU code in on-chip memory
?CPU code in
off-chip memory
Download to Board & FPGA
Object Code
Standard FPGA HWDevelopment Flow
Synthesizer
Place & Route
Simulator
VHDL/Verilog
?
Download to FPGA
PPC:
PowerPC405 Core
Dedicated Hard IPFlexible Soft IP
RocketIO
DCR Bus
UART GPIOOn-Chip
PeripheralHi-Speed
PeripheralGB
E-Net
e.g.Memory
Controller
Arb
iter
On-Chip Peripheral Bus
OPB
Arb
iter
Processor Local Bus
Instruction Data
PLB
DSOCMBRAM
ISOCMBRAM
BusBridge
IBM CoreConnect™on-chip bus standardPLB, OPB, and DCR
PPC Memory Map:
0x0000_0000
0xFFFF_0000
0xFFFF_FFFC
Peripherals
PLB/OPB Memory
PLB/OPB Memory
Reset Address
PPC Core:
Thanks for your attention
Maryam.Moghaddas
Arezoo.Erfanifard
We are at the beginningThe project is underway and going on…