
2/12

Basic MOS Operation (2)

>0

With a positive gate bias applied, electrons are pulled toward


the positive gate electrode

Given a large enough bias, the electrons start to "invert" the

surface (pn); a conductive channel forms Magic "threshold voltage" Vt (more later)

EE114 (HO #5)

Basic Operation (3)

>0ID=?

VDS>0


If we now apply a positive drain voltage, current will flow

How can we calculate this current as a function of VGS, VDS?

EE114 (HO #5)


3/12

Assumptions

>0

1) Current is controlled by the mobile charge in the channel. This is a verygood approximation.

2) "Gradual Channel Assumption" - The vertical field sets channel charge,

DS>


so we can approximate the available mobile charge through the voltagedifference between the gate and the channel

3) The last and worst assumption (we will fix it later) is that the carriervelocity is proportional to lateral field ( = E). This is equivalent to Ohm'slaw: velocity (current) is proportional to E-field (voltage)

EE114 (HO #5)

First Order IV Characteristics (1)

What we know:

[ ]tGSoxn VyVVCyQ = )()(

WvQI nD =

Ev =


[ ] WEVyVVCI tGSoxD = )(


4/12

First Order IV Characteristics (2)

dy

ydVE

)(=[ ] WEVyVVCI tGSoxD = )(

[ ] dVVyVVCWdyI tGSoxD = )(

[ ] =DSV

tGSox

L

D dVVyVVCWdyI00

)(

( ) DSDS

tGSoxD VV

VVL

WCI

=2


For VDS

/2 VGS-Vt? VGD = VGS-VDS becomes less than Vt, i.e. no more

channel or "pinch off"

EE114 (HO #5)


5/12

Pinch-Off

VGS +

+VDS

Effective voltage across channel is VGS - Vt

After channel charge goes to 0, there is a high lateral field

N N

y

y=0 y=L

Q (y), V(y)n

Voltage at the end of channel

Is fixed at VGS-Vt


that sweeps the carriers to the drain , and drops the extra

voltage (this is a depletion region of the drain junction)

To first order, current becomes independent of VDS

EE114 (HO #5)

*It is important to remember what a reverse biased PN junction does to minority carriers.Electrons (in the p-type material) get swept back into the n-region

Modified Plot and Equations

Triode Region Act ive

Region

VDS

ID

VGS-Vt

) DS VV

VVW

CI

=Triode Region:


L 2

Act ive Region: ( ) 2)(2

1)(

2

)(tGSoxtGS

tGStGSoxD VV

L

WCVV

VVVV

L

WCI =

=


6/12

First-Order MOS Model Summary

VDS

( )22

1tGSoxD VV

L

WCI

VGS-Vt

SATURATION

TRIODE

DSVW

"VCCS"


Vt VGS

DStGSoxDL

2

Model Limitations (1)

The above equations constitute the most basic MOS IV model

"Long channel model", "quadratic model", "low field model"

' n or una e y s mo e oesn escr e mo ern

accurately

Pushing towards extremely small geometries has resulted in

very high electric fields

Some of the assumptions on slide 5 become invalid

Around VGS=Vt the device physics become very complex, and

our simply derivation also loses accuracy


In EE114, we restrict VGS Vt + 150mV to avoid pit alls due tonon-physical model behavior around this region (more later)

EE114 (HO #5)


7/12

Model Limitations (2)

Key point: We will NOT treat Sub-Threshold behavior

in EE114.

Below Vt current does NOT go to zero. It does

however fall of exponentially with VGS


8/12


9/12

Linear region (small VDS, before Saturation)


IDS

-VDS

Plot -- Effect of KP



10/12

Linear Region and KP Dependence

Comment:

These are TECHNOLOGY

KP= OX

tOX

Parameters. The fab guys

set them and as a designer

you dont mess with them


1tOX

EE114 (HO #5)

Effect of Oxide Thickness on Vt



11/12

Effect of Oxide Thickness on I-V


Summary Comments about Parameters

(can you change it ??)

Design Parameters versus

W (always)

L (most of the time*, yes)

VGS-Vt (always)

Technology Parameters

Vt (only with VBSnot yet!)

tox (never)-->Cox (never)

(never)


KP (neverper above)

*for very advance digital MOS processes if you vary

L it changes Vt. We will IGNORE this effect

EE114 (HO #5)


12/12

P-Channel MOSFET

Sometimes the notation etsVGS

ho5[1].l02 long channel

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