hcmut2009 midterm

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Electrical & Electronic Engineering, Introduction to Computer Engineering

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Page 1: HCMUT2009 Midterm

ECE 190 Midterm Exam HoChiMinh City University of Technology

Monday 6 July 2009

• Be sure your exam booklet has 6 pages (3 sheets). • You have THREE HOURS to complete this exam. • Write your name at the top of each page. • This is a closed book exam. • You may not use a calculator. • You are allowed two handwritten A4 sheets of notes (both sides). • Absolutely no interaction between students is allowed. • Show all of your work. • Be sure to clearly indicate any assumptions that you make. • Don’t panic, and good luck!

• (An LC-3 ISA encoding + RTL chart is included in the test.)

Problem 1 30 points _______________________________ Problem 2 40 points _______________________________ Problem 3 30 points _______________________________ Total 100 points _______________________________

Name: Student ID # :

Page 2: HCMUT2009 Midterm

Name: ____________________________________________ 2

Problem 1 (30 points): Short Answer Part A (6 points): In ten words or less, explain what the following instruction does. 0000 1111 1111 1111 Part B (6 points): Rewrite the following LC-3 code, replacing the use of the indirect (LDI/STI) addressing mode with base+offset (LDR/STR) addressing mode. Provide your answer in the box. LDI R1, LOC ADD R1, R1, #1 STI R1, LOC

HALT LOC .FILL xABCD Part C (6 points): What might happen if a program reads from the Keyboard Data Register without checking the Keyboard Status Register’s ready bit? Part D (6 points): Consider the following code snippet to multiply R0 by R1 using repeated addition (assuming both are positive values). The product is kept in R2. How many instructions are executed when this program is run? Provide your answer in terms of the values of R0 and R1. AND R2, R2, #0 LOOP ADD R2, R2, R1 ADD R0, R0, #-1 BRp LOOP Part E (6 points): Your friend writes a subroutine that sums an array of 2’s complement integers passed to the subroutine on the stack (R6 points to the top). Your friend wants to use -1 to indicate the end of the array. Briefly explain the problem with your friend’s design.

Page 3: HCMUT2009 Midterm

Name: ____________________________________________ 3

Problem 2 (40 points): Interpreting Binary and Assembly Code Part A (15 points): Trace through the execution of the LC-3 program below until it terminates, then fill in the final memory values in the table at the bottom of the page. START LEA R0, OUTPUT ; Load input address AND R2, R2, #0 ; Reset Counter1 OUTERLOOP LEA R1, INPUT ; Load output address AND R3, R3, #0 ; Reset Counter2 AND R4, R4, #0 ; Reset Running Sum INNERLOOP LDR R5, R1, #0 ; Load value ADD R4, R4, R5 ; Update Running Sum NOT R5, R3 ; Compare Counter 1 and Counter 2 AND R5, R5, R2 ; - BRz STORE ; - ADD R3, R3, #1 ; Increment Counter 2 ADD R1, R1, #1 ; Move to next memory location BRnzp INNERLOOP STORE STR R4, R0, #0 ; Store Result ADD R2, R2, #1 ; Increase Counter 1 ADD R0, R0, #1 ; Move to next output memory location ADD R5, R2, #-3 ; Compare R2 with #3 BRz DONE BRnzp OUTERLOOP DONE HALT INPUT .FILL x3 .FILL x7 .FILL x1 .FILL x8 OUTPUT .FILL x0 OUTPUT2 .FILL x1 OUTPUT3 .FILL x2 OUTPUT4 .FILL x3

Memory Location Final Value OUTPUT OUTPUT2 OUTPUT3 OUTPUT4

Part B (5 points): Briefly explain what the program in Part A does.

Page 4: HCMUT2009 Midterm

Name: ____________________________________________ 4

Part C (10 points): The contents of several memory locations are shown below. For each location, write a register transfer language (RTL) statement corresponding to the instruction represented by the contents of that location. For example, the word x907F is “R0 NOT R1” in RTL. I will not grade the RTL syntax, but what you write must convey the action taken by the LC-3 when processing each instruction. Part D (10 points): In 10 words or less, explain what the code in Part C does.

Address Content RTL x3010 x1020

x3011 x0602

x3012 x903F

x3013 x1021

Page 5: HCMUT2009 Midterm

Name: ____________________________________________ 5

Problem 3 (30 points): The von Neumann Model

Memory Address Content Register Value x3000 ADD R1, R3, R5 R0 x0000 x3001 LDI R0, #15 R1 x1111 x3002 BRn #8 R2 x2222

… … R3 x3333 x3010 x0FFF R4 x4444 x3011 x3016 R5 x5555

… … R6 x6666 x3016 x8000 R7 x7777 x3017 x7654 x3018 x4000

Part A (15 points): An LC-3 processor starts with PC=x3000 and memory and registers as shown above. List ALL changes of the MAR during the execution of the next three instructions. Write your answers in hexadecimal. You may not need all of the boxes below. MAR:

Part B (10 points): Show the contents of the register file after the execution of the third instruction. Do NOT leave blank entries; you may write “same” if the contents are not changed by any of the instructions.

Register Value Register Value

R0 R4

R1 R5

R2 R6

R3 R7 Part C (5 points): Show the value of the PC after the execution of the third instruction. PC =

Page 6: HCMUT2009 Midterm

LD

LDI

LDR

LEA

NOT

ST

STI

STR

ADD

ADD

AND

AND

BR

JMP

JSR

TRAP

0001 DR SR1 0 00 SR2

0001 SR1 1

000

imm5

0101 SR1 0 00 SR2

0101 SR1 1 imm5

0000 pzn PCoffset9

1100 BaseR 000000

0100 1

DR

DR

DR

PCoffset11

1111

DR ← SR1 + SR2, Setcc

ADD DR, SR1, SR2

DR ← SR1 + SEXT(imm5), Setcc

ADD DR, SR1, imm5

DR ← SR1 AND SR2, Setcc

DR ← SR1 AND SEXT(imm5), Setcc

AND DR, SR1, SR2

AND DR, SR1, imm5

BR{nzp} PCoffset9

((n AND N) OR (z AND Z) OR (p AND P)):PC ← PC + SEXT(PCoffset9)

JMP BaseR

PC ← BaseR

R7 ← PC, PC ← PC + SEXT(PCoffset11)

JSR PCoffset11

R7 ← PC, PC ← M[ZEXT(trapvect8)]

TRAP trapvect8

0010 PCoffset9DR

1010 PCoffset9DR

0110 offset6

1110 PCoffset9DR

DR BaseR

1001 111111DR SR

0011 PCoffset9SR

1011 PCoffset9SR

0111 offset6SR BaseR

LD DR, PCoffset9

LDI DR, PCoffset9

LDR DR, BaseR, offset6

LEA DR, PCoffset9

NOT DR, SR

ST SR, PCoffset9

DR ← M[PC + SEXT(PCoffset9)], Setcc

DR ← M[M[PC + SEXT(PCoffset9)]], Setcc

DR ← M[BaseR + SEXT(offset6)], Setcc

DR ← PC + SEXT(PCoffset9), Setcc

DR ← NOT SR, Setcc

M[PC + SEXT(PCoffset9)] ← SR

M[M[PC + SEXT(PCoffset9)]] ← SR

M[BaseR + SEXT(offset6)] ← SR

STI SR, PCoffset9

STR SR, BaseR, offset6

NOTES: RTL corresponds to execution (after fetch!); JSRR not shown

0000 trapvect8