h8 brief note

8/10/2019 H8 Brief Note

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A

Very Brief Introduction to

Hitachi H8/3062F

Microcontroller and its

Development Tools


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A very brief introduction to Hitachi H8/3062F and its development tools- Ng BengKiat

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1 Objectives

Familiarisation with the various H8/3062F development tools, resources andsolutions so that you can explore and learn on your own.

2 Overview2.1 Features

32-bit internal architecture with 16-bit general registers H8/300H CPU core with general-purpose register architecture and 16M linear address space Up to 2OMHz clock resulting in 100ns minimum instruction cycle time. 128K FLASH/ 4K RAM Interrupt controller (3 level priority, 7 external and 27 internal interrupts). Bus controller (8 areas with independent bus specification possible) with chip select pins. 3x 16-bit timers 4x 8-bit timers; can be cascaded to 2x 16-bit timer. 16-bit Timing Pattern Controller (TPC). 1 reset-generating watchdog timer 2 channel Serial Communications Interface (SCI) 8 channel 10-bit ADC. 2 channel 8-bit DAC. Up to 70 I/O and 9 input only pins (for single chip modes only). Low Power Modes Include Sleep, Standby, Module standby and clock gearing.

See Appendix B for an internal block diagram of the CPU.

2.2 Choice of various configuration and packaging

HD64F3062F20 FP-100B package, Vcc = 4.5 to 5.5V, 20MHz * (used in Alpha Centre)See Appendix B for a diagram on the pin arrangement of this package.

2.3 CPU

The CPU core is H8/300H, which is used in various other Hitachi microcontrollers. All IO registersare memory mapped and can be easily access though pointers in C language. Hence theres little needto learn the CPU architecture and assembly language as everything can be done through C.

Nevertheless, it is helpful to browse through the Hitachi H83062h Hardware Manual, h83062h.pdf ,and has a general understanding of the CPU architecture.

2.4

IO subsystemsThe 3062f has many on chip IO subsystems, just like any other microcontroller. The IO subsystemsinclude ADC, DAC, timers, serial port, input/output ports, etc. It is recommended that you study thesesubsystems as and when you need them. C functions for some of the common IO subsystemconfigurations are available from my website.


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File extension notations.

c C program h C include file src assembly language program inc assembly include file

The various files in this template project are: dbsct.c data structure for the various data section hwsetup.c function for hardware setup; called from resetprg.c intprg.src dummy interrupt routines lowsrc.c, lowsrc.h serial IO stream routines main.c, main.h C main program. Your code should start here. resetprg.c C startup program ( reset routine )

sbrk.c, sbrk.h miscellaneous routines vecttbl.src, vect.inc for interrupt vector table cl3062f.h include file for some C utility functions iodefine.h structure and pointer declaration for on chip IO stacksct.h stack size declaration

You might need to modify hwsetup.c if your hardware configuration is different. For example, if your RAM bus width is 8 bit wide or your RAM is located on a different chip select output.It is advisable that you place your C functions into new C files. To add a new file, from the menu,select Project->Add Files...

Fig 2.2.2 A typical HEW session


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3.2.3 Building your project

There are various ways to compile and link your project files. From the menu, select Build->Build File - to compile or assemble current file Build->Build to build project. Files that are changed will be compiled/assembled followed by

linking. Build->Build All compile and assemble all files followed by linking.

There are two build configurations provided in MyProj . They are flash and Release . Theflash configuration is used to build the project when you want to flash your program. Use therelease configuration when building programs suitable for running from RAM. To select theconfiguration, select from the menu Options->Build Configurations.. . After selecting theconfiguration, remember to do a build.

3.3 FDT

The Hitachi Flash Development Toolkit (FDT) is used to download your S-Record program into theon chip flash. The flash is guaranteed for only 100 writes. Hence for development, it is advisable todownload the program into RAM for testing. Only when the program is finalized should you put your

program in flash.

You may install the FDT by executing FDT15.EXE

The FDT manual is in fdt_man.pdf

Host Computer

FDT flash

3062f RAM Microcontroller Board

RS232

Figure 3.3 Flashing the 3062f with FDT

File.mot


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3.3.1 Flash procedure

The following is the procedure for downloading a S-record format program file that you have built.1) Connect your microcontroller board to the PC using a rs232 cable.2) Set the boards jumper to flash programming mode (boot mode).3) Power on the board and press the reset button4) Run the FDT5) From the menu, select File->Open . Select your s-record file.6) From the menu, select Image->Download Image . Your should get a dialog box as shown in

figure 2.3.1. Make sure you setting is the same except for the COM port, which you set accordingto yours.

7) Pressed the Connect button. A small program required for flashing will be downloaded into theon-chip RAM. The content in the flash will also be erased.

8) Press Download file your_file.mot to device button.9) After downloading, change the microcontroller board jumper to run mode and reset.

Figure 2.3.1 The FDT download image dialog


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3.4 WinH8

The WinH8 is used to download your H8/3062 program into the microcontroller board external RAMfor execution.

To download the last program, press F4 or select D from the toolbar. To download a new program, select Dnew from the toolbar. Use Options from the menu to change the COM port parameters and the terminal display size.

Figure 2.4 WinH8 program

Host Computer

WinH8 flash

3062f RAM Microcontroller Board

RS232

Figure 3.4 Downloading program into RAM with WinH8

File.mot

ProgramLoader


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4 Writing C program with HEW

4.1 Accessing IO registers

IO registers are memory mapped. Hence, we can access them through C pointers. To facilitate IOaccess, a number of structures and pointers have been predefined for all the IO registers in the fileiodefine.h . For example the following C statements in iodefine.h define structure and

pointers useful for accessing port 6.

union un_port1 { /* union PORT1 */ unsigned char BYTE; /* Byte Access */ struct { /* Bit Access */ unsigned char B7:1; /* Bit 7 */ unsigned char B6:1; /* Bit 6 */ unsigned char B5:1; /* Bit 5 */ unsigned char B4:1; /* Bit 4 */ unsigned char B3:1; /* Bit 3 */ unsigned char B2:1; /* Bit 2 */ unsigned char B1:1; /* Bit 1 */ unsigned char B0:1; /* Bit 0 */ } BIT; /* */

}; /* */

#define P6DDR (*(volatile union un_port1 *)0xFEE005) /* P6DDR Address*/ #define P6DR (*(volatile union un_port1 *)0xFFFFD5) /* P6DR Address*/

P6DDR is used to access the data direction register, which control whether a port pin is a input or output port pin. P6DR is used to access the port pin itself.

#define OUTPUT P6DR.BIT.B0void fn() {P6DDR.BYTE = 0x01; // Init port 6 pin 0 as an output port.

// Refer to manual for detailsOUTPUT = 1; // send a pulseOUTPUT = 0;

}

4.2 Interrupt

HEW provides means to write an interrupt service routine (ISR) in C.

// Use #pragma interrrupt to indicate that a C function is an ISR#pragma interrupt TimerISRvoid TimerISR(void);void TimerISR(void){

ITU.TISRA.BIT.IMFA1 = 0; // Clear interrupt source// Do your stuff here

}

#define INTNUM_ITU1CMA 28/* Init PD interrupt at every msec */ void InitTimer(void)


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{InstallInterrupt(INTNUM_ITU1CMA, TimerISR);

ITU1.TCR.BIT.TPSC = 3; //20Mhz/8 clock = 2.5MhzITU1.GRA = 2500; //for 1msec interval, count = 2500ITU1.TCR.BIT.CCLR = 1; //clear by GRA compare matchITU.TMDR.BIT.PWM1 = 0; //counter 1 operates normally ITU.TSTR.BIT.STR1 = 1; //start counter ITU.TISRA.BIT.IMIEA1 = 1; //IMIA1 interrupt requested by IMFA1

flag=1}


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5 MCU Operating Modes

The H8/3062F micro-controller has seven operating modes (modes 1 to 7) that are selected by mode pins, MD2 to MD0 (refer to table 4 below). The different operating modes determine the size of thememory address space (from 64kbytes to 16Mbytes) and also whether the chip is operating inexpanded or single-chip mode. Mode 5 (expanded mode) is the preferred mode in our kinds of applications as it allows maximum address space and maximum flexibility.

Table 4: Operating Mode Selection Mode Pins

Operating Mode MD2 MD1 MD0------ 0 0 0Mode 1 0 0 1Mode 2 0 1 0Mode 3 0 1 1Mode 4 1 0 0Mode 5 1 0 1Mode 6 1 1 0Mode 7 1 1 1


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5.1 Mode 5 Memory Map

Table 4.1: Mode 5 memory mapH000000H0000FF

Vector area

H000100H01FFFF

On-chip ROM/Flash

H020000H1FFFFF

Area 0

H200000H3FFFFF Area 1H400000H5FFFFF Area 2H600000H7FFFFF Area 3H800000H9FFFFF Area 4HA00000HBFFFFF Area 5HC00000HDFFFFF Area 6HE00000HFEDFF

External addressspace

Area 7HFEE000HFEE0FF

On-chip I/ORegisters (1)

HFF8000External address

SpaceHFFEF1F

HFFEF20 On-chip RAM*

HFFFF00HFFFF1FHFFFF20HFFFFE9

On-chip I/ORegisters (2)

HFFFFEAHFFFFFF

External AddressSpace

The memory address space of mode 5 is 16 Mbytes, divided into 8 address area. Each address

area is accessible through the chip select port pins. The A20-A34 address pins are notrequired for address decoding, hence they can be used as normally I/O port pins.


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6 On-Board (Flash) Programming Mode

When pins are set to on-board programming mode and a reset-start is executed, the chips enters theon-board programming state in which on-chip flash memory programming, erasing, and verifying can

be carried out. There are two operating modes in this mode:

Boot mode (For erasing entire flash area and programming flash) User program mode (For user program to selectively erase and program flash area)

Both operating modes can be set by modes pins (MD2 MD0) and the FWE pin. The pin settings for entering each mode are shown in table 2.

Table 2 On-Board Programming Mode SettingsProgram Mode Operating mode FWE MD2 MD1 MD0Boot mode Mode 5 1 0 0 1User program mode: Mode 5 1 1 0 1

The AlphaCentre 3062F board allows only mode 5 boot and mode 5 normal operating mode.


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7 IO PORTS

7.1 Overview

10 input/out ports ( port 1,2,3,4,5,6,8,9, A and B) and 1 input only port (port 7) For single chip mode, a total of 70 I/O pins and 9 input-only pins are available For Mode 5 (expanded mode), the available IO pins are reduced as some pins are used for

external memory interface.

Table 6.1 Summary of the 3062f port pins.PORTS Functions*Port 1 Address output pins (A0-A7)*Port 2 Address output pins (A8-A15)*Port 3 Data bus high byte (D8-D15) // For 8 bit bus, D8-D15 is used**Port 4 Data bus low byte (D0-D7) // Available if there is no 16 bit bus device*Port 5(4 bits) address output pins (A16-A19)

*P6.3 Address select*P6.4 RD (read signal)*P6.5 HWR (high byte write)*P6.6 LWR(low byte write)P6.7 CPU clock output pin (can be used as input port)

*Port 6

P6.0-P6.2 available as input/output ports, P6.7 as input portP7.0-P0.5 analog input or digital inputPort 7P7.6-P7.7 analog input or analog ouput or digital inputMulti functions port pinsAll pins can be used as input/outputIRQ0-IRQ3 interrupt input pinsCS0 CS3 chip select output

Port 8 (5 bits)

*P8.4 is CS0 (normally used for RAM select)Multi functions port pinsAll pins can be used as input/ouputIRQ4, IRQ5 interrput input pins*RxD1, TxD1 serial comm interface 1 ( for flashing)

Port 9 (6 bits)

RxD0, TxD0 serial comm interface 0Multi function pinsAll pins can be used as input/ouputPA.4-PA.7/A20 A23 (optional address pins, to be used only if required)

Port A

16 bit timers related pinsMulti function pins

All pins can be used as input/ouputPB.0 PB.3/CS4 CS7 (chip select outputs)

Port B

8 bit timers related pins

Note: *Not available for use**Available for use only if there are no 16 bit devices. For the AlphaCentre board, as theRAM is 16-bit wide, this port cannot be used for other IO purposes


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7.2 Data Direction Register

Most port has a data direction register, DDR. Note that all the DDRs are write only register. That isyou cannot read the content of the register. Hence all port pins of the same port should have their datadirection assignment done at one place.

// Example codePBDDR.BYTE = 0x08; // Set Port B.3 as output, the rest are inputP3DDR.BYTE=0;PBDDR.BIT.B3 = 1; // THIS WILL NOT DO !!!!!!!!!!!!!

8 Interrupts

There are a number of internal and external interrupt sources.Many of the on chip devices are capable of generating interrupts. For external interrupts, the

NMI(Non Maskable Interrupt) and IRQ0 to IRQ5 can be used. Refer to hardware manual for details.

9 8-bit timers

4 channels, TMR0, TMR1, TMR2 and TMR3 Channel 0 &1 and 2&3 can be combined into 16 bit timers Can be used to generate PWM outputs Used generate regular interrupt

10 16-bit timers

3 channels Can be used to generate PWM outputs

Channel 2 can be used for phase counting Used to generate regular interrupt


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11 PWM Generation

Both the 8-bit and 16-bit timers can be used to generate PWM signal. Theoretically, we canhave a total of 7 PWM outputs. In reality, we need some of these timers for other purposes.

For example, a timer is required to generate the regular 1 ms interrupt required for PIDcontrol.

11.1 8-bit timer PWM output

The 4 possible 8-bit timer PWM output port pins are PB.0 PB.3 (TMO0 TMO3).

The highest frequency available is 9.8kHz, which is audible and rather irritating. If possible, use the16 bit timers for PWM generations and choose a frequency just outside the audible range. Please notethat with higher PWM frequency, the switching loss will be higher, so there is a compromise.

// Example code#define MOTOR0PWM TMR0.TCORA // Port B.0 - MOTOR0 PWM output TMR0.TCORA PBDDR.BYTE = 0x80;TMR0.TCR.BIT.CKS = 1; // select internal clk, 20/8MHzTMR0.TCR.BIT.CCLR = 2; // counter cleared by compare match BTMR0.TCSR.BIT.OS = 6; // 1 is output when compare match A occursTMR0.TCORB = MAXPWMVALUE; // max count of counter is 255

// Set PWM output pulse widthMOTOR0PWM = 10; // set PWM

11.2 16-bit timer PWM output pins

The 3 possible 16-bit timer PWM output port pins are TIOCA0(PA.2), TIOCA1(PA.4) andTIOCA2(PA.6). The 16 bit timers allow a much wider range of input clock selection and the 16 bitcounter allows a much finer resolution (In practice, for PID control, 8 bit is more than enough).

// Example code#define MOTORPWM ITU0.GRA #define MAXPWMVALUE 1000

PADDR.BYTE = 0x04; // Port A.2 - motor PWM output TIOCA0ITU0.TCR.BIT.TPSC=0; //select internal clock, 20MHzITU0.GRB = MAXPWMVALUE; //PWM period = 0.05msecITU0.TCR.BIT.CCLR=2; //TCNT cleared by GRB compare matchITU.TMDR.BIT.PWM0 = 1; // Select PWM mode for TIOCA0ITU.TSTR.BIT.STR0=1;

MOTORPWM = 500; // set PWM duty


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12 Two phase encoder counting

Only channel 2 of the 3 16-bit timers can be used as a two-phase encoder counter. The input pins areTCLKA(PA.0) and TCLKB(PA.1).

// Example codeVoid InitEncoderCounter() {// 16bit timer counter 2 for motor encoder signal decoding ITU.TMDR.BIT.MDF = 1; // select phase counting modeITU.TSTR.BIT.STR2 = 1; // start phase counting;

}

int newCount, oldCount, countDelta;void ReadCount() {

newCount = ITU2.TCNT;countDelta = (newCount - oldCount);oldCount = newCount;

}

13 Bus controller and chip select

13.1 Chip select outputs

There are altogether 8 chip select outputs that can be used to qualify the 8 address area (refer to themode-5 memory map for address details). With these chip select outputs, no external addressdecoding is required, thus simplifying hardware requirements when interfacing to bus devices.

To standardize circuit design and program loader in AlphaCentre, use CS0 for the external RAMselect. You may use any other chip select outputs for other devices.

13.2

Data bus width

The 3062F is capable of interfacing to both 8 bit or 16 bit devices. For 8 bit interface, use address pinA0 onwards and D8-D15. For 16-bit interface, use address pin A1 onwards and HWR & LWR toselect the high byte or low byte data (refer to microcontroller board schematic diagram in Appendix Bfor example).

13.3 Two state or three state selection

The bus cycle for each memory area has a programmable number of 2 or 3 states bus cycles.Additionally, extra wait states can be added to allow interface to device of slower speed. Refer tohardware manual for details.


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13.4 Example - Interfacing to the phase counter IC, NEC uDP7401

As the 3062 provides only one on chip two-phase counter, external two-phase counter IC is normallyrequired. The NEC uDP7401 has two such counters in each IC. It can be easily interfaced to the 3062data bus as shown below:

CS1 needs to be configured as a chip select output. To read the counter, use a C pointer to point toCS1 base address and access the pointer content.

// Init chip select. CS0 is init for an 8-bit wide RAM, and CS1 for theuDP7401 counter void InitCS0CS1 ( ){

BSC.ABWCR.BIT.B0=1; // Select 8-bit access for CS0BSC.ASTCR.BIT.B0=1; // 3-states access for CS0

BSC.WCR.BIT.W0=0; // 0 program wait state for CS0

BSC.ABWCR.BIT.B1=1; // Select 8-bit access for CS1BSC.ASTCR.BIT.B1=1; // 3-states access for CS1

BSC.WCR.BIT.W1=0; // 0 program wait state for CS1

BSC.BRCR.BYTE=0xf0; // A20-A23 use as IO pins, no ext bus master BSC.BCR.BYTE=0x42; // Idle cycle inserted in consecutive R/W

// cycles// Area division is 2Mbytes each

P1DDR.BYTE = 0xFF; // Port 1 used as A0-A7 P2DDR.BYTE = 0xFF; // Port 2 used as A8-A15 P5DDR.BYTE = 0x0F; // Port 5:0-3 used as A16-A19

P8DDR.BYTE = 0xF8; // Set P8.4 as CS0, P8.3 as CS1, P8.2 as CS2

// This instruction affects other port-8 pins}

char newEncoderData[2];char encoderDiff[2];char oldEncoderData[2];int wheelErr[2];

void ReadEncoder() {

newEncoderData[0] = (*(char*)0x200000);

D0-D7

U/L*X*/YCS*ResetX/Y

IC-7401

D8-D15

P6.0CS1*A0A1

XAXB

YAYB

Figure 12.3 Interfacing 7401 to the 3062F

Motor1 encoder signal channel AMotor1 encoder signal channel B

Motor2 encoder signal channel AMotor2 encoder signal channel B


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newEncoderData[1] = (*(char*)0x200001);encoderDiff[0] = ( newEncoderData[0] - oldEncoderData[0]);encoderDiff[1] = ( newEncoderData[1] - oldEncoderData[1]);wheelErr[0] -= encoderDiff[0];wheelErr[1] -= encoderDiff[1];oldEncoderData[0] = newEncoderData[0];oldEncoderData[1] = newEncoderData[1];

}


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