Glossary A/D (or A-D): Analog-to-digital converter. An integrated circuit (IC) or subsystem that translates a voltage to a digital word.

Assembler:. A language that directly describes machine instn~ctions such as move data to a register, jump to an address, add two registers, and so on. Each microprocessor has a unique machine language, and therefore a unique assembler language.

Blocked: In an application using a real-time kernel, a task is said to be blocked if it cannot run because it is awaiting some event. The event could be a particular interrupt, a specific time delay, or availability of a particular resource.

Breakpoint: A condition that causes the central processing unit (CPU) to execute a software interrupt when a particular address is executed or when a specific event occurs, such as a memory read or write. A breakpoint may be created by substituting an instruction opcode in memory with the software interrupt instruction, or the breakpoint may be implemented in hardware on an emulator.

Context: The state of the processor. In practical terms, this is usually the contents of the processor's registers and condition flags. The pro- cessor context is typically saved when it must be restored after a piece of code, such as an interrupt service routine (ISR), finishes executing.

CPU: Central processing unit. Technically the computing core of a microprocessor, the term is commonly used to refer to the micropro- cessor itself.

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228 Debugging Embedded Microprocessor Systems

D/A (or D-A): Digital-to-analog converter. An IC or subsystem that translates a digital word to a voltage.

Daisy-Chained Interrupts: An interrupt prioritizing scheme where the priority of each peripheral is determined by its position in the daisy chain. Lower-priority devices may acknowledge an interrupt only when there are no higher-priority devices requesting an interrupt.

Deadlock: A condition where two parts of a program hang because they each need a resource the other has.

Debugger:. A program that executes on the target system and allows the engineer to examine memory and I/O, set breakpoints, and down- load code, and that often supports other features. A debugger is some- times called a ROM monitor.

DMA: Direct memory access. A mechanism whereby a microprocessor temporarily gives up its external bus to another processor (or other con- troller), and which permits the other processor to access memory directly. Some microprocessors, such as the 80186, have built-in DMA controllers.

Download: Transferring program data from a host system (such as a host PC) to a target system.

DSP: Digital signal processor. A microprocessor that is optimized for processing signals such as sound, video, or RF.

DRAM: Dynamic RAM. RAM that stores information as charge on a capacitor. Must be periodically refreshed to renew the charge and retain data.

Dynamic Memory Allocation: In a real-time kernel, the ability to dynamically allocate memory, on request, from a larger memory pool.

Dynamic Priority: In a real-time kernel, the ability to change the pri- ority of tasks while running code.

Edge-Sensitive Interrupt:. An interrupt that is recognized on a rising or falling edge.

EPROM: Erasable Programmable Read Only Memory. A PROM that can be erased using ultraviolet light.

G/ossary 229

Executive: See Kernel.

Firmware: Software in machine-readable form, embedded in a ROM, PROM, EPROM, Flash Memory, or other nonvolatile storage.

Flash Memory: A PROM that can be electrically erased and reprogrammed.

Fragmentation" A condition under dynamic memory allocation where memory is fragmented into many small, isolated blocks. A task that needs multiple blocks of contiguous memory may be unable to r u n .

Interrupt Controller:. An IC or internal part of a microprocessor that prioritizes interrupts and provides a vector to the processor.

Kernel (Executive): A real-time kernel provides task management, resource management, and communication functions for a system. A kernel with file handling capability and other I /O functions is usually called a Real-time operating system (RTOS).

ISR: Interrupt service routine.

Latency: The time delay between assertion of an interrupt and servic- ing of the interrupt.

Level-Sensitive Interrupt: An interrupt that is recognized while in the active state.

Machine Language: The binary ones and zeros that the microproces- sor reads from memory and executes. See Assembler.

Microcontroller: A microprocessor with internal RAM and I /O ports and often including ROM, EPROM, or EEPROM for program storage.

Microprocessor:. An IC containing at minimum a central processing unit (CPU), and a means to access external memory. Microprocessors may also include internal memory, I /O ports, or peripherals.

ms: millisecond. One thousandth of a second.

ns: nanosecond. One billionth of a second.

230 Debugging Embedded Microprocessor Systems

Nested Interrupts: These occur where interrupts are structured so that a lower-priority ISR can be interrupted by a higher priority ISR.

NMI: Non-maskable interrupt. An interrupt input, available on many processors, that cannot be masked off. If the interrupt occurs, the pro- cessor will always service it.

NVRAM: A package housing a static RAM IC and a battery. The bat- tery powers the RAM so that it will retain its contents when external power is off.

OTP EPROM: One-time programmable EPROM. An EPROM with- out the erasure window. The OTP EPROM acts like a one-time pro- grammable PROM, but has an EPROM structure internally.

PLD: Programmable logic device. A programmable integrated circuit used to implement logic functions.

Preemptive Scheduling: A scheduling technique where each task is given control until it finishes or is superseded by a higher priority task.

Priority Inversion: A scheduling situation where a high-priority task is forced to execute at the priority of a lower-priority task because some low-priority task has control of a resource the high-priority task needs to run.

PROM: Programmable read-only memory. A ROM that can be pro- grammed, either by a PROM programmer or by the target system. Once programmed, acts as a read-only memory (ROM).

RAM: Random access memory. Memory that is both readable and writeable.

ROM: Read-only memory. A memory device that can be read by the central processing unit (CPU) but not written to. The contents of the ROM are fixed by a mask during manufacture.

ROM Monitor:. See Debugger.

RTOS: Real-time operating system. Firmware that provides task scheduling, memory allocation, and other services for a real-time application.

Glossa~ 231

Single Step: Causing the CPU to step through one machine or ! iLL instruction at a time.

Software: Computer instructions. May refer to the source code or the actual machine-readable data.

SRAM: Static RAM. RAM that is implemented as an array of flip- flops. Information is retained until overwritten or until power is removed.

Static Memory Allocation: In a real-time kernel, this refers to mem- ory buffers and queues that are fixed at compile time and cannot be changed while running.

Static Priority: In a real-time kernel, this refers to priority that must be fixed when tasks are defined and cannot be changed at run time.

Target: The system or microprocessor that an emulator is designed to install to or replace when debugging.

UART: Universal asynchronous receiver/transmitter. An IC or circuit that provides an asynchronous serial interface.

Vector (interrupt): A number or instruction that is translated into an address, which is then executed to service an interrupt.

WDT: Watchdog timer. A timing circuit that resets or otherwise noti- fies a microprocessor if it is not triggered at periodic intervals.