get pdf

IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 25, NO. 5, MAY 2010 1193

A Soft-Switching DC/DC Converter With HighVoltage Gain

Hyun-Lark Do

Abstract—A soft-switching dc/dc converter with high voltagegain is proposed in this paper. It provides a continuous input cur-rent and high voltage gain. Moreover, soft-switching characteristicof the proposed converter reduces switching loss of active powerswitches and raises the conversion efficiency. The reverse-recoveryproblem of output rectifiers is also alleviated by controlling thecurrent changing rates of diodes with the use of the leakage in-ductance of a coupled inductor. Experimental results obtained on200 W prototype are discussed.

Index Terms—Boost converter, high voltage gain, soft switching.

I. INTRODUCTION

R ECENTLY, the demand for dc/dc converters with highvoltage gain has increased. The energy shortage and the

atmosphere pollution have led to more researches on the renew-able and green energy sources such as the solar arrays and thefuel cells [1]–[5]. Moreover, the power systems based on bat-tery sources and supercapacitors have been increased. Unfortu-nately, the output voltages of these sources are relatively low.Therefore, the step-up power conversion is required in these sys-tems [6], [7]. Besides the step-up function, the demands such aslow current ripple, high efficiency, fast dynamics, light weight,and high power density have also increased for various appli-cations. Input current ripple is an important factor in a highstep-up dc/dc converter [8], [9]. Especially in the fuel cell sys-tems, reducing the input current ripple is very important becausethe large current ripple shortens fuel cell’s lifetime as well asdecreases performances [10]–[14]. Therefore, current-fed con-verters are commonly used due to their ability to reduce thecurrent ripple [15].

In applications that require a voltage step-up function anda continuous input current, a continuous-conduction-mode(CCM) boost converter is often used due to its advantages suchas continuous input current and simple structure. However, it hasa limited voltage gain due to its parasitic components. More-over, the reverse-recovery problem of the output diode degradesthe system’s performances. At the moment when the switchturns on, the reverse-recovery phenomenon of the output diodeof the boost converter is provoked. The switch is submitted toa high current change rate and a high peak of reverse-recoverycurrent. The parasitic inductance that exists in the current loopcauses a ringing of the parasitic voltage, and then, it increases

Manuscript received September 9, 2009; revised November 17, 2009. Currentversion published May 7, 2010. Recommended for publication by AssociateEditor F. L. Luo.

The author is with the Department of Electronic and Information Engineer-ing, Seoul National University of Technology, Seoul 139-743, Korea (e-mail:[email protected]).

Digital Object Identifier 10.1109/TPEL.2009.2039879

Fig. 1. Circuit diagram of the proposed dc/dc converter.

the voltage stresses of the switch and the output diode. Theseeffects significantly contribute to increase switching losses andelectromagnetic interference. The reverse-recovery problem ofthe output diodes is another important factor in dc/dc converterswith high voltage gain [16], [17]. In order to overcome theseproblems, various topologies have been introduced. In orderto extend the voltage gain, the boost converters with coupledinductors are proposed in [18] and [19]. Their voltage gainsare extended, but they lose a continuous input current charac-teristic and the efficiency is degraded due to hard switchingsof power switches. For a continuous input current, current-fedstep-up converters are proposed in [20] and [21]. They providehigh voltage gain and galvanic isolation. However, the addi-tional snubbers are required to reduce the voltage stresses ofswitches. In order to increase the efficiency and power con-version density, a soft-switching technique is required in dc/dcconverters [22]–[27].

A soft-switching dc/dc converter with high voltage gain,which is shown in Fig. 1, is proposed. A CCM boost cell pro-vides a continuous input current. To increase the voltage gain,the output of the coupled inductor cell is laid on the top of theoutput of the CCM boost cell. Therefore, the high voltage gainis obtained without high turn ratio of the coupled inductor, andthe voltage stresses of the switches are confined to the outputvoltage of the CCM boost cell. A zero-voltage-switching (ZVS)

0885-8993/$26.00 © 2010 IEEE

Authorized licensed use limited to: ANNA UNIVERSITY. Downloaded on August 06,2010 at 11:20:28 UTC from IEEE Xplore. Restrictions apply.

1194 IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 25, NO. 5, MAY 2010

Fig. 2. Key waveforms of the proposed converter.

operation of the power switches reduces the switching loss dur-ing the switching transition and improves the overall efficiency.The theoretical analysis is verified by a 200 W experimentalprototype with 24-to-360 V conversion.

II. ANALYSIS OF THE PROPOSED CONVERTER

Fig. 1 shows the circuit diagram of the proposed soft-switching dc/dc converter with high voltage gain. Its key wave-forms are shown in Fig. 2. The switches S1 and S2 are operatedasymmetrically and the duty ratio D is based on the switch S1 .D1 and D2 are intrinsic body diodes of S1 and S2 . CapacitorsC1 and C2 are the parasitic output capacitances of S1 and S2 .The proposed converter contains a CCM boost cell. It consistsof LB ,S1 ,S2 , Co1 , and Co2 . The CCM boost cell provides acontinuous input current. When the switch S1 is turned on, theboost inductor current iLB increases linearly from its minimum

value ILB 2 to its maximum value ILB 1 . When the switch S1is turned off and the switch S2 is turned on, the current iLB

decreases linearly from ILB 1 to ILB 2 . Therefore, the outputcapacitor voltages Vo1 and Vo2 can be derived easily as

Vo1 = Vin (1)

Vo2 =D

1 − DVin . (2)

To obtain ZVS of S1 and S2 and high voltage gain, a coupledinductor Lc is inserted. The coupled inductor Lc is modeled asthe magnetizing inductance Lm , the leakage inductance Lk , andthe ideal transformer that has a turn ratio of 1:n (n = N2/N1).The voltage doubler consists of diodes D1 ,D2 and the outputcapacitors Co3 , Co4 , and the secondary winding N2 of the cou-pled inductor Lc is on the top of the output stage of the boostcell to increase voltage gain. The coupled inductor current iLvaries from its minimum value −IL1 to its maximum value IL2 .The operation of the proposed converter in one switching periodTs can be divided into six modes. Fig. 3 shows the operatingmodes. Before t0 , the switch S2 and diode D4 are conducting.

Mode 1 [t0 , t1]: At t0 , the switch S2 is turned off. Then, theboost inductor current iLB and the coupled inductor current iLstart to charge C2 and discharge C1 . Therefore, the voltage vS1across S1 starts to fall and the voltage vS2 across S2 starts torise. The transition interval Tt1 of switches can be consideredas

Tt1 =(C1 + C2) Vin

(1 − D) (IL1 − ILB 2). (3)

Since the output capacitances C1 and C2 of the switches arevery small, the transition interval Tt1 is very short and it can beneglected. Therefore, the inductor currents iLB and iL can beconsidered to have constant values during mode 1.

Mode 2 [t1 , t2]: At t1 , the voltage vS1 across the lowerswitch S1 becomes zero and the lower diode D1 is turnedon. Then, the gate signal is applied to the switch S1 . Sincethe current has already flown through the lower diode D1 andthe voltage vS1 becomes zero before the switch S1 is turnedon, zero-voltage turn-ON of S1 is achieved. Since the voltageacross the boost inductor LB is Vin , the boost inductor cur-rent increases linearly from ILB 2 . Since v1 is −Vin and vk isVo4 + nVin , the magnetizing current im , the primary current i1 ,the secondary current i2 , and the inductor current iL are givenby

im (t) = Im1 −Vin

Lm(t − t1) (4)

i2(t) = −ID4 +Vo4 + nVin

LK(t − t1) (5)

i1(t) = ni2(t) = −nID4 + nVo4 + nVin

LK(t − t1) (6)

iL (t) = −im (t) + i1(t) = −Im1 − nID4

+Vin

Lm(t − t1) + n

Vo4 + nVin

LK(t − t1) . (7)


DO: SOFT-SWITCHING DC/DC CONVERTER WITH HIGH VOLTAGE GAIN 1195

Fig. 3. Operating modes.

Mode 3 [t2 , t3]: At t2 , the secondary current i2 changes itsdirection. The diode current iD4 decreases to zero and the diodeD4 is turned off. Then, diode D3 is turned on and its currentincreases linearly. Since the current changing rate of D4 is con-trolled by the leakage inductance of the coupled inductor, itsreverse-recovery problem is alleviated. Since v1 is −Vin andvk is nVin − Vo4 , the current im , the primary current i1 , thesecondary current i2 , and the inductor current iL are given by

im (t) = im (t2) −Vin

Lm(t − t2) (8)

i2(t) =nVin − Vo3

LK(t − t2) (9)

i1(t) = ni2(t) = nnVin − Vo3

LK(t − t2) (10)

iL (t) = −im (t) + i1(t)

= −im (t2) +Vin

Lm(t − t2) + n

nVin − Vo3

LK(t − t2) .

(11)

Mode 4 [t3 , t4]: At t3 , the lower switch S1 is turned off.Then, the boost inductor current iLB and the coupled inductorcurrent iL start to charge C1 and discharge C2 . Therefore, thevoltages vS1 and vS2 start to rise and fall in a manner similar tothat in mode 1. The transition interval Tt2 of switches can beconsidered as

Tt2 =(C1 + C2) Vin

(1 − D) (IL2 + ILB 1). (12)

Tt2 is also negligible. Therefore, the inductor currents iLB andiL can be considered to have constant values during Tt2 .

Mode 5 [t4 , t5]: At t4 , the voltage vS2 across the upper switchS2 becomes zero and the diode D2 is turned on. Then, the gatesignal is applied to the switch S2 . Since the current has al-ready flown through the diode D2 and the voltage vS2 becomeszero before the switch S2 is turned on, zero-voltage turn-ON

of S2 is achieved. Since the voltage across the boost induc-tor LB is −(Vin/(1 − D) − Vin), the boost inductor currentdecreases linearly from ILB 1 . Since v1 is DVin/(1 − D) andvk is −Vo3 − nDVin/(1 − D), the magnetizing current im , the



primary current i1 , the secondary current i2 , and the inductorcurrent iL are given by

im (t) = −Im2 +DVin

Lm (1 − D)(t − t4) (13)

i2(t) = ID3 −Vo3 + (D/1 − D) nVin

LK(t − t4) (14)

i1(t) = ni2(t)

= nID3 − nVo3 + (D/1 − D) nVin

LK(t − t4) (15)

iL (t) = +Im2 + nID3

−(

DVin

Lm (1 − D)+ n

Vo3 + (D/1 − D) nVin

LK

)(t − t4) .

(16)

Mode 6 [t5 , t6]: At t5 , the secondary current i2 changes itsdirection. The diode current iD3 decreases to zero and the diodeD3 is turned off. The reverse-recovery problem of D3 is alsoalleviated due to the leakage inductance of Lc . Then, the diodeD4 is turned on and its current increases linearly. Since v1 isDVin/(1 − D) and vk is Vo4 − nDVin/(1 − D), the current im ,the primary current i1 , the secondary current i2 , and the inductorcurrent iL are given by

im (t) = im (t5) +DVin

Lm (1 − D)(t − t5) (17)

i2(t) = − (D/1 − D) nVin − Vo4

LK(t − t5) (18)

i1(t) = ni2(t) = −n(D/1 − D) nVin − Vo4

LK(t − t5) (19)

iL (t) = −im (t5)

−(

DVin

Lm (1 − D)+ n

(D/1 − D) nVin − Vo4

LK

)(t − t5) .

(20)

The average values of vLB and v1 , Vo1 can be considered tobe Vin . Referring to the voltage waveforms vLB in Fig. 2, thevolt–second balance law gives

VinDTs − (Vo1 + Vo2 − Vin) (1 − D)Ts = 0. (21)

From modes 3 and 5, the current ID3 can be written as follows:

ID3 =nVin − Vo3

Lk(D − ∆1) Ts

=Vo3 + (D/1 − D) nVin

Lk∆2Ts (22)

from where, the output voltage Vo3 can be obtained by

Vo3 =D − ∆1 − (D/1 − D) ∆2

D − ∆1 + ∆2nVin . (23)

From modes 2 and 6, the current ID4 can be written as follows:

ID4 =nVin + Vo4

Lk∆1Ts

=−Vo4 + (D/1 − D) nVin

Lk((1 − D) − ∆2) Ts (24)

from where, the output voltage Vo4 can be obtained by

Vo4 =D − ∆1 − (D/1 − D) ∆2

1 − D + ∆1 − ∆2nVin . (25)

Since the average value of the current i2 is zero, the followingrelation can be obtained:

(D − ∆1 + ∆2) ID3 = (1 − D + ∆1 − ∆2) ID4 . (26)

From (22), (24), (25), and (26), the relation between ∆1 and∆2 is obtained by

∆1

∆2=

D

1 − D. (27)

Since the average value of the current im is zero, its peakvalues Im1 and Im2 have the following values:

Im1 = Im2 =DVinTs

2Lm. (28)

The output current Io in Fig. 1 can be represented by

Io = (D − ∆1 + ∆2)ID3

2= (1 − D + ∆1 − ∆2)

ID4

2.

(29)

From (22), (27), and (29), ∆1 and ∆2 are obtained by

∆1 = αD (30)

∆2 = α (1 − D) (31)

where

α =12

(1 −

√1 − 8LkIo

nVinDTs

).

III. CHARACTERISTIC AND DESIGN PARAMETERS

A. Input Current Ripple

The input current ripple ∆ILB can be written as

∆ILB = ILB 1 − ILB 2 =DVinTs

LB. (32)

To reduce the input current ripple ∆ILB below a specificvalue I∗, the inductor LB should satisfy the following condition:

LB >DVinTs

I∗. (33)



Fig. 4. Voltage gain according to duty cycle. (a) Under α = 0.1 and differentn values. (b) Under n = 3 and different α values.

B. Voltage Gain

From (1), (2), (23), (25), (27), (30), and (31), the voltage gainof the proposed converter is obtained by

Vo

Vin=

11 − D

+nD (1 − α)

(D − α (2D − 1)) (1 − D + α (2D − 1)).

(34)Fig. 4 shows the voltage gain according to duty cycle D: (a)

the voltage gain according to D under α = 0.1 and several n val-ues; (b) the voltage gain according to D under n = 3 and severalα values. As α increases, the voltage gain decreases. Namely,larger Lk reduces the voltage gain. On the assumption that α issmall, the voltage gain of (34) can be simplified as follows:

Vo

Vin=

1 + n

1 − D. (35)

C. ZVS Condition

The ZVS condition for S2 is given by

Im2 + nID3 + ILB 1 > 0 (36)

Fig. 5. Normalized voltage stresses according to duty cycle. (a) Under α =0.1 and different n values. (b) Under n = 3 and different α values.

from where, it can be seen that the ZVS of S2 is easily obtained.For ZVS of S1 , the following condition should be satisfied:

Im1 + nID4 > ILB 2 . (37)

On the assumption that α is small, ID4 and ILB 2 can besimplified as follows:

ID4 =2Io

1 − D(38)

ILB 2 =(n + 1) Io

1 − D− ∆ILB

2. (39)

From (38) and (39), the inequality (37) can be rewritten by

Im1 +2nIo

1 − D>

(n + 1) Io

1 − D− ∆ILB

2. (40)

Since Im1 , Io , and DILB are all positive values, the inequal-ity (40) is always satisfied for n>1. From (36) and (40), it canbe seen that ZVS conditions for S1 and S2 are always satisfied.Moreover, deadtimes of two switches S1 and S2 should be con-



Fig. 6. Simulation results. (a) iLB 1 , iL , iD3 , iD4 , and vS1 . (b) iS1 , vG S1 , vS1 , iS2 , vG S2 , and vS2 .

sidered. The gate signal should be applied to the switch beforethe current that flows through the antiparallel diode changesits direction. Namely, the leakage inductance Lk should belarge enough for the current to maintain its direction duringdeadtimes of two switches, S1 and S2 . This condition can de-termine the minimum value of the leakage inductance. From(30), the leakage inductance Lk should satisfy the followingcondition:

Lk >nVinDTs

8Io

[1 −

(1 − 2∆∗

1

D

)2]

(41)

where ∆∗1 is a predetermined minimum value of ∆1 . The leakage

inductance of the coupled inductor also alleviates the reverse-recovery problem of output diode. Large leakage inductance canremove the reverse-recovery problem but it reduces the voltagegain as shown in Fig. 4(b).

D. Voltage Stress of Devices

Generally, high output voltage will impose high-voltage stressacross the switching devices in dc/dc converters. In the proposeddc/dc converter, the voltage stresses across the switching devicesare smaller than the output voltage. Maximum values of vS1 andvS2 are confined to the output of the CCM boost cell as follows:

vS1,Max = vS2,Max = Vo1 + Vo2 =Vin

1 − D. (42)

The maximum voltage stresses vD3,Max and vD4,Max of theoutput diodes are given by

vD1,Max = vD2,Max = Vo3 + Vo4 = Vo −Vin

1 − D. (43)

Fig. 5 shows the voltage stresses of the power switches and theoutput diodes that are normalized with Vo .



Fig. 7. Experimental waveforms. (a) iLB 1 , iL , and vS1 . (b) iD3 , iD4 , andvS1 .

IV. EXPERIMENTAL RESULTS

The prototype soft-switching dc/dc converter with high volt-age gain is implemented with specifications of n = 5, Vin = 24V, Vo = 360 V, LB = 154 µH, Lk = 74 µH, Co1 = Co2 =Co3 = Co4 = 47 µF, Lm = 105 µH, fs = 100 kHz, and Po =200 W. Fig. 6 shows PSPICE simulation results. Fig. 7 showsthe experimental waveforms of the prototype of the proposedconverter. Fig. 7(a) shows the inductor currents iLB and iL , andthe voltage vS1 . It can be seen that the experimental waveformsagree with the theoretical analysis and the simulation results inFig. 6. The input current is continuous. The ripple componentof the input current can be controlled by LB . Fig. 7(b) shows

Fig. 8. ZVS of S1 and S2 . (a) iS1 , vG S1 , and vS1 . (b) iS2 , vG S2 , and vS2 .

the experimental results of the turn-OFF current of diodes D3and D4 . It is clear that the reverse-recovery current is signifi-cantly reduced and the reverse-recovery problem is alleviateddramatically by the leakage inductance of the coupled induc-tor Lc . Fig. 8 shows the ZVS of S1 and S2 . In Fig. 8(a), thevoltage vS1 across the switch S1 reaches zero before the gatepulse vGS1 is applied to S1 . Fig. 8(b) shows the ZVS of S2 .Fig. 9 shows the measured efficiency of the proposed converter.It exhibits an efficiency of 96.4% at full-load condition. Due toits soft-switching characteristic and alleviated reverse-recoveryproblem, the overall efficiency was improved by around 2%compared with the conventional high step-up boost converterwith a coupled inductor [18].



Fig. 9. Measured efficiency.

V. CONCLUSION

A soft-switching dc/dc converter with high voltage gain hasbeen proposed in this paper. The proposed converter can mini-mize the voltage stresses of the switching devices and lower theturn ratio of the coupled inductor. It provides a continuous inputcurrent, and the ripple components of the input current can becontrolled by using the inductance of the CCM boost cell. Soft-switching of power switches and the alleviated reverse-recoveryproblem of the output rectifiers improve the overall efficiency.

REFERENCES

[1] F. Blaabjerg, Z. Chen, and S. B. Kjaer, “Power electronics as efficientinterface in dispersed power generation systems,” IEEE Trans. PowerElectron., vol. 19, no. 5, pp. 1184–1194, Sep. 2004.

[2] R. J. Wai, W. H. Wang, and C. Y. Lin, “High-performance stand-alonephotovoltaic generation system,” IEEE Trans. Ind. Electron., vol. 55,no. 1, pp. 240–250, Jan. 2008.

[3] C. Wang and M. H. Nehrir, “Power management of a standalonewind/photovoltaic/fuel cell energy system,” IEEE Trans. Energy Con-vers., vol. 23, no. 3, pp. 957–967, Sep. 2008.

[4] R. J. Wai and W. H. Wang, “Grid-connected photovoltaic generation sys-tem,” IEEE Trans. Circuits Syst. I, Reg. Papers, vol. 55, no. 3, pp. 953–964,Apr. 2008.

[5] R. J. Wai, C. Y. Lin, R. Y. Duan, and Y. R. Chang, “High-efficiency powerconversion system for kilowatt-level distributed generation unit with lowinput voltage,” IEEE Trans. Ind. Electron., vol. 55, no. 10, pp. 3702–3714,Oct. 2008.

[6] K. Kobayashi, H. Matsuo, and Y. Sekine, “Novel solar-cell power sup-ply system using a multiple-input DC–DC converter,” IEEE Trans. Ind.Electron., vol. 53, no. 1, pp. 281–286, Feb. 2006.

[7] S. K. Mazumder, R. K. Burra, and K. Acharya, “A ripple-mitigating andenergy-efficient fuel cell power-conditioning system,” IEEE Trans. PowerElectron., vol. 22, no. 4, pp. 1437–1452, Jul. 2007.

[8] C. Wang, Y. Kang, B. Lu, J. Sun, M. Xu, W. Dong, F. C. Lee, and W.C. Tipton, “A high power-density, high efficiency front-end converter forcapacitor charging application,” in Proc. IEEE APEC, Mar. 2005, vol. 2,pp. 1258–1264.

[9] Z. Qun and F. C. Lee, “High-efficiency, high step-up DC–DC converters,”IEEE Trans. Power Electron., vol. 18, no. 1, pp. 65–73, Jan. 2003.

[10] X. Kong and A. M. Khambadkone, “Analysis and implementation of ahigh efficiency, interleaved current-fed full bridge converter for fuel cellsystem,” IEEE Trans. Power Electron., vol. 22, no. 2, pp. 543–550, Mar.2007.

[11] S. Pradhan, S. K. Mazumder, J. Hartvigsen, and M. Hollist, “Effects ofelectrical feedbacks on planar solid-oxide fuel cell,” ASME J. Fuel CellSci. Technol., vol. 4, no. 2, pp. 154–166, May 2007.

[12] W. Choi, P. N. Enjeti, and J. W. Howze, “Development of an equivalentcircuit model of a fuel cell to evaluate the effects of inverter ripple current,”in Proc. IEEE APEC, 2004, vol. 1, pp. 355–361.

[13] G. Fontes, C. Turpin, S. Astier, and T. A. Meynard, “Interactions betweenfuel cells and power converters: Influence of current harmonics on a fuelcell stack,” IEEE Trans. Power Electron., vol. 22, no. 2, pp. 670–678,Mar. 2007.

[14] S. K. Mazumder, S. K. Pradhan, J. Hartvigsen, M. R. von Spakovsky, andD. F. Rancruel, “Effects of battery buffering on the post-load-transientperformance of a PSOFC,” IEEE Trans. Energy Convers., vol. 22, no. 2,pp. 457–466, Jun. 2007.

[15] S. J. Jang, C. Y. Won, B. K. Lee, and J. Hur, “Fuel cell generation systemwith a new active clamping current-fed half-bridge converter,” IEEETrans. Energy Convers., vol. 22, no. 2, pp. 332–340, Jun. 2007.

[16] Q. Zhao, F. Tao, F. C. Lee, P. Xu, and J. Wei, “A simple and effectivemethod to alleviate the rectifier reverse-recovery problem in continuous-current-mode boost converter,” IEEE Trans. Power Electron., vol. 16,no. 5, pp. 649–658, Sep. 2001.

[17] Q. Zhao and F. C. Lee, “High-efficiency, high step-up dc–dc converters,”IEEE Trans. Power Electron., vol. 18, no. 1, pp. 65–73, Jan. 2003.

[18] Q. Zhao, F. Tao, Y. Hu, and F. C. Lee, “Active-clamp DC/DC converterusing magnetic switches,” in Proc. IEEE APEC, 2001, pp. 946–952.

[19] D. A. Grant, Y. Darroman, and J. Suter, “Synthesis of tapped-inductorswitched-mode converters,” IEEE Trans. Power Electron., vol. 22, no. 5,pp. 1964–1969, Sep. 2007.

[20] A. L. Rabello, M. A. Co, D. S. L. Simonetti, and J. L. F. Vieira, “Anisolated DC–DC boost converter using two cascade control loops,” inProc. IEEE ISIE, Jul. 1997, vol. 2, pp. 452–456.

[21] P. J. Wolf, “A current-sourced DC–DC converter derived via the dualityprinciple from the half-bridge converter,” IEEE Trans. Ind. Electron.,vol. 40, no. 1, pp. 139–144, Feb. 1993.

[22] J. M. Kwon, E. H. Kim, B. H. Kwon, and K. H. Nam, “High-efficiencyfuel cell power conditioning system with input current ripple reduction,”IEEE Trans. Ind. Electron., vol. 56, no. 3, pp. 826–834, Mar. 2009.

[23] Y. Hsieh, T. Hsueh, and H. Yen, “An interleaved boost converter withzero-voltage transition,” IEEE Trans. Power Electron., vol. 24, no. 4,pp. 973–978, Apr. 2009.

[24] M. R. Amini and H. Farzanehfard, “Novel family of PWM soft-single-switched DC–DC converters with coupled inductors,” IEEE Trans. Ind.Electron., vol. 56, no. 6, pp. 2108–2114, Jun. 2009.

[25] C. Y. Chiang and C. L. Chen, “Zero-voltage-switching control for a PWMbuck converter under DCM/CCM boundary,” IEEE Trans. Power Elec-tron., vol. 24, no. 9, pp. 2120–2126, Sep. 2009.

[26] R. Huang and S. K. Mazumder, “A soft-switching scheme for an iso-lated DC/DC converter with pulsating DC output for a three-phase high-frequency-link PWM converter,” IEEE Trans. Power Electron., vol. 24,no. 10, pp. 2276–2288, Oct. 2009.

[27] J. P. Rodrigues, S. A. Mussa, M. L. Heldwein, and A. J. Perin, “Three-level ZVS active clamping PWM for the DC–DC buck converter,” IEEETrans. Power Electron., vol. 24, no. 10, pp. 2249–2258, Oct. 2009.

Hyun-Lark Do was born in Pusan, Korea, in 1971.He received the B.S. degree from Hanyang Univer-sity, Seoul, Korea, in 1999, and the M.S. and Ph.D.degrees in electronic and electrical engineering fromPohang University of Science and Technology, Po-hang, Korea, in 2002 and 2005, respectively.

He is currently a Professor in the Department ofElectronic and Information Engineering, Seoul Na-tional University of Technology, Seoul. His researchinterests include the modeling, design, and controlof power converters, soft-switching power convert-

ers, resonant converters, power factor correction circuits, and driver circuits ofplasma display panels.


get pdf

Documents