generalized scalar pwm

IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 26, NO. 5, MAY 2011 1385

A Generalized Scalar PWM Approach With EasyImplementation Features for Three-Phase,

Three-Wire Voltage-Source InvertersAhmet M. Hava, Member, IEEE, and N. Onur Cetin, Student Member, IEEE

Abstract—The generalized scalar pulse width modulation(PWM) approach, which unites the conventional PWM methodsand most recently developed reduced common mode voltage PWMmethods under one umbrella, is established. Through a detailedexample, the procedure to generate the pulse patterns of thesePWM methods via the generalized scalar PWM approach is illus-trated. With this approach, it becomes an easy task to programthe pulse patterns of various high performance PWM methodsand benefit from their performance in modern three-phase, three-wire voltage-source inverters for applications such as motor drives,PWM rectifiers, and active filters. The theory is verified by labora-tory experiments. Easy and successful implementation of varioushigh-performance PWM methods is illustrated for a motor drive.

Index Terms—Carrier, common-mode voltage, discontinuousPWM (DPWM), generalized scalar PWM, inverter, modulation,near state PWM (NSPWM), pulse width modulation (PWM),PWM implementation, scalar, space vector, space vector PWM(SVPWM), zero sequence.

I. INTRODUCTION

THREE-PHASE, three-wire voltage-source inverters (VSI)are widely utilized in ac motor drive and utility interface

applications requiring high performance and high efficiency. InFig. 1, the standard three-phase two-level VSI circuit diagram isillustrated. The classical VSI generates ac output voltage fromdc input voltage with required magnitude and frequency byprogramming high-frequency rectangular voltage pulses. Thecarrier-based pulse width modulation (PWM) technique is thepreferred approach in most applications due to the low-harmonicdistortion waveform characteristics with well-defined har-monic spectrum, fixed switching frequency, and implementationsimplicity.

Carrier-based PWM methods employ the “per-carrier cyclevolt-second balance” principle to program a desirable inverteroutput voltage waveform [1]. In every PWM cycle, the referencevoltage, which is fixed over the PWM cycle, corresponds to afixed volt-second value. According to the volt-second balanceprinciple, the inverter output voltages made of rectangular volt-age pulses must result in the same volt-seconds as this referencevolt-second value.

Manuscript received April 12, 2010; revised September 7, 2010; acceptedSeptember 9, 2010. Date of current version June 22, 2011. Recommended byAssociate Editor J. A. Pomilio.

The authors are with the Department of Electrical and Electronics Engi-neering, Middle East Technical University, Ankara 06531, Turkey (e-mail:[email protected]; [email protected]).

Digital Object Identifier 10.1109/TPEL.2010.2081689

Fig. 1. Circuit diagram of a PWM-VSI drive connected to an R-L-E type load.

Fig. 2. Triangle intersection PWM phase “a” modulation wave v∗a , switching

signal and va o voltage.

There are two main implementation techniques for carrier-based PWM methods: 1) scalar implementation and 2) spacevector implementation. In the scalar approach, as shown inFig. 2, for each inverter phase, a modulation wave is com-pared with a triangular carrier wave [using analog circuits ordigital hardware units (PWM units) as conventionally found inmotor control microcontroller or DSP chips] and the intersec-tions define the switching instants for the associated inverterleg switches. In the space vector approach, as illustrated inthe space vector diagram in Fig. 3, the time lengths of theinverter states are precalculated for each carrier cycle by em-ploying space vector theory and the voltage pulses are directlyprogrammed [2], [3]. The mathematics involved in the scalarmethod modulation waves and the space vector calculations isrelated. With proper modulation waves, the scalar and space vec-tor PWM pulse patterns can be made identical [1]. Thus, bothtechniques may have equivalent performance results. But the

0885-8993/$26.00 © 2011 IEEE

1386 IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 26, NO. 5, MAY 2011

Fig. 3. Voltage space vectors of three-phase two-level inverter. The upperswitch states are shown in the brackets (Sa+ , Sb+ , Sc+ ). “1” is ON and “0” isOFF state.

scalar approach is simpler than the space vector approach fromthe implementation perspective as the involved computationsare generally fewer and less complex [1]–[9].

Based on the scalar or vector approach, there are variousPWM methods proposed in the literature which differ in termsof their voltage linearity range, ripple voltage/current, switchinglosses, and high-frequency common mode voltage/current prop-erties. The conventional sinusoidal PWM (SPWM) [10], spacevector PWM (SVPWM) [3], discontinuous PWM1 (DPWM1)[11], and the recently developed active zero state PWM(AZSPWM) methods [12], [13], near state PWM (NSPWM)[14], and remote state PWM (RSPWM) [15] methods, are a few(and the most important ones) to name. In particular, the last fewhave been recently developed with the quest for reducing the VSIcommon mode voltage (CMV) magnitude [16]. However, theimplementation of these methods is not easy and not reported inthe literature to sufficient depth. Furthermore, the relation be-tween the conventional and recently developed reduced CMV(RCMV) PWM methods is not well understood both in terms ofimplementation characteristics and performance characteristics.Therefore, difficulties arise in implementing and understandingthe performance attributes of these PWM methods.

This paper first reviews the PWM principles and establishes ageneral scalar approach that treats the conventional and RCMV–PWM methods, and unites most methods under one umbrella.The paper then reviews the pulse patterns and performance of thepopular PWM methods, and provides guidance for simple prac-tical implementation which is favorable over the conventionalmethods (space vector or scalar [1]–[9]). The experimental re-sults verify the feasibility of the proposed approach.

II. REVIEW OF THE CARRIER-BASED PWM PRINCIPLES

The PWM approach is based on the “per-carrier cycle volt-second balance” principle, which is a generally applicable prin-ciple to all power electronic converters. According to this prin-ciple, in a PWM period (TS ), the average value of the outputvoltage is equal to the reference value. Thus, an output voltagewith a desirable value is obtained by creating a reference voltage

and matching this reference voltage with the pulse width modu-lated inverter output voltages for each PWM period. Therefore,the fundamental constraint in programming the PWM pulses foreach phase involves the volt-seconds balance.

In scalar PWM, the reference (modulation) wave of eachphase (v∗

a , v∗b , v∗

c ) is compared with a carrier wave (vtri) and theintersections define the switching instants for switches of the as-sociated inverter phase leg (see Fig. 2). The period of the carrierwave is equal to one PWM period (TS ). In a PWM period, if themodulation wave is larger (smaller) than carrier wave, the upperswitch is ON (OFF). The upper and lower switches of each legoperate in complementary manner (Sa+ = 1 → Sa− = 0). Theper-carrier cycle average value of the voltage of one VSI legoutput (vao ) (phase to dc bus midpoint voltage) is equal to thereference value of that leg ( v∗

a ) due to the volt-second balanceprinciple. The fundamental output voltage (may be obtained byremoving the PWM ripple from the output voltage) has the samewaveform as the modulation wave. If a sinusoidal fundamentaloutput voltage is wanted, then a modulation wave consisting ofsinusoidal form with proper fundamental frequency and magni-tude is compared with the high-frequency carrier wave.

In a three-phase VSI, under balanced operating conditions,the reference voltages of each leg have the same shape but theyare 120◦ phase shifted from each other. To obtain sinusoidal out-put voltages, in the scalar implementation three symmetric and120◦ phase shifted sinusoidal modulation waves are comparedwith the carrier wave and this method is called as the conven-tional SPWM method, which has been used in motor drives formany decades [10]. However, in three-phase, three-wire VSIs,constraining the reference modulation waves to pure sinusoidalform is not favorable in most cases, as will be discussed in thefollowing.

In three-phase, three-wire inverters where the neutral point ofthe load is isolated, no neutral current path exists (except for veryhigh frequencies where circuit parasitic capacitances establish acurrent flow path) and only the inverter line-to-line voltages de-termine the load current subcarrier frequency content. Thus, then-o potential in Fig. 1, which will be symbolized with vno , canbe freely varied. In such applications, any common bias voltage(zero-sequence signal (v0) can be added (injected) to the SPWMreference voltages (modulation waves). The injection of a zero-sequence signal simultaneously shifts each reference wave inthe vertical direction (with respect to the carrier wave). There-fore, the inverter line-to-line voltage per-carrier cycle averagevalue is not affected. However, v0 changes the position of theoutput line-to-line voltage pulses (see Fig. 8). Therefore, it sig-nificantly influences the harmonic distortion, voltage linearity,and switching frequency characteristics [1], [2], [17], [18].

With a proper zero-sequence signal injection (theoretically,infinite choices exists! [1]), the overall inverter performanceincreases substantially over SPWM. Ever since this advan-tage has been understood, the zero-sequence signal injectiontechnique has been in wide utilization in practice. Obtainedwith zero-sequence signal injection, SVPWM [1], [3], [18] andDPWM1 [11], [19] are two highly popular examples. Whilethe former method provides low harmonic distortion, the latteryields low switching losses. Furthermore, compared to SPWM,

HAVA AND CETIN: GENERALIZED SCALAR PWM APPROACH WITH EASY IMPLEMENTATION FEATURES FOR THREE-PHASE, THREE-WIRE 1387

both methods extend the voltage linearity range of the VSI by15% [20], [21].

In three-phase, three-wire VSIs, not only the modulationwaves, but also the carrier waves are per phase and can bearbitrarily selected. The carrier waves may be triangular or saw-tooth, for each phase. The carrier of a phase may be phase shiftedwith respect to the carriers of other phases. It may even be at adifferent frequency. In all these cases, the volt-seconds balanceis not affected and the per-carrier cycle average value of theVSI leg output voltage is retained. In three-phase VSIs, conven-tionally one common triangular carrier wave is utilized for allphases due to its symmetric switching sequence which results inlow harmonic distortion, low switching loss, and “one switchingat a time” characteristics. While this constraint allows easy im-plementation of conventional PWM methods, it also constrainsthe variety of PWM methods with the scalar implementation, aswill be discussed in the next section.

The aforementioned discussions indicate that in the scalar im-plementation both the zero-sequence signal and the carrier sig-nals allow degrees of freedom to obtain various PWM pulse pat-terns with substantial differences in performance. While someof these possibilities have been explored in the past, some oth-ers are undiscovered. The next section will formally treat thesubject and explore the possibilities. However, the space vec-tor approach, as a different approach to form the PWM pulsepattern from the scalar approach requires a brief review at thisstage. This is because some PWM methods with favorable pulsepatterns have been first invented based on the space vector ap-proach [12], [13] and their scalar equivalents will be foundduring the aforementioned discussed exploration state. Whilethe space vector implementation of such pulse patterns is labo-rious, to be obtained with aid of the generalized scalar PWMapproach, the scalar method-based equivalents are easy to imple-ment. Thus, it is important to show the pulse pattern equivalencyand implementation advantage.

In the space vector approach, employing the complex vari-able transformation, the time domain phase reference voltagesare translated to the complex reference voltage vector (V ∗)with the magnitude (V ∗

1m ) that rotates in the complex coor-dinates with the ωet angular speed (see Fig. 3) in the followingequation:

V ∗ =23

(v∗

a + av∗b + a2v∗

c

)=V ∗

1m ejωe t , where a = ej (2π/3) .

(1)

Since there are eight possible inverter states available, thevector transformation yields eight voltage vectors as shown inFig. 3. Of these voltage vectors, six of them (V1 , V2 , V3 , V4 , V5 ,V6) are active voltage vectors, and two of them (V0 and V7) arezero-voltage vectors (which provide degree of controllabilitysimilar to the zero-sequence signal of the scalar implementa-tion) which generate zero output voltage. In the space vectoranalysis, the duty cycles of the voltage vectors are calculatedaccording to the vector volt-second balance rule defined in thefollowing equations, and these voltage vectors are applied with

Fig. 4. Voltage space vectors and 60◦ sector definitions. (a) A-type region. (b)B-type region.

the calculated duty cycles:

7∑

k=0

Vk tk = V ∗TS (2)

7∑

k=0

tk = TS . (3)

Each PWM method utilizes different voltage vectors, vec-tor time lengths, and sequences. Therefore, the vector space isdivided into segments. There are six A-type and six B-type seg-ments available (see Fig. 4). Investigations reveal that all spacevector PWM methods utilize either A-type or B-type segments,and the utilized voltage vectors of these PWM methods alternateat the boundaries of the corresponding segments [16]. For ex-ample, the space vector implemented SVPWM and AZSPWM1utilize A-type and NSPWM utilizes B-type segments [14], [16].

In the space vector approach, the implementation is straight-forward, but quite laborious [2]–[9]. The space vectors segmentsmust be found and vector duty cycles must be calculated. Then,given a vector sequence, the phase switch duty cycles are cal-culated and loaded to the PWM counter of the PWM generatorof a control board of the VSI. Should the reference voltage tippoint fall out of the inverter voltage hexagon (overmodulationcondition [20], [21]), then corrections to the vector duty cal-culations or recalculations with the modified reference vectorbecome necessary. Thus, the direct space vector implementa-tion is always a difficult task for a PWM generator. Section IIIprovides the generalized scalar PWM implementation approachwhich overcomes the involved procedure and computations.

III. GENERALIZED SCALAR PWM APPROACH

The generalized scalar PWM approach provides degrees offreedom in the choice of both the zero-sequence signal andthe carrier waves [22]. First, the zero-sequence signals can bearbitrarily generated, but generating them based on the phasereference voltages (original modulation signals) provides sig-nificant advantages. Until present, most useful PWM pulse pat-terns could be obtained by this approach [1], [18]. Therefore, inmost cases, the zero-sequence signals are obtained by evaluat-ing the reference voltages. Second, the carrier waves of differ-ent phases can be selected arbitrarily. However, recent studieshave illustrated that employing triangular carrier waves at thesame frequency, and selecting the phase relation between the


Fig. 5. Block diagram of the generalized carrier-based scalar PWM employingthe zero-sequence signal injection principle and multicarrier signals.

Fig. 6. Block diagram of the conventional scalar PWM method employingzero-sequence signal injection and a common triangular carrier wave.

carrier waves of different phases based on the voltage refer-ences yields favorable results [14], [23], [24]. As a result, thegeneralized scalar PWM approach will favor such constraintsfor the purpose of keeping the scope of the paper within practicalboundaries. Further relaxing the constraints and investigating al-ternative pulse patterns with favorable characteristics is a subjectmatter of future research. Given the described set of constraints,the generalized block diagram of scalar PWM approach withzero-sequence signal injection principle is illustrated in Fig. 5.

In the generalized scalar approach; according to the origi-nal three-phase sinusoidal reference signals (voltage referenceswith single star superscripts) and zero-sequence signals, the finalreference (modulation) signals (voltage references with doublestar superscripts) are generated. Then, the individual modulationand carrier waves are compared to determine the associated in-verter leg switch states and output voltages. In the conventionalapproach (see Fig. 6), which is the special case of generalizedapproach, only one triangular carrier wave is utilized for allphases.

In the scalar representation, the modulation waves are definedas follows:

v∗∗a = v∗

a + v0 = V ∗1m cos(ωet) + v0 (4)

v∗∗b = v∗

b + v0 = V ∗1m cos

(ωet −

2π

3

)+ v0 (5)

v∗∗c = v∗

c + v0 = V ∗1m cos

(ωet +

2π

3

)+ v0 (6)

where v∗a , v∗

b , and v∗c are the original sinusoidal reference signals

and v0 is the zero-sequence signal. Using the zero-sequence

Fig. 7. Modulation waveforms and zero-sequence signals of the popular PWMmethods (Mi = 0.7).

signal injected modulation waves, the duty cycle of each switchcan be easily calculated in the following for both single andmulticarrier methods:

dx+ =12

(1 +

v∗∗x

Vdc/2

), for x ∈ {a, b, c} (7)

dx− = 1 − dx+ , for x ∈ {a, b, c} . (8)

It is helpful to define a modulation index (Mi , voltage uti-lization level) term at this stage. For a given dc-link voltage(Vdc), the ratio of the fundamental component magnitude ofthe line to neutral inverter output voltage (V1m ) to the fun-damental component magnitude of the six-step mode voltage(V1m-6-step = 2Vdc/π) is termed the modulation index Mi [1]

Mi =V1m

V1m-6-step(9)

There are two commonly used zero-sequence signals in prac-tical applications (see Fig. 7). For both cases, simple magnituderules described in [1] are utilized to generate these signals. Thezero-sequence signal of the widely utilized continuous PWM(CPWM) methods is generated by employing the minimummagnitude test which compares the magnitudes of the three-phase original reference signals and selects the signal which hasminimum magnitude [1]. Scaling this signal by 0.5, the zero-sequence signal of these CPWM methods is found. Assume|v∗

a | ≤ |v∗b |, |v∗

c |, then v0 = 5 · v∗a . This modulation wave is rec-

ognized as SVPWM modulation wave in [1]. Inside the voltagelinearity region, in the CPWM methods, the modulation wavesare always within the carrier triangle peak boundaries; withinevery carrier cycle, the triangle and modulation waves intersect,and ON and OFF switchings always occur. In discontinuousPWM (DPWM) methods, the zero-sequence signal is injectedsuch that reference signal of one phase is always clamped tothe positive or negative dc bus. The clamped phase is alternatedthroughout the fundamental cycle. In the most common DPWMmodulation wave (in the literature recognized as the DPWM1modulation wave), the phase signal which is the largest in mag-nitude is clamped to the dc bus with the same polarity [1].Assume |v∗

a | ≥ |v∗b |, |v∗

c |, then v0 = (sign(v∗a)) · (Vdc/2) − v∗

a .The inverter leg whose modulation wave is clamped to the dcbus is not switched, therefore, switching losses are reducedin DPWM methods. The two popular zero-sequence signal


TABLE IAZSPWM1, AZSPWM3, AND NSPWM SPACE VECTOR REGION DEPENDENT

POLARITY ALTERNATING CARRIER SIGNALS

injection CPWM and DPWM method waveforms are shownin Fig. 7 along with the zero-sequence signal. SPWM is thenaive form, where no zero-sequence signal is injected.

Using the discussed CPWM modulation wave along with acommon triangular carrier wave for all phases, SVPWM methodyields. Likewise, using the discussed DPWM modulation wavealong with a common triangular carrier wave for all phases,DPWM1 yields. Using the same modulation waves, but vary-ing the triangle polarities (resulting in multicarrier waves, vtri-a ,vtri-b , vtri-c ) additional methods yield. For example, the triangu-lar carrier wave polarities can be alternated according to the re-gions defined in Fig. 4. Taking the common triangular carrier vtrias reference, three carrier wave alternating (multicarrier) pat-terns are given in Table I. The first pattern along with the CPWMmodulation waveform yields AZSPWM1. The second patternwith the same modulation wave yields AZSPWM3 [12]. Thethird pattern along with the DPWM waveform yields NSPWM.Thus, with only the two modulation waves, and polarity con-trolled triangular carrier waves, all the high-performance PWMmethods could be covered.

Note that all the popular PWM methods reported in [1] whichhave different modulation waves than the aforementioned meth-ods use common triangle and fall under the same umbrella andcan be treated with the generalized scalar PWM approach. Thus,the proposed approach is broad and covers most methods re-ported in the literature. Considering that the methods reportedin this paper (both conventional and the recently developedRCMV–PWM methods) and the other conventional methodsreviewed in [1] are the most popular methods (due to theirsuperior performance when compared to other methods), theapproach yields sufficient results from the practical utilizationperspective. Using the proposed approach and creating a varietyof triangular carrier wave patterns and modulation wave shapes,further PWM pulse patterns, and thus new methods can be in-vented. This paper will be confined to the methods discussed inthis paragraph. Also note that SPWM with multicarrier signals,which has been studied in [23] and found to have quite lim-ited performance, is not discussed in this paper. RSPWM1-2-3 [15], [16] and AZSPWM2 [13] are two RCMV-PWM methodsreported that are not included in the study either. These methodshave simultaneous phase switching problem constraining their

experimental performance [16], so they are not considered prac-tical. However, it can be shown that they can be included underthe generalized scalar PWM umbrella.

In the alternating polarity triangular carrier wave methods,the alternating triangle polarities, for example those in Table I,can be obtained by determining the regions of Fig. 4. This goalcan be easily achieved by comparing the modulation waves.For example, the v∗

a ≥ v∗b , v∗

c condition corresponds to the A1region. Such operations can be very easily performed with thePWM units of the modern digital signal processors used in acmotor drives and PWM rectifiers. Before getting involved inimplementation details and experimental results, the aforemen-tioned discussed PWM methods will be reviewed in terms ofpulse patterns and performance.

IV. PULSE PATTERNS AND PERFORMANCE CHARACTERISTICS

OF POPULAR PWM METHODS

Since a large number of PWM methods exist and each methodwith unique pulse pattern yields unique performance character-istics, full investigation of all PWM methods in regard to theirpulse pattern and performance is a laborious task. However,the theoretically infinite choice of methods, in practice reducesto a relatively small count when a systematic evaluation andperformance comparison (among the many methods) is made.References [1], [2], and [16] involve such thorough investigationof large count of PWM methods and in conclusion it appearsthat only the popular methods discussed in this paper deservesignificant attention. This section aims to review the popularPWM methods with the focus on their pulse patterns such thatin the following section the practical implementation can bediscussed to sufficient depth. Observing the pulse patterns, theperformance characteristics can be studied, and thus major ad-vantages of these methods can be recognized. Therefore, whilereviewing the pulse patterns of the popular methods, it willalso be possible to demonstrate why these methods are so wellaccepted.

The pulse pattern of SVPWM is illustrated in Fig. 8 for the re-gion A1 [see Fig. 4(a)]. With equally partitioned two zero states[(0 0 0) and (1 1 1)], SVPWM provides very low PWM rippleand provides voltage linearity for the modulation index range of0 < Mi < 0.907. As it has symmetric zero stages, from the PWMripple reduction perspective SVPWM is the best method. But asMi increases the ripple also increases and it looses its advantagearound Mi ≈ 0.6 where discontinuous PWM methods can beused [1]. For example increasing the switching frequency by50% and employing the DPWM1 method (of which the pulsepattern is illustrated in Fig. 9(a) for region A1∩B2 of Fig. 4), theswitching count and, therefore, the switching losses remain thesame (as one of the phases ceases switching during the PWMperiod) while the ripple of DPWM1 becomes less compared toSVPWM. Due to reduction of the total zero state duty cycles athigh Mi and 50% increase of the carrier frequency (decrease ofthe carrier cycle), the effect of the zero states on ripple decreasesand they can be lumped as one [1]. Thus, low ripple or low lossresults. Consequently, SVPWM at low Mi , and DPWM1 at highMi have been widely used. It has been illustrated that transition


Fig. 8. The PWM cycle view of modulation signals, inverter upper switchlogic signals, phase and line-to-line voltages, and common mode voltage ofSVPWM.

between methods is seamless (the load current is not disturbed)and a combination of the two methods has been successfullyused in commercial drives. However, for both SVPWM andDPWM1, as shown at the bottom of the pulse pattern diagrams,the inverter CMV is high. In motor drive applications, higherCMV is associated with increased common mode current (mo-tor leakage current), higher risk of nuisance trips, and reducedbearing life [24]–[26].

The CMV of the three-phase VSI is defined as the potentialof load star point with respect to the midpoint of dc bus of theinverter and the CMV at the inverter output can be expressed asfollows:

vcm =vao + vbo + vco

3. (10)

According to (10), the CMV of SPWM, SVPWM, andDPWM1 methods (and all other common carrier wave PWMmethods), may take the values of Vdc/6 or Vdc/2, depending onthe inverter switch states. As these methods utilize zero vectorsV0 and V7 , a CMV of −Vdc/2 and Vdc/2 can be created. Thishigh CMV is illustrated in Figs. 8 and 9(a) at the bottom traces.Since they do not utilize zero states, NSPWM, AZSPWM1,and AZSPWM3 (and all other RCMV PWM methods) avoida CMV with a magnitude of Vdc/2 and their CMV magnitudeis confined to Vdc/6. The CMV traces of Fig. 9(b)–(d) demon-strate this advantage. Thus, these methods can be favorable overSVPWM and DPWM1 in CMV sensitive applications.

Fig. 9. Pulse patterns of various PWM methods. (a) DPWM1 in regionA1∩B2. (b) NSPWM in region B2. (c) AZSPWM1 in region A1. (d) AZSPWM3in region A1.

Comparing the pulse patterns of Fig. 9(a) and (b), it can beobserved that NSPWM is a discontinuous PWM method and ityields equivalent advantages to DPWM1 in terms of switchingloss reduction. This is obtained differently from the DPWM1method. While in DPWM1 one of the zero states is avoided,in NSPWM both zero states are avoided and an active vector isintroduced instead. The switching count reduction is obtained byproper sequencing the voltage vectors. Similar to DPWM1, itsripple is low in the high Mi range as the active vectors close to thereference voltage vector dominate [14]. The main disadvantageof NSPWM involves voltage linearity. NSPWM is only linearin the range of 0.61 ≤ Mi ≤ 0.907 (DPWM1 linearity range: 0< Mi < 0.907). While in PWM rectifier applications this rangeis sufficient, in motor drives operation at low Mi is required andNSPWM must be combined with another method [27].

In motor drive applications, operating at low Mi and obtaininglow CMV is possible by employing AZSPWM1 or AZSPWM3in this range. As shown in Fig. 9(c) and (d), the two AZSPWMmethods yield low CMV with Vdc/6 magnitude and AZSPWM3has a lower CMV frequency which is favorable. However, ithas simultaneous switching actions which may yield undesir-able results of motor terminal overvoltages or increased leak-age current during switching instants (similar to RSPWM andAZSPWM2). As a result, while AZSPWM1 has found applica-tion [24], AZSPWM3 has been cautiously approached. It shouldalso be noted that AZSPWM methods have very high ripple atlow Mi (due to the fact that the zero states are replaced withactive vectors with opposite direction to the reference voltagevector) and at high Mi they are inferior to NSPWM as the


switching losses are higher [16]. Thus, although they are linearin the range of 0 < Mi < 0.907, AZSPWM methods shouldonly be used in regions where all other methods do not meet theperformance requirements of an inverter drive.

It should be noted that in all PWM methods, the injected zero-sequence signal is a low-frequency signal (periodic at 3ωe and/orits multiples, lower than the carrier frequency by at least an or-der of magnitude) which causes low-frequency CMV. At suchfrequencies the parasitic circuit components (capacitances) arenegligible (open-circuit) and, therefore, the zero-sequence volt-age has no detrimental effect on the drive and yields no commonmode current (CMC), unless low common mode impedance pathis provided by filter configurations included in the drive for thepurpose of ripple reduction [28], [29]. High-frequency CMV,on the other hand, can be harmful and can be reduced by PWMpulse pattern modification. Thus, the high-frequency CMV ef-fects (at the carrier frequency and higher) have been consideredhere.

V. IMPLEMENTATION

In this section, the practical implementation of the PWMmethods of Section IV is discussed. The modulation waves of thediscussed methods, which are shown in Fig. 7 are generated ac-cording to the simple magnitude rule approach discussed in Sec-tion III. Only several comparisons among the three sinusoidalreferences (original modulation waves) and several algebraicoperations are necessary to obtain the zero-sequence signal, asshown in Section III via examples. Having obtained the zero-sequence signal, it is added to the original modulation waves andthe final modulation signals result. From these signals, the dutycycles are calculated according to (7) and (8). The duty cyclesare checked and bounded to the range of 0 to 1 (in case overmod-ulation condition occurs). For SVPWM and DPWM1, a com-mon triangular carrier wave and for AZSPWM1, AZSPWM3,and NSPWM using a common triangular carrier wave but al-ternating its polarity according to Table I, are generated. De-termining the triangle polarity also involves only a comparisonof the sinusoidal references. These operations can be lumpedtogether with the zero-sequence signal determination stage tofurther minimize the computational burden. This task is leftto the implementation engineer as a straightforward procedure.Once the final modulation signals and triangles are obtained, theremaining task involves the sine-triangle comparison stage. Thiscomparison is performed to determine the switching instants viaa comparator for each phase.

The scalar PWM implementation of all the discussed meth-ods is an easy task compared to the space vector implementation(discussed at the end of Section II). The implementation can bebest realized on digital PWM units such as the modern mo-tion control or power management microcontrollers and DSPchips (which involve a well developed software programmabledigital PWM unit) [30] or dedicated FPGA units [31]–[33].Most modern commercial drives and power converters utilizesuch control chips which are offered at economical price. Thus,the approach can be readily employed in most power convertercontrol platforms. Employing such digital platforms, and con-

Fig. 10. PWM pulse pattern generation mechanism of the EPWM unit of theTMS320F2808 for (a) active high (vtri ), (b) active low (–vtri ).

sidering the simplicity of the scalar PWM algorithms, it is easyto program (combine) two or more PWM methods and onlineselect a modulator in each operating region in order to obtainthe highest performance [1]. Combination of SVPWM at lowMi and DPWM1 at high Mi is common in industrial drives.Combination of AZSPWM methods at low Mi and NSPWMat high Mi is an alternative approach for low CMV requiringapplications [27].

While operating at high Mi (such as full speed operation ofa drive or PWM rectifier operating under the normal operatingrange), overmodulation condition may occur due to dynamicsor other line or load variation conditions. In such cases, thetreatment of overmodulation can be included in the algorithmas a gain correction step as reported in [20], [21]. Since thegain functions of the discussed modulation waves are providedin [21] the compensation is an easy task.

VI. EXPERIMENTAL RESULTS

In the laboratory, the discussed PWM methods are imple-mented using the Texas Instruments TMS320F2808 fixed-pointDSP chip. In this chip, the PWM signals are generated by theenhanced PWM (EPWM) module of the DSP [30] which is ahardware digital circuit dedicated for the purpose of generatingthe PWM signals. The PWM period (thus the switching fre-quency), the deadtime, etc. are all parameters that are controlledby the user via software. The EPWM module includes an inter-nal counter clock (termed as “PERIOD”) which corresponds tothe triangular carrier wave. The value of this counter defines thehalf of the PWM period. One carrier cycle is completed as thecounter counts up from “0” to “PERIOD” and then decrementsdown to “0” again.

For every PWM cycle, the perphase duty cycles are calculatedfirst. Then, the duty cycles are converted to the count number asthey are scaled with the PERIOD. Since the EPWM module hastwo comparator registers (COMPA and COMPB) per phase, thecount number, its complementary, zero (0), or PERIOD valueare loaded to these counters depending on the pulse pattern tobe generated. In this application, the switching rule is definedas the PWM signal of the upper switch of an inverter phase (forinstance, Sa+ ) is at logic level “1” when the counter value isbetween the loaded values of comparator register A (COMPA)and comparator register B (COMPB) comparator registers (seeFig. 10), and at logic “0” otherwise (Sa− logic is complementaryof Sa+ ).


The conventional PWM pulse patterns [see Figs. 8 and 9(a)]are generated such that the PWM cycle starts and ends with theupper switches in the high “1” state, (often termed as “activehigh” [24]) except for the PWM periods where the switchingceases in DPWM methods. Generating this pulse pattern, whichis shown in Fig. 10(a), involves loading register COMPB withthe zero “0” value, and register COMPA with the Sa+ duty cy-cle da+ ·PERIOD. Methods involving PWM periods with activelow (corresponding to the−vtri case), corresponding to the pulsepattern of Fig. 10(b), require loading the register COMPA withthe value PERIOD and the register COMPB with its comple-mentary (1 − da+ )·PERIOD. Thus, conventional methods useonly the pulse pattern of Fig. 10(a), while RCMV-PWM methodsuse both. The PWM pulse pattern generation procedure is sum-marized in the flowchart of Fig. 11 for AZSPWM1. Note thatthe zero-sequence signal generation and the alternating trian-gle determination (region R determination) stages are gatheredfor reduced computations. While the flowchart is generated forAZSPWM1, the approach is the same and straightforward forall other discussed methods.

Employing the scalar implementation approach and utiliz-ing the TMS320F2808 DSP platform, PWM signals are pro-grammed and applied to a three-phase VSI. Inverter upperswitch (Sa+ , Sb+ , and Sc+ ) logic signals and the inverter outputcommon mode voltage (vcm ) waveforms for two PWM periodsare shown in Fig. 12(a) and(b) for SVPWM and AZSPWM1,respectively (compare with Figs. 8 and 9(c), respectively). Thisdemonstrates that all the intended pulse patterns can be eas-ily generated. Note that SVPWM utilizes zero vectors (000)and (111) which cause a CMV of −Vdc/2 and Vdc/2, respec-tively. In AZSPWM1, only active switch states are utilized;thus, the CMV is limited to Vdc/6. Fig. 13 shows inverter out-put voltages (vao , vbo , vco ) and the line-to-line voltages (vab )of SVPWM and AZSPWM1. While in SVPWM the line-to-line voltages are unipolar, AZSPWM1 line-to-line voltages arebipolar [16]. Bipolar voltage pulses result in higher output cur-rent ripple compared to unipolar voltage pulses, and they maycause overvoltages at the motor terminals in long-cable appli-cations [14]. However, solutions for these problems have beenprovided in [24] and [27] as a part of the PWM algorithm.

A 4 kW, 1440 min−1 , 380 Vll−rms induction motor is drivenfrom the VSI in the constant V/f mode (176.7 Vrms /50 Hz)and the PWM frequency is 6.6 kHz for CPWM methods and10 kHz for DPWM methods to provide equal average switch-ing frequency. Operation at Mi = 0.8 (180.3 Vrms /51 Hz, 1510min−1) is discussed. The modulation waves (obtained by pass-ing switch logic signals through a low-pass filter designed forthe purpose of illustration of the modulation method), phasecurrents, common mode voltage and currents of the consideredmethods are shown in Fig. 14. As can be seen from the diagramsall the discussed methods provide satisfactory performance atthe high Mi . NSPWM provides low motor current ripple andCMV/CMC. SVPWM and DPWM1 have low current ripple buthigh CMV/ CMC. AZSPWM3 has high CMV and CMC mag-nitude compared to NSPWM, but its CMV/CMC frequency isless. AZSPWM1 has higher PWM current ripple and compara-ble CMV/CMC to NSPWM.

Fig. 11. PWM pulse pattern generation flowchart for AZSPWM1.

The aforementioned waveforms demonstrate that the variousPWM methods can be easily implemented with the generalizedscalar PWM approach. As a result, the inverter design engineerscan choose among the offered various PWM methods based onthe performance requirement of the application and easily imple-ment one of the methods or a combination of various methods.Thus, the PWM method implementation procedure becomes aneasy task. It should be noted that various choices exist in terms


Fig. 12. Experimental inverter upper switch (Sa+ , Sb+ , Sc+ ) logic signals(top three, 5 V/div) and the inverter output CMV (vcm ) (bottom, 200 V/div)waveforms: (a) SVPWM and (b) AZSPWM1 (time scale: 20 μs/div).

Fig. 13. Experimental inverter output voltages (va o , vb o , vc o )(top three, 100 V/div) and the line-to-line voltage (va b ) (bottom, 200 V/div)waveforms: (a) SVPWM and (b) AZSPWM1 (time scale: 20 μs/div).

of implementation platforms. Especially high control bandwidthapplications such as servodrives and vector controlled industrialdrives are increasingly employing FPGA units for current reg-ulation and PWM pulse pattern generation due to fast responseand flexible programming capability of FPGA units [31]–[33].

Fig. 14. Experimental phase current (top, 2 A/div), CMC (top, 500 mA/div),CMV (bottom, 200 V/div), and modulation signal (bottom, 0.2 unit/div),waveforms (Mi = 0.8, fs -ave = 6.6 kHz). (a) SVPWM. (b) AZSPWM1.(c) AZSPWM3. (d) DPWM1. (e) NSPWM. (time scale: 2 ms/div).


In FPGAs, it is possible to program any pulse pattern that gen-eralized scalar PWM approach covers.

VII. CONCLUSION

PWM principles are reviewed for three-phase, three-wire in-verter drives. The characteristics, pulse patterns, and implemen-tation of the popular PWM methods are discussed. The gen-eralized scalar PWM approach is established and it is shownthat it unites the conventional PWM methods and most recentlydeveloped reduced common mode voltage PWM methods un-der one umbrella. Through a detailed example, the method togenerate the pulse patterns of these PWM methods via the gen-eralized scalar PWM approach is illustrated. It is shown thatthe generalized scalar approach yields a simple and powerfulimplementation with modern control chips which have digitalPWM units. With this approach, it becomes an easy task toprogram the pulse patterns of various high performance PWMmethods and benefit from their performance in modern VSIs forapplications such as motor drives, PWM rectifiers, and activefilters.

The theory is verified by laboratory experiments. It is demon-strated that with the proposed approach both the conventionalPWM pulse patterns (such as those of SVPWM and DPWM1)and the recently developed improved high-frequency com-mon mode voltage/current performance method pulse patterns(NSPWM, AZSPWM1, and AZSPWM3) can be easily gen-erated. Applying such pulse patterns to motor drives, it hasbeen demonstrated that NSPWM, AZSPWM1, and AZSPWM3methods provide good performance. Thus, the inverter designengineers are encouraged to include such pulse patterns in theirdesigns.

REFERENCES

[1] A. M. Hava, R. J. Kerkman, and T. A. Lipo, “Simple analytical and graph-ical methods for carrier-based PWM-VSI drives,” IEEE Trans. PowerElectron., vol. 14, no. 1, pp. 49–61, Jan. 1999.

[2] J. Holtz, “Pulse width modulation for electronic power conversion,” Proc.IEEE, vol. 8, no. 8, pp. 1194–1214, Aug. 1994.

[3] H. V. D. Broeck, H. Skudelny, and G. Stanke, “Analysis and realizationof a pulse width modulator based on voltage space vectors,” in Proc.Conf. Rec. IEEE Inst. Aeronautical Sciences (IAS) Annu. Meeting, 1986,pp. 244–251.

[4] Y. Y. Tzou, H. J. Hsu, and T. S. Kuo, “FPGA-based SVPWM controlIC for 3-phase PWM inverter,” in Proc. IEEE Int. Conf. Ind. Electron.,Control Instrum., 1996, vol. 1, pp. 138–143.

[5] D.-W. Chung, J.-S. Kim, and S.-K. Sul, “Unified voltage modulationtechnique for real-time three-phase power conversion,” IEEE Trans. Ind.Appl., vol. 34, no. 2, pp. 374–380, Mar. 1998.

[6] D. C. Lee and G.-M. Lee, “A novel overmodulation technique for space-vector PWM inverters,” IEEE Trans. Power Electron., vol. 13, no. 6,pp. 1144–1151, Nov. 1998.

[7] A. R. Bakhshai, G. Joos, P. K. Jain, and J. Hua, “Incorporating the over-modulation range in space vector pattern generators using a classificationalgorithm,” IEEE Trans. Power Electron., vol. 15, no. 1, pp. 83–91, Jan.2000.

[8] Z. Shu, J. Tang, Y. Guo, and J. Lian, “An efficient SVPWM algorithmwith low computational overhead for three-phase inverters,” IEEE Trans.Power Electron., vol. 22, no. 5, pp. 1797–1805, Sep. 2007.

[9] A. Cataliotti, F. Genduso, A. Raciti, and G. R. Galluzzo, “GeneralizedPWM–VSI control algorithm based on a universal duty-cycle expression:Theoretical analysis, simulation results, and experimental validations,”IEEE Trans. Ind. Electron., vol. 54, no. 3, pp. 1569–1580, Jun. 2007.

[10] A. Schonung and H. Stemmler, “Static frequency changers with subhar-monic control in conjunction with reversible variable speed ac drives,”Brown Boveri Rev., vol. 51, no. 8–9, pp. 555–577, Sep. 1964.

[11] M. Depenbrock, “Pulse width control of a 3-phase inverter with nonsinu-soidal phase voltages,” in Proc. IEEE-Int. Semiconductor Power ConverterConf. Rec., 1977, pp. 399–403.

[12] Y. S. Lai and F. S. Shyu, “Optimal common-mode voltage reductionPWM technique for inverter control with consideration of the dead-timeeffects. Part I: Basic development,” IEEE Trans. Ind. Appl., vol. 40, no. 6,pp. 1605–1612, Nov./Dec. 2004.

[13] J. Zitzelberger and W. Hofmann, “Reduction of bearing currents in inverterfed drive applications by using sequentially positioned pulse modulation,”Eur. Power Electron. Drives J., vol. 14, no. 4, pp. 19–25, 2004.

[14] E. Un and A. M. Hava, “A near state PWM method with reduced switchingfrequency and reduced common mode voltage for three-phase voltagesource inverters,” IEEE Trans. Ind. Appl, vol. 45, no. 2, pp. 782–793,Mar./Apr. 2009.

[15] M. Cacciato, A. Consoli, G. Scarcella, and A. Testa, “Reduction of com-mon mode currents in PWM inverter motor drives,” IEEE Trans. Ind.Appl., vol. 35, no. 2, pp. 469–476, Mar./Apr. 1999.

[16] A. M. Hava and E. Un, “Performance analysis of reduced common modevoltage PWM methods and comparison with standard PWM methodsfor three-phase voltage source inverters,” IEEE Trans. Power Electron.,vol. 24, no. 1, pp. 241–252, Jan. 2009.

[17] D. G. Holmes, “The significance of zero space vector placement for carrier-based PWM schemes,” IEEE Trans. Ind. Appl., vol. 32, no. 5, pp. 1122–1129, Sep./Oct. 1996.

[18] V. Blasko, “Analysis of a hybrid PWM based on modified space-vectorand triangle-comparison methods,” IEEE Trans. Ind. Appl., vol. 33, no. 3,pp. 756–764, May/Jun. 1997.

[19] A. M. Hava, R. J. Kerkman, and T. A. Lipo, “A high performance gener-alized discontinuous PWM algorithm,” IEEE Trans. Ind. Appl., vol. 34,no. 5, pp. 1059–1071, Sep./Oct. 1998.

[20] A. M. Hava, S. Sul, R. J. Kerkman, and T. A. Lipo, “Dynamic overmodula-tion characteristics of triangle intersection PWM methods,” IEEE Trans.Ind. Appl., vol. 35, no. 4, pp. 896–907, Jul./Aug. 1999.

[21] A. M. Hava, R. J. Kerkman, and T. A. Lipo, “Carrier-based PWM-VSIovermodulation strategies: Analysis, comparison, and design,” IEEETrans. Power Electron., vol. 13, no. 4, pp. 674–689, Jul. 1998.

[22] N. O. Cetin and A. M. Hava, “Scalar PWM implementation methods forthree-phase three-wire inverters,” in Proc. ELECO 2009, 6th Int. Conf.Electr. Electron. Eng., Bursa, Turkey, Nov. 5–8, pp. 447–451.

[23] C. C. Hou and P. T. Cheng, “A multicarrier pulse width modulator forthe auxiliary converter and the diode rectifier,” in Proc. Int. Conf. IEEEPower Electron. and Drive Syst. (PEDS), 2009, pp. 393–398.

[24] R. M. Tallam, R. J. Kerkman, D. Leggate, and R. A. Lukaszewski,“Common-mode voltage reduction PWM algorithm for AC drives,” inProc. IEEE ECCE 2009 Conf. Rec., pp. 3660–3667.

[25] G. L. Skibinski, R. J. Kerkman, and D. Schlegel, “EMI emissions ofmodern PWM AC drives,” IEEE Ind. Appl. Soc. Mag., vol. 5, no. 6,pp. 47–81, Nov./Dec. 1999.

[26] R. J. Kerkman, D. Leggate, and G. L. Skibinski, “Interaction of drivemodulation and cable parameters on AC motor transients,” IEEE Trans.Ind. Appl., vol. 33, no. 3, pp. 722–731, May/Jun. 1997.

[27] E. Un and A. M. Hava, “A High performance PWM algorithm for commonmode voltage reduction in three-phase voltage source inverters,” in Proc.IEEE Power Electron. Spec. Conf. (PESC), Rhodes, Greece, Jun. 15–19,2008, pp. 1528–1534.

[28] H. Akagi, H. Hasegawa, and T. Doumoto, “Design and performance ofa passive EMI filter for use with a voltage-source PWM inverter havingsinusoidal output voltage and zero common-mode voltage,” IEEE Trans.Power Electron., vol. 19, no. 4, pp. 1069–1076, Jul. 2004.

[29] H. Akagi and T. Doumoto, “An approach to eliminating high-frequencyshaft voltage and ground leakage current from an inverter-driven motor,”IEEE Trans. Ind. Appl., vol. 40, no. 4, pp. 1162–1169, Jul./Aug. 2004.

[30] TMS320 x280x, 2801x Enhanced Pulse Width Modulator (ePWM) ModuleReference Guide, SPRU791F, Texas Instruments, Nov. 2004– Revised Jul.2009.

[31] E. Jung, H-J. Lee, and S-K. Sul, “FPGA-based motion controller with ahigh bandwidth current regulator,” in Proc IEEE Power Electron. Spec.Conf. (PESC), Rhodes, Greece, Jun. 15–19,2008, pp. 3043–3047.

[32] Z. Shu, J. Tang, Y. Guo, and J. Lian, “An efficient SVPWM algorithmwith low computational overhead for three-phase inverters,” IEEE Trans.Power Electron., vol. 22, no. 5, pp. 1797–1805, Sep. 2007.

[33] R. K. Pongiannan, S. Paramasivam, and N. Yadaiah, “Dynamically recon-figurable PWM controller for three-phase voltage source inverters,” IEEETrans. Power Electron., Sep. 2010.


Ahmet M. Hava (S’91–M’98) was born in Mardin,Turkey, in 1965. He received the B.S. degree fromIstanbul Technical University, Istanbul, Turkey, in1987, and the M.Sc. and Ph.D. degrees from the Uni-versity of Wisconsin, Madison, in 1991 and 1998,respectively, all in electrical engineering.

In 1995, he was with Rockwell Automation-Allen Bradley Company, Mequon, WI,. From 1997to 2002, he was with Yaskawa Electric America, Inc.,Waukegan,IL,. Since 2002, he has been with the De-partment of Electrical and Electronics Engineering,

Middle East Technical University, Ankara, Turkey, where he is currently an As-sociate Professor. His research interests include power electronics, motor drives,and power quality.

N. Onur Cetin (S’10) was born in Ankara, Turkey,in 1985. He received the B.S. degree from BaskentUniversity, Ankara, in 2007, and the M.Sc. degreefrom Middle East Technical University, Ankara, in2010, both in electrical engineering.

Since 2008, he has been a Research Assistant withthe Department of Electrical and Electronics Engi-neering, Middle East Technical University. His cur-rent research interests include voltage-source invert-ers, PWM methods, and common-mode noise, andits reduction techniques in ac motors.

generalized scalar pwm

Documents