FYS3240

PC-based instrumentation and microcontrollers

Repetition & Exam preparations

Spring 2011 – Lecture #13

Bekkeng, 28.5.2011

Curriculum

• Lectures

• Laboratory exercises

• The textbook readings complement the lectures

Textbooks:

• Ørjan G. Martinsen: PC-basert instrumentering og mikrokontrollere, 2006.

Gyldendal. ISBN: ISBN-13: 978-82-05-31569-3.

• Gary Johnson and Richard Jennings: LabVIEW Graphical Programming,

Fourth Edition, 2006. McGraw-Hill Professional. ISBN: 978-0071451468 .

Exam

questions

Microprocessors vs. Microcontrollers

UART

• UART = Universal Asynchronous

Receiver/Transmitter.

• A UART is usually an individual integrated circuit

used for serial communications over a computer or

peripheral device serial port.

• UARTs are now commonly included in

microcontrollers.

• A dual UART, or DUART, combines two UARTs into

a single chip.

• Many modern ICs now come with a UART that can

also communicate synchronously; these devices are

called USARTs (universal

synchronous/asynchronous receiver/transmitter).

Interrupt on ATmega

• Alle avbrudd er i utgangspunktet maskert vekk når mikrokontrolleren starter

opp, slik at disse må enables først. I tillegg må globale avbrudd enables i

statusregisteret.

• Inkluderer io.h og interrupt.h for å få tilgang til register- og avbruddshåndtering

#include <avr/io.h>

#include <avr/interrupt.h>

// Enabler avbrudd på external interrupt 0 og 1 falling edge

MCUCR |= (1<<ISC11)|(1<<ISC01); // Avbrudd på fallende flanke

GICR |= (1<<INT1)|(1<<INT0); // Enabler avbrudd på INT1 og INT0

// Enabler globale avbrudd

sei();

// Globale avbrudd kan skrues av

med kommandoen cli() (lik asm("cli"))

while(1); // Vent på avbrudd

Tilkoblinger på STK500:SW0 -> PD2 (INT0)

SW1 -> PD3 (INT1)

LED0 -> PB0

LED1 -> PB1

Data acquisition (DAQ)

• Data acquisition involves measuring signals (from a real-world

physical system) from different sensors, and digitizing the

signals for storage, analysis and presentation.

• Analog input channels can vary in number from one to several

hundred or even thousands

Computer-based DAQ system:

Windows architecture

• Ring 0 : ”all rights”

– operating system (kernel)

• Ring 3 : limited rights e.g. related to I/O

– Applications (user programs)

32 bit Windows XP

Privilege levels in Windows

• Need a device driver in order to

allow hardware I/O operations

from application programs

The most common data acquisition

buses available today

Husk

disse!

Bus bandwidth and latency

comparison

External computer ports and buses

• RS-232

• RS-422

• RS485

• USB

• FireWire (IEEE 1394)

Not directly available on the

computer, but a converter attached to

USB or RS-232 can be used

DAQ-card input signal configuration

– DAQ input channels can be configured in two ways:

• Differential

• Single-ended

– Referenced Single-Ended (RSE)

– Non-Referenced Single-Ended (NRSE)

– The optimal connection depends on how your signal is

grounded

Diff SE

Hardware Filtering

• Filtering

– To remove unwanted signals from the signal that you are trying to

measure

• Anti-aliasing low-pass filtering (before the A/D converter)

– To remove all signal frequencies that are higher than the input

bandwidth of the device. If the signals were not removed, they

would erroneously appear as signals within the input bandwidth of

the device (known as aliasing)

Frequency Domain:

Want a small transition band!

Sampling Example

Aliased Signal

Adequately Sampled

for Frequency Only

(Same # of cycles)

Adequately Sampled

for Frequency and

Shape

100Hz Sine Wave

100Hz Sine Wave

Sampled at 100Hz

Sampled at 200Hz

Sampled at 1kHz100Hz Sine Wave

ADC architectures

• Multiplexed

• Simultaneous

sampling

PXI-based DAQ systems

• The benefits of PXI-based data acquisition systems include

rugged packaging that can withstand the harsh conditions that

often exist in industrial applications.

• PXI systems also offer a modular architecture, which means

that you can fit several devices in the same space as a single

stand-alone instrument, and you have the ability to expand your

system far beyond the capacity of a desktop computer with a

PCI/PCIe bus.

• One of the key advantages of a PXI system is the integrated

timing and synchronization.

Transferring Data from DAQ-card to

System Memory

Streaming to Disk

Interrupts

• The slowest method to move acquired data to system memory

is for the DAQ-card to generate an interrupt request (IRQ).

signal. This signal can be generated when one sample is

acquired or when multiple samples are acquired. The process

of transferring data to system memory via interrupts is given

below:

– When data is ready for transfer, the CPU stops whatever it is doing

and runs a special interrupt handler routine that saves the current

machine registers, and then sets them to access the board.

– The data is extracted from the board and placed into system

memory.

– The saved machine registers are restored, and the CPU returns to

the original interrupted process.

• The actual data move is fairly quick, but there is a lot of

overhead time spent saving, setting up, and restoring the

register information.

DMA (direct memory access)

• DMA permits peripherals, such as a DAQ-card, to transfer data directly to or

from memory without having each byte handled by the processor (CPU). Thus

DMA enables more efficient use of interrupts, and increases data throughput.

• The process of transferring data via DMA is given below:

– When data is ready for transfer, the DAQ-card notifies the DMA controller.

– The DMA controller then asserts a DMA request signal to the CPU, asking its

permission to use the bus (data bus, address bus, control bus).

– The CPU completes its current bus activity, stops driving the bus, and returns a DMA

acknowledge signal to the DMA controller.

– The DMA controller then reads and writes one or more memory bytes, driving the

address, data, and control signals as if it were itself the CPU.

– When the transfer is complete, the DMA controller stops driving the bus and deasserts

the DMA request signal. The CPU can then remove its DMA acknowledge signal and

resume control of the bus.

– In single-cycle mode, the DMA controller gives up the bus after each transfer. This

minimizes the amount of time that the DMA controller keeps the processor off of the

memory bus, but it requires that the bus request/acknowledge sequence be performed

for every transfer. This overhead can result in a drop in overall system throughput if a

lot of data needs to be transferred.

– In burst mode, the DMA controller keeps control of the bus until all the data buffered

by the requesting device has been transferred to memory (or when the output device

buffer is full, if writing to a peripheral).

DMA intro

HDD Performance

• HDD’s Internal Data Rate (IDR) = density x RPM x disk diameter

• Outer HDD track is faster, inner track is slower

• Example above: 62 MB/s at outer track, 36 MB/s at inner track

• Windows OS allocates file space from outer track and inward

Track

Sector

SSDs pros and cons

• Pros

– Robustness (Less susceptible to

vibrations and shock)

– Increased write/read speeds

(low access time and latency)

– Not a drop in write speed when the

memory fills up (as for HDDs)

– Low boot-up time (for OS) and quicker

application-launches

• Cons

– High cost (per GB)

– Low capacity (in # GB)

– Great quality variations have been

experienced

– Reduced write speed experienced over

time (for some suppliers)

RAID

• RAID = Redundant Array of Independent Drives.

• RAID is a general term for mass storage schemes that split or replicate

data across multiple hard drives. – To increase write/read performance and/or increase safety (redundancy)

Determining Storage Format

When determining the appropriate storage format for the data,

consider the following:

• What will you do with your data once you have acquire them?

• Will you write and read data with the same application?

• How much data will you acquire?

• At what rate will you acquire data?

• Will you need to exchange data with another program?

• Will you need to search your data files?

– ASCII

– Binary

– TDMS

– Config File

– Spreadsheet

– AVI

– XML

– …..

Bad Programming Structure for High-

speed acquisition and storage

Sequential structure:

High-speed DAQ

• Based on the producer-consumer architecture with use of

queues

Producer loop

Consumer loop

Can use unbuffered

file I/O to increase

write/read speed

Local & Global variables

• Minimize the use (especially

global variables)

• Global variables can create

race conditions!

– When two or more events can

occur in any order, but they need

to occur in a particular order

– The data dependency (dataflow) in

LabVIEW generally prevents race

conditions, but global variables

provides a way to violate the strict

dataflow

– Use global variables only when no

other good options!

Software Timing

• Attempts to resolve milliseconds on a PC within the limitations of the

operating system (such as Windows)

• If you need better resolution or accuracy (determinism) you have to use

a hardware solution (“software in the loop” degrades precision)

Hardware Timing

• Necessary for high-resolution and high-accuracy timing

• Hardware timing can give ns to µs accuracy (recall that

software timing gives accuracy in the ms range)

• Ordinary DAQ-cards includes a stable crystal oscillator (for the

ADC) that gives a resolution of µs or better, and this can be

used for timing

Signal based vs. time-based

synchronization

• Signal-based synchronization involves sharing signals such

as clocks and triggers directly (wires) between nodes that need

to be synchronized.

• Time-based synchronization involves nodes independently

synchronizing their individual clocks based on some time

source, or time reference.

• There are advantages and disadvantages to both methods of

device synchronization.

Synchronization Basics

Signal-based synchronization

• In systems where the devices are near each other, sharing a

common timing signal is generally the easiest and most

accurate method of synchronization.

• For example, modular instruments in a PXI chassis all share a

common 10 MHz clock signal from the PXI backplane

• To accurately use a common timing signal, a device must be

calibrated to account for the signal propagation delay from the

timing source to the device

Time-based synchronization

• Necessary for long distances

• Because of the inherent instabilities in (crystal oscillator) clocks,

distributed clocks must be synchronized continually to a time

refererence to match each other in frequency and phase.

• Time references:

– GPS

– IEEE 1588 masters

– IRIG-B sources

• By connecting a GPS with NTP-

server to a LAN, computers

can synchronize their clocks

within ms using standard

Ethernet connections

IRIG = Inter Range Instrumentation Group

NTP = Network Time Protocol

Timing and Synchronization

Systems

What is NTP?

Sharing information - classifications

• Publishing Data – Generates a static Web report (access through a

standard Web browser)

• Sharing Data – Expands the concept of publishing data to include

transferring the actual data among computers where you can perform

different analyses on that data, depending on your needs. Some

applications require streaming the actual data for additional

processing, storage, or monitoring

• Remote Control – Expands the concept of sharing data to include

enabling another computer to connect to the experiment and control

that experiment remotely.

• Distributed Execution – Combines several of the concepts by

developing a system architecture that shares the acquisition and

analysis of the test among several computers.

Three types of DAQ

• Local DAQ

– Signals to be measured and the computer are

placed close to each other

– Typically a plug-in DAQ-card is used in a PC,

or a USB DAQ or PXI unit is connected to the

computer

• Remote DAQ

– Transfer data from a remote DAQ device to a

single PC (host)

• Networked (distributed) DAQ

– Distribute measurement data to several clients

connected to a network

– Enable a central computer to acquire all of the

data from several machines and then process

or store that data

uC

RS-232

RS-422

Ethernet

Networked DAQ Example

• One PC connected to a PXI chassis acquire, display, and

store all measurement data from several sensor systems

• Remote clients needs access to the sensor data, to display

and process the data in ”real-time”.

UUT = Unit Under Test

UUT2

UUT3

UUT4

UUT1

PXI chassis

PC

Client 1

Client 2

Client n

SwitchEthernet

IP and TCP

• TCP and IP are two of the most important communication

protocols used for the Internet

• TCP = Transmission Control Protocol, IP = Internet Protocol

• TCP complements the Internet Protocol (IP), which is

unreliable

• TCP/IP: IP handles addressing and routing of message,

while TCP provides a reliable and in sequence data delivery

without errors, loss (no packets are lost) or duplication

• TCP:

– Flow control (does not send data faster than the receiver can

read)

– Saturation control (slower transmission when network

problems)

– Retransmission of data when needed (data lost or not

acknowledged in time)

• Example of use of TCP/IP: File transfer (FTP), HTTP

UDP

• Used for broadcast and multicast of data

• Not reliable (packets can be lost)

• UDP:

– No flow control

– No saturation control

– No retransmission of data

• UDP share the same delivery problems as IP

• However,

– UDP does not wait to confirm a connection before data

transmission, and therefore no delay is introduced

– Small overhead (compared to TCP)

– UDP send rate only limited by the rate of data generation, CPU,

clock rate and access to Internet bandwidth

• Example of use of UDP:

– Video-conference (video distribution)

– Sensor data distribution

– NTP (network time protocol)

UDP is

fast

Architecture for Advanced

CompactRIO Applications

TCP/IP, UDP

Queues (FIFOs), variables

TCP/IP, UDP

FPGA advantages

• High reliability

• High determinism

• High performance

• True parallelism

• Reconfigurable

Common Applications for FPGAs

• High-speed control

• Intelligent DAQ

– The DAQ-card has a reconfigurable FPGA, which enables onboard user

defined processing, allows different sampling frequencies on the I/O

channels, and advanced timing/synchronization

• Digital communication protocols

– e.g. SPI

• Sensor simulation

• Onboard processing and data reduction

– e.g. video processing

• Co-processing

– offload the CPU

Hybrid architecture example using

COTS

• Numerical Computing

– two NI 8353 multicore

computers

– one nVIDIA® Tesl GPU

computing system (with four

GPUs)

• Real-Time Measurement and

Control

– two PXIe chassis

– embedded controllers with a

multicore CPU

– FPGA-based data

acquisition/control boards

Eksamen - 14. juni kl. 09:00 (3 timer)

• Hjelpemidler: Ingen

Eksempel på spørsmål

• Hva er et interrupt, og hvorfor brukes DMA i stedet for interrupts

for å lese data fra et DAQ-kort?

• Hva er problemet med globale variable for å distribuere data

mellom to parallelle løkker (tråder), og hvordan kan dette

implementeres for å unngå disse problemene?

• Skriv et program i C for en ATmega mikrokontroller som skal

gjøre følgende…….

• Gitt at du har et distribuert PC-basert datainnsamlingssystem,

hvor én “server” PC skal sende data til flere klienter via

Ethernet. Lav tidsforsinkelse er viktig.

– Hva slags overføringsprotokoll ville du valgt? Begrunn svaret.

Noen relevante spørsmål fra tidligere

eksamen

• Hva brukes drivere til i et operativsystem som Microsoft Windows?

• Tegn et blokkskjema for de viktigste funksjonelle delene av en AVR ATmega16

eller ATmega32 og forklar i korte trekk hva de forskjellige delene er.

• Programmeringsoppgave: Tenk deg at du bruker det lab-oppsettet som du er

vant med fra kurset, d.v.s. et STK500-kort med en ATmega mikrokontroller.

Skriv et lite program i C for denne mikrokontrolleren og forklar så med ord hva

programmet gjør. Hvis du vil bruke en biblioteksfunksjon men ikke husker

hvordan den er deklarert, så bare skriv hvilke antakelser du gjør.

• Ved asynkron seriell overføring på RS-232 porten brukes en spesiell

konvensjon med startbit, stoppbit, osv. Forklar.

• RS-232-porten er i ferd med å forsvinne fra moderne PC-er. Hvilke eksterne

porter eller busser er det som overtar for RS-232? Fortell det du vet om disse

portene eller bussene.

• Hva er en mikrokontroller, og hva skiller den fra en PC og en mikroprosessor?

Noen relevante spørsmål fra tidligere

eksamen II

• Skriv et enkelt C-program for en AVR ATmega323 mikrokontroller som leser

kontinuerlig fra åtte brytere som er tilkoblet port A. Åtte lysdioder er tilkoblet

port B. Disse skal lyse kontinuerlig når ingen brytere på port A er aktivert. Når

en bryter aktiveres på port A skal tilsvarende lysdiode på port B slukke.

• Hva er en buss i datamaskinsammenheng?

• Nevn to forskjellige busser fra forskjellige generasjoner av PC-er. Nevn noen

egenskaper og forskjeller ved disse to bussene.

• Skriv et enkelt program for AVR ATmega323 som leser kontinuerlig fra brytere

tilkoblet port A og skriver verdiene ut på lysdioder tilkoblet port B. Tegn opp

hvordan du vil koble bryterne og lysdiodene

• Utviklingen de siste årene har gått i retning av serielle busser og porter. Nevn

noen grunner for at man satser på seriell, og ikke parallell, overføring.

• Hva er avbrudd, og hvilke typer avbrudd har man i en vanlig PC?