FUNDAMENTALS FUNDAMENTALS OF IC ASSEMBLYOF IC ASSEMBLY

By Marko Bundalo & Paul KasemirBy Marko Bundalo & Paul Kasemir

Objectives and IntroObjectives and Intro Define and describe the purpose of IC assemblyDefine and describe the purpose of IC assembly IC goes through various processes/steps before it IC goes through various processes/steps before it

can be used in electronic systemcan be used in electronic system IC assembly – most important first step in the use IC assembly – most important first step in the use

of ICof IC Introduce three technologies: Introduce three technologies:

WirebondWirebond

tape automated bondingtape automated bonding

flip chipflip chip Future trendsFuture trends

9.1 What is IC Assembly9.1 What is IC Assembly IC assembly – the first processing step after wafer IC assembly – the first processing step after wafer

fabrication and singulation that enables ICs to be fabrication and singulation that enables ICs to be packaged for systems use.packaged for systems use.

Process of electrically connecting I/O bond pads on the Process of electrically connecting I/O bond pads on the IC to the corresponding bond pads on the package.IC to the corresponding bond pads on the package.

Single chip package, multichip package, system level Single chip package, multichip package, system level board.board.

Three interfaces:Three interfaces:

(1)(1) Metallurgical bond pad interface on the ICMetallurgical bond pad interface on the IC

(2)(2) Metallurgical bond pad interface on the package Metallurgical bond pad interface on the package

(3)(3) Electrical interconnection between these two interfacesElectrical interconnection between these two interfaces

9.2 Purpose of IC 9.2 Purpose of IC AssemblyAssembly

Enable an IC to be electrically interconnected to the Enable an IC to be electrically interconnected to the package, and to allow that IC to be handled, tested package, and to allow that IC to be handled, tested and “burnt-in”and “burnt-in”

Such “qualified” IC used in electronic product.Such “qualified” IC used in electronic product. Interconnected to other ICs, passives, flat panel Interconnected to other ICs, passives, flat panel

displays, keyboards, sensors, connectors, antennas, displays, keyboards, sensors, connectors, antennas, switches, etc.switches, etc.

PRIMARY purpose – enable ICs to be interconnected PRIMARY purpose – enable ICs to be interconnected with rest of the system.with rest of the system.

Primary functions of IC assembly:Primary functions of IC assembly:

(1)(1) To provide signal and power distribution of the To provide signal and power distribution of the packaged IC to the system.packaged IC to the system.

(2)(2) To provide mechanical support to fragile ICTo provide mechanical support to fragile IC

(3)(3) To provide environmental protection of the ICTo provide environmental protection of the IC

9.3 Requirements for IC 9.3 Requirements for IC AssemblyAssembly

1.1. To provide To provide acceptable electrical propertiesacceptable electrical properties such as capacitance resistance, and such as capacitance resistance, and inductance.inductance. (wirebonds have long lengths resulting in (wirebonds have long lengths resulting in high impedance and longer signal delay times)high impedance and longer signal delay times)

2.2. IC assembly technologies should provide a IC assembly technologies should provide a low low costcost solution for the electrical interface solution for the electrical interface between the chip and package.between the chip and package.

3.3. High Throughput manufacturingHigh Throughput manufacturing. . 4.4. High ReliabilityHigh Reliability. . (Flip chip on ceramic technology has (Flip chip on ceramic technology has

been a highly reliable interconnection technique)been a highly reliable interconnection technique)

5.5. RepairabilityRepairability where the interconnection where the interconnection between the IC and the package should provide between the IC and the package should provide replacement with a new high quality IC.replacement with a new high quality IC.

IC Assembly IC Assembly TechnologiesTechnologies

Chip-to-package accomplished using three primary Chip-to-package accomplished using three primary interconnection technologies:interconnection technologies:

Wirebonding Wirebonding Tape automated bonding (TAB)Tape automated bonding (TAB) Flip chipFlip chip

Wafer-level Wafer-level technology (Ch. 10)technology (Ch. 10)

WIREBONDINGWIREBONDING Technology is originated with AT&T’s beam lead Technology is originated with AT&T’s beam lead

bonding in 1950sbonding in 1950s Chip-to-package interconnection technique where fine Chip-to-package interconnection technique where fine

metal is attached between each of the I/O pads on the metal is attached between each of the I/O pads on the chip, one at the time.chip, one at the time.

Two major types of wirebonds: Two major types of wirebonds: gold ball bondinggold ball bonding & & aluminum wedge bondingaluminum wedge bonding

Focus on ball bonding, since it dominates this technology.

Gold wire (25µm thickness) is bonded using ultrasonic bonding between the IC bond pad and the matching package pad.

Well over 90% of all chip-to-package interconnections formed in 1999.

(Dis)advantages(Dis)advantages The advantages of wirebonding:The advantages of wirebonding:

Highly flexible chip-to-package interconnection Highly flexible chip-to-package interconnection processprocess

Low defect rates or high yield interconnection Low defect rates or high yield interconnection processingprocessing

Easily programmed Easily programmed High reliability interconnection structure High reliability interconnection structure Very large industry infrastructure supporting the Very large industry infrastructure supporting the

technologytechnology Rapid advances in equipment, tools, and material Rapid advances in equipment, tools, and material

technologytechnology The disadvantages of wirebonding:The disadvantages of wirebonding:

Slower interconnection rates due to point-to-point Slower interconnection rates due to point-to-point processing of each wirebondprocessing of each wirebond

Long chip-to-package interconnection lengths, Long chip-to-package interconnection lengths, degrading electrical performancedegrading electrical performance

Larger footprint required for chip to package Larger footprint required for chip to package interconnectioninterconnection

Overall ProcessesOverall Processes Plastic packaging used worldwidePlastic packaging used worldwide

Ball BondingBall Bonding – – the most common technique (over 95%)the most common technique (over 95%) Wedge BondingWedge Bonding – – the finest pitch bonding capabilities, the finest pitch bonding capabilities,

because the fact that the bonds can be formed by because the fact that the bonds can be formed by deforming the wire only 25-30% beyond the original deforming the wire only 25-30% beyond the original diameter.diameter.

Fundamentals of Ultrasonic BondingFundamentals of Ultrasonic Bonding – – Theory Theory states that ultrasonic energy allows the materials to states that ultrasonic energy allows the materials to plastically deform at much lower stress compared to pure plastically deform at much lower stress compared to pure thermal or mechanical energy.thermal or mechanical energy.

Materials Used in Wirebonding Materials Used in Wirebonding – gold for ball – gold for ball bonding and aluminum for wedge bonding. Typical wire bonding and aluminum for wedge bonding. Typical wire diameter is 25µm.diameter is 25µm.

Die Attach Materials Die Attach Materials – solders, conductive adhesives, – solders, conductive adhesives, and glass adhesives.and glass adhesives.

Overall Processes Overall Processes (Continued)(Continued)

Electrical PerformanceElectrical Performance Of all of the chip-to-package interconnection types, Of all of the chip-to-package interconnection types,

the electrical performance is the lowest!the electrical performance is the lowest! Long lengths of the wires interconnecting the chip Long lengths of the wires interconnecting the chip

and package lead frame.and package lead frame. Lower electrical performance limited the use of Lower electrical performance limited the use of

wirebond interconnection in high speed applications.wirebond interconnection in high speed applications.

MicroprocessorMicroprocessor >>

High speed ASICsHigh speed ASICs >> flip chip flip chip

High speed memoryHigh speed memory > > and and

High speed RFHigh speed RF > Tape Automated > Tape Automated Bonding (TAB)Bonding (TAB)

AnalogAnalog >>

Reliability/FailuresReliability/Failures Wirebond interconnection structures Wirebond interconnection structures Very reliable Very reliable Not used in high speed applications but used in space, Not used in high speed applications but used in space,

automotive, medical, aerospace applications.automotive, medical, aerospace applications. Also used in low cost electronics: toys, smart cards, RF Also used in low cost electronics: toys, smart cards, RF

tags, AM-FM radios.tags, AM-FM radios. Chip fracture, chip passivation cracking, chip Chip fracture, chip passivation cracking, chip

metallization corrosion, wire sweep, cratering of metallization corrosion, wire sweep, cratering of wirebonding pad, bond fracture and lift-off, interfacial wirebonding pad, bond fracture and lift-off, interfacial delamination, package cracking.delamination, package cracking.

Examples of plastic packages that are wirebonding are:Examples of plastic packages that are wirebonding are: Thin small outline packages (TSOP)Thin small outline packages (TSOP) Plastic quad flat packs (PQFPs)Plastic quad flat packs (PQFPs) Ball grid arrays (BGAs)Ball grid arrays (BGAs) Chip scale packages (CSPs)Chip scale packages (CSPs)

SummarySummary Wire bondingWire bonding is a method of making interconnections between an is a method of making interconnections between an

IC and other electronics as part of semiconductor device IC and other electronics as part of semiconductor device fabrication.fabrication.

The wire is generally made up of one of the following:The wire is generally made up of one of the following: GoldGold AluminumAluminum CopperCopper

Wire diameters start at 15µm and can be up to several hundred Wire diameters start at 15µm and can be up to several hundred micrometers for high-powered applications.micrometers for high-powered applications.

There are two main classes of wire bonding:There are two main classes of wire bonding: Ball bondingBall bonding Wedge bondingWedge bonding

Ball bonding usually is restricted to gold and copper wire and Ball bonding usually is restricted to gold and copper wire and usually requires heat. Wedge bonding can use either gold or usually requires heat. Wedge bonding can use either gold or aluminum wire, with only the gold wire requiring heat.aluminum wire, with only the gold wire requiring heat.

In either type of wire bonding, the wire is attached at both ends In either type of wire bonding, the wire is attached at both ends using some combination of heat, pressure, and ultrasonic energy to using some combination of heat, pressure, and ultrasonic energy to make a weld.make a weld.

Wire bonding is generally considered the most cost-effective and Wire bonding is generally considered the most cost-effective and flexible interconnect technology, and is used to assemble the vast flexible interconnect technology, and is used to assemble the vast majority of semiconductor packages.majority of semiconductor packages.

TAPE AUTOMATED TAPE AUTOMATED BONDINGBONDING

IC assembly technique based on mounting and IC assembly technique based on mounting and interconnecting ICs on metalized flexible polymer tapes.interconnecting ICs on metalized flexible polymer tapes.

One end fully automated bonding of an etched copper beam One end fully automated bonding of an etched copper beam lead to an IC, and other end of the lead to a PWB.lead to an IC, and other end of the lead to a PWB.

1966 – commercialized by General Electric Research 1966 – commercialized by General Electric Research LaboratoryLaboratory First used in small-signal integration devices (1-40 transistors, First used in small-signal integration devices (1-40 transistors,

14 I/Os)14 I/Os) 1970 – strong consideration and attention but little 1970 – strong consideration and attention but little

experienced expect in Japanexperienced expect in Japan 1980 – the most widespread adoption1980 – the most widespread adoption Up to now- used in high density I/O and high speed circuitry Up to now- used in high density I/O and high speed circuitry

of VLSIof VLSI Applied to variety of consumer, medical, security computer, Applied to variety of consumer, medical, security computer,

peripheral, telecommunication, automotive and aerospace peripheral, telecommunication, automotive and aerospace products.products.

(Dis)advantages(Dis)advantages Some of the advantages of TAB:Some of the advantages of TAB:

Ability to handle small bond pads and finer pitches on Ability to handle small bond pads and finer pitches on the ICthe IC

Elimination of large wire loopsElimination of large wire loops Low profile interconnection structures for thin Low profile interconnection structures for thin

packagespackages Improved electrical performanceImproved electrical performance Ability to handle high I/O countsAbility to handle high I/O counts Reduced weightReduced weight

Some of the disadvantages of TAB:Some of the disadvantages of TAB: Package size tends to increase with larger I/O countsPackage size tends to increase with larger I/O counts Little production infrastructureLittle production infrastructure Difficulty in assembly reworkDifficulty in assembly rework System testabilitySystem testability Large capital equipment investment requiredLarge capital equipment investment required

Structure and ProcessesStructure and Processes

Electrical performance Electrical performance TAB interconnections have improved electrical TAB interconnections have improved electrical

performance.performance. Short circuit lead lengths between the chip and substrate Short circuit lead lengths between the chip and substrate

reducing the impedance and signal delays.reducing the impedance and signal delays. On the other side, wirebond have long wire loops between On the other side, wirebond have long wire loops between

the chip and package lead frame, increasing line the chip and package lead frame, increasing line impedance and signal delays.impedance and signal delays.parameterparameter wirebonwirebon

ddTABTAB

ResistanceResistance 0.38mΩ 0.38mΩ 0.31mΩ 0.31mΩ

InductanceInductance 10nH 10nH 6.7nH 6.7nH

CapacitancCapacitancee

0.21pF 0.21pF 0.11pF 0.11pF

Electrical performanceElectrical performance TAB interconnections have improved electrical TAB interconnections have improved electrical

performance.performance. Short circuit lead lengths between the chip and substrate Short circuit lead lengths between the chip and substrate

reducing the impedance and signal delays.reducing the impedance and signal delays. On the other side, wirebond have long wire loops between On the other side, wirebond have long wire loops between

the chip and package lead frame, increasing line the chip and package lead frame, increasing line impedance and signal delays.impedance and signal delays.parameterparameter wirebondwirebond TABTAB

ResistanceResistance 0.38mΩ 0.38mΩ 0.31mΩ 0.31mΩ

InductancInductancee

10nH 10nH 6.7nH 6.7nH

CapacitanCapacitancece

0.21pF 0.21pF 0.11pF 0.11pF

ExamplesExamples

Tape Ball Grid Array Tape Ball Grid Array – developed by IBM.– developed by IBM. Area array first level interconnections and a standard ground Area array first level interconnections and a standard ground

planeplane Lower lead inductance, lower power-supply inductance, lower Lower lead inductance, lower power-supply inductance, lower

signal delaysignal delay TapePak TapePak – developed by National Semiconductor.– developed by National Semiconductor.

Fully testable, plastic model, quad-flat-packFully testable, plastic model, quad-flat-pack Leads on all four sides of the surface mountable packageLeads on all four sides of the surface mountable package

Pentium TCP Pentium TCP – by Intel– by Intel For notebooks, laptops, palm top computers, related portable For notebooks, laptops, palm top computers, related portable

products.products. ETA Supercomputer ETA Supercomputer – by ETA Systems– by ETA Systems

Implemented one of the first TAB applications in the 1970.Implemented one of the first TAB applications in the 1970. Packages were 248 pin quad flat packs.Packages were 248 pin quad flat packs.

SummarySummary Tape Automated Bonding is an interconnect technologyTape Automated Bonding is an interconnect technology

between the substrate and the IC, using a prefabricated between the substrate and the IC, using a prefabricated

carrier with copper leads adapted to the IC pads instead carrier with copper leads adapted to the IC pads instead

of single wires.of single wires. Today TAB is well introduced in Japan and Taiwan and it Today TAB is well introduced in Japan and Taiwan and it

features many benefits in applications like LCD drivers, high features many benefits in applications like LCD drivers, high speed circuits, high pin count circuits or very low profile speed circuits, high pin count circuits or very low profile designs. designs.

Japanese expression created:”Keihakutansho” meaning “light, Japanese expression created:”Keihakutansho” meaning “light, thin, short, strong”.thin, short, strong”.

Has better electrical performance than wirebonding Has better electrical performance than wirebonding technology.technology.

Microprocessors and ASICs benefit from TAB in the fields Microprocessors and ASICs benefit from TAB in the fields where high frequencies, high pin counts or high power where high frequencies, high pin counts or high power dissipation are concerned.dissipation are concerned.

FLIP CHIPFLIP CHIP Developments to improve cost, reliability and productivity Developments to improve cost, reliability and productivity

in the electronic packaging industry – flip chip technology.in the electronic packaging industry – flip chip technology. Introduced as the Introduced as the Solid Logic TechnologySolid Logic Technology by IBM in 1962. by IBM in 1962. In 1970, converted into In 1970, converted into Controlled Collapse Chip Controlled Collapse Chip

Connection (C4)Connection (C4) Flip chip = Advanced form of SMT, Flip chip = Advanced form of SMT,

in which bare semiconductor chips in which bare semiconductor chips

are turned upside down and bonded are turned upside down and bonded

directly to PCB.directly to PCB. Initially applied to peripheral contacts, Initially applied to peripheral contacts,

but quickly progressed to area arrays but quickly progressed to area arrays

which allow for high I/O counts at which allow for high I/O counts at

larger pitches.larger pitches.

ConceptConcept Flip chip is the connection of an integrated circuit chip to Flip chip is the connection of an integrated circuit chip to

a carrier or substrate with the active face of the chip a carrier or substrate with the active face of the chip facing toward the substrate.facing toward the substrate.

The basic structure of flip chip consists of an IC or chip, The basic structure of flip chip consists of an IC or chip, an interconnection system, and a substrate.an interconnection system, and a substrate.

The IC can be made of silicon, gallium-arsenide, indium-The IC can be made of silicon, gallium-arsenide, indium-phosphide.phosphide.

Substrate material could be ceramic, epoxy-glass Substrate material could be ceramic, epoxy-glass laminate, ceramic thick-film and many morelaminate, ceramic thick-film and many more

IC Bond Pad InterfaceIC Bond Pad Interface The interconnection system is subdivided into four The interconnection system is subdivided into four

functional areas:functional areas: Under bump metallization (UBM)Under bump metallization (UBM) Chip bumpsChip bumps EncapsulationEncapsulation Substrate metallizationSubstrate metallization

Flip Chip ProcessingFlip Chip Processing Solder Interconnection ProcessingSolder Interconnection Processing

(a) Wetted controlled Collapse solder (a) Wetted controlled Collapse solder interconnection (High Temp.)interconnection (High Temp.)

(b) Solid state bond (Similar to wirebonds)(b) Solid state bond (Similar to wirebonds) (c) Cap reflow configuration (Two metals)(c) Cap reflow configuration (Two metals)

Isotropic and compressed anisotropic Isotropic and compressed anisotropic AdhesivesAdhesives

Flip Chip on Organic Flip Chip on Organic SubstrateSubstrate

BenefitsBenefits CheaperCheaper

Fall backsFall backs High CTEHigh CTE FatigueFatigue Bad jointsBad joints

IBM and Hitachi discovered that using IBM and Hitachi discovered that using polymer underfills reduce strain on solderpolymer underfills reduce strain on solder

Underfill Encapsulants Underfill Encapsulants and Processingand Processing

Advantages to underfillsAdvantages to underfills Compensate for thermal expansion Compensate for thermal expansion

differences between chip and substratedifferences between chip and substrate Avoid solder corrosionAvoid solder corrosion Protect from environmental effects such Protect from environmental effects such

as moistureas moisture Absorb α particle emissions from lead in Absorb α particle emissions from lead in

soldersolder

Underfill Encapsulants Underfill Encapsulants and Processingand Processing

Capillary Flow ProcessingCapillary Flow Processing

Injection Flow ProcessingInjection Flow Processing

Underfill Encapsulants Underfill Encapsulants and Processingand Processing

Compression Flow ProcessingCompression Flow Processing Placement velocity feedbackPlacement velocity feedback

Flip Chip Assembly Flip Chip Assembly ProcessesProcesses

Electrical PerformanceElectrical Performance

Flip chip provide shortest chip-to-Flip chip provide shortest chip-to-package connectionspackage connections

Minimal resistanceMinimal resistance Minimal capacitanceMinimal capacitance Minimal inductanceMinimal inductance Layout and materials effect the Layout and materials effect the

performanceperformance

ReliabilityReliability

Range from highly reliable to adequateRange from highly reliable to adequate Flip chips on ceramic have high Flip chips on ceramic have high

reliabilityreliability Underfilled flip chips have better Underfilled flip chips have better

reliabilityreliability Alpha particle emissions (cause soft Alpha particle emissions (cause soft

errors)errors) Increased sensitivity to electrostatic Increased sensitivity to electrostatic

discharge discharge

Failure ModesFailure Modes

DelaminationDelamination Increases solder joint stressIncreases solder joint stress Allows solder to move into voidsAllows solder to move into voids

*C-mode scanning acoustic microscope (C-SAM) images

Failure ModesFailure Modes

Solder migrationSolder migration Can cause shorts by bridgingCan cause shorts by bridging

Failure ModesFailure Modes

Die crackingDie cracking Catastrophic failureCatastrophic failure Edge cracksEdge cracks Center die cracksCenter die cracks

Failure ModesFailure Modes

Fillet CrackingFillet Cracking Chip side cracksChip side cracks Board side cracksBoard side cracks Complete cracksComplete cracks Can lead to delaminationCan lead to delamination

Failure ModesFailure Modes

Solder fatigue crackingSolder fatigue cracking Can create opensCan create opens

Bulk underfill crackingBulk underfill cracking Typically between jointsTypically between joints Potential to cause shortsPotential to cause shorts

Speed up Flip Chip Speed up Flip Chip ProcessProcess

Use fast flow snap-cure underfillsUse fast flow snap-cure underfills No flow underfills (adhesives)No flow underfills (adhesives) Remove steps from standard processRemove steps from standard process

Do not use fluxDo not use flux Do not place explicit underfill filletsDo not place explicit underfill fillets

9.8 Summary and Future 9.8 Summary and Future TrendsTrends

Currently wirebonds is the most Currently wirebonds is the most used technologyused technology

Currently the flip chip process Currently the flip chip process doesn’t have the infrastructure to be doesn’t have the infrastructure to be mass producedmass produced

Flip chip will have the best electrical Flip chip will have the best electrical characteristicscharacteristics