Fresnel phase plate lenses for through-waferoptical interconnections

Lawrence A. Hornak

While the advantages of optical over electrical interconnects for conventional 2-D VLSI and wafer-scale-integrated (WSI) circuits have not been clearly demonstrated, for 3-D interconnection structures such asthose necessary for stacked wafer and similar architectures, the trade-off between using optical or electricalmethods for vertical links is not straightforward. Current work on fabricating a through-wafer opticalinterconnect within a hybrid-WSI environment is motivated by the need to obtain experimental data on theoverall performance of an optical interconnect so that this trade-off can be clarified inthe case of hybrid-WSIand in the general case at least more well defined. This paper details the design and fabrication of SiO2Fresnel phase plate lens arrays for use in the experimental 1.3-,um wavelength through-wafer opticalinterconnects to be constructed. These 0.8-N.A. lenses have submicron minimum linewidths and are VLSIprocess compatible. Preliminary results are presented indicating that, with the use of these lens arrays,vertical optical interconnect densities comparable with that of on chip bonding pads (-250-jim pitch) areobtainable within these architectures.

I. Introduction

While optical interconnections are being extensivelyexplored for use between specialized high-speed elec-tronic processing nodes,1 the advantages of opticalover, electrical interconnects for conventional 2-DVLSI and wafer-scale-integrated (WSI) environmentshave not been clearly demonstrated and proved to bepractical. At present, the optical interconnect densi-ty at the planar on-chip or on-wafer level cannot ap-proach its electrical counterpart. From the powerdissipation standpoint, optical links do not appear tobe superior to electrical ones given current opticaldevices. Time division multiplexing, while reducingthe interconnect medium area, on the whole largelyincreases circuit complexity and reduces fault toler-ance without increasing density or word bandwidth.While the use of optical links for on-chip skewlessclock distribution has been proposed, 3 clock skew doesnot appear to be a problem even approaching 100MHz, provided that the appropriate clock distributionnetwork and clock buffers are chosen.4

The author is with AT&T Bell Laboratories, Holmdel, New Jersey07733.

Received 4 March 1987.0003-6935/87/173649-06/$02.00/0.© 1987 Optical Society of America.

Despite these issues, optical interconnects are stillattractive for dense 3-D hybrid wafer-scale-integrated(H-WSI) architectures because of their potential toprovide free-space vertical links between stacked wa-fers over the entire wafer area. An example of such amultiwafer architecture is shown in Fig. 1. While theamount of physical interconnectivity that is necessarybetween wafers is largely dependent on how the systemis partitioned, in general, the ability to have a highdensity of interconnects is very desirable. Typicalelectrical bonding pad center-to-center distances are-250 ,gm for standard VLSI die where pads are only onthe perimeter. Noncontact through-wafer optical in-terconnections have been proposed5 for vertical inter-wafer connections which use the Si wafer as part of thelink transmission medium rather than use vertical pro-cessing to establish guides through the wafer whichmay be costly in terms of both increased processingcomplexity and ultimately reduced wafer-scale yields.With local adjustment of the Si3N4 already present onthe circuit wafers, large reflection losses can be re-duced, and >90% transmittance at 1.3-,gm wavelengthmay be obtained. The advantages of free-space opti-cal interconnections between wafer planes are notreadily offered by electrical interconnects. In general,as soon as one departs from the well-developed tech-nology of fabricating wires in the plane of the wafer tobring information out of the plane, a large area andpower-delay discontinuity results, reflecting the phys-ical differences in the two interconnect technologies.6The current work fabricating a complete through-wa-

1 September 1987 / Vol. 26, No. 17 / APPLIED OPTICS 3649

CHIP SILICONALIGNMENTTEMPLATE

CHIPWELL

VLSIICATTACHMENT

POSITION

SILICON - -HWSI CIRCUIT

WAFER

INTERCONNECTSAND LOW LEVEL

FUNCTIONS

SILICONWAFER COVER

VLSI IC

2

COMPOS ITEMODULE

Fig. 1 Example of a stacked wafer H-WSI architecture.

PHOTODIODE CONTACTS

A P-i-n PHOTODIODE ARRAY A

S CIRCUIT WAFER OXIDE PHASE(-500,amI PLATE LENSES

ALIGNMENT TEMPLATE(-600/m) Au APERTURE MASK

-- - - - -- - - -/ --- --- ---

_ go R LED ARRAY

LEDICONTACTS~

Fig. 2. Example H-WSI architecture showing a through-wafer op-tical interconnect array.

fer optical interconnect is motivated by the desire toobtain experimental data on the overall performanceof an optical interconnect so that the trade-off betweenusing optical or electrical methods7 to achieve verticallinks between wafers can be clarified, in both the spe-cific case of H-WSI architectures and the general case.

Along with antireflection windows on the circuitwafers, process compatible guiding should be em-ployed to maximize the through-wafer optical inter-connect density and optical coupling between wafers.This paper details the design and fabrication of SiO2Fresnel phase plate lens arrays for use in through-wafer free-space optical interconnects operating at1.3-Am wavelengths. Section II develops the equa-tions for the phase zone radii given the transmissionmediums and distances imposed by the experimentalarchitecture. The fabrication of the phase plates isdescribed in Secs. III and IV concludes with somepreliminary experimental results.

11. Fresnel Phase Plate Design

Among the various integrated planar lenses, Fresnelphase plates are especially attractive for optical inter-connections because they can be made compatiblewith standard VLSI processing and thus can be direct-ly fabricated in featureless regions of wafer-scale cir-cuits. Typical experimental diffraction efficienciesrange from 20 to 30%8,9 with theoretical efficiency esti-mates of -40%.10

The approximate architecture in which the through-wafer optical interconnect functions is shown in Fig. 2.While point-to-point links composed of hybrid mount-ed and bonded source and detector arrays are used inthis experimental architecture, an optical source ex-ternal to the wafer stack with internal modulation anddetection at each wafer plane might be used. Thisprovides far lower power dissipation, given that effi-cient optical power distribution could be achieved. InFig. 2, information is transmitted unidirectionallyfrom the lower to the upper circuit wafer. Also shownis an alignment template which may present addi-tional Si to the transmission path or alternately couldbe etched through since it holds no active circuitry.The Fresnel phase plate arrays could be fabricated onthe upper surface of the template or on the undersideof the upper circuit wafer. The object and imagedistances are in both cases 0.5-1.0 mm. Shorter dis-

PHASE PLATE LENSESOXIDE LAYERJ.

LENSE ARRAY WAFER.0o0sam

k 100±mj

,7FMCTIVE SOURCEV LEe ~~~~~~~ -' LOCAT~~~~~ION I

Fig. 3. Experimental setup used to simulate the behavior of Fresnelphase plate lenses in the architecture of Fig. 1.

n = 1.o

X4PHASE PLATE LENSES

OPI

LENSE ARRAY WAFER

P2

n i 1.0EFFECTIVE SOURCE LOCATION

Fig. 4. Transmission medium for the design of the experimentalphase plates.

tances will result in predominantly submicron lenslinewidths.

Figure 3 shows the experimental setup to simulatethe behavior of the lens in the architecture of Fig. 2.The lens arrays are fabricated on a separate wafer sotheir effect can be isolated. To avoid loss and limitcrosstalk, the LED array will be as close to the backsideof the lens wafer as possible. We shall, therefore,initially assume the two to be in contact and obtain anexpression for this case. The transmission medium wethen start with is that of Fig. 4. The 1 X 12 LEDarray12 being used is InGaAs/P and essentially thesame index of refraction as Si, or n2 3.5. Therefore,we assume that the source is embedded in a medium ofindex n2 at the point P2, a distance X2 from the inter-face of this medium. On the opposite side of thisinterface is the medium of index n1 where the magnifi-cation one image of the source will be at point P adistance X1 from the interface. In this case n1 = 1.0,

3650 APPLIED OPTICS / Vol. 26, No. 17 / 1 September 1987

- - - - - - - - - -I #

since for the experimental setup the image will be inair. If, instead, a wafer with a matching PIN detectorarray'3 as in Fig. 2 is placed behind the lens so that theimage point is within the medium of index n2, the totalimage distance from the lens will simply be length-ened.

The well-known expression for the zone radii rk of aFresnel zone or phase plate in a medium of index n withfocal length f is'4

2 kfX0rk - '

nf = 1.0

Xi

(1)

where k = 1,2,3,. . ., and X0 is the wavelength of theincident light in vacuum. What is required now is anexpression for the object and image distances given thetransmission mediums of Fig. 4. Figure 5 shows twolight paths from P2 to P1. The first is along the opticalaxis, and the second travels through the kth ring of aphase plate with a radius given by

LENS ARRAY WAFER

n2 f 3.5

Pi

P2

Fig. 5. Diagram of a phase plate lens and the rays used in the lensequation derivation.

2 kflX0rk n (2)

This is the expression for the radii of a lens designedfor the medium of index n1. For the phase plate toform an image at P, within the medium of index n1, theoptical path length difference between the two pathsmust be (kXo)/2 giving

n 2 + kf1 2X = k * 32nl n2X 3

In using Eq. (1), the validity of [XO/(Xl,2)] << 1 has beenassumed. For the dimensions of Fig. 3, this inequalityis also valid. Using this fact, the square root terms ofEq. (3) can be approximated with the result

f~kXonl f1kX0n 2 k 4

n1X,+ n1 X2 = kX0

giving

1 fl2 1-+ n -. (5)XI X2n f(

As expected, the result is the lens equation modifiedfor the two mediums. Solving for f' and substitutingthe result in Eq. (2) we obtain

hr2 °( + x )*(6)

With this relation for the radii, the phase plate can bedesigned given that the object space is of index n2 andthe image space of index n1.

The fact that the LED array is not butted against theSi wafer but instead has a small air gap must be ac-counted for. Rather than altering Eq. (6), the value ofX2 is changed to reflect the effective source distancethat results from the gap. Due to wire bonds, the LEDarray surface must be spaced at least 100 ,m from theback of the Si wafer on which the lens is fabricated. Inaddition, the effective source location (for paraxialrays) when the array is in air is -35 Am beneath thematerial surface. Therefore, we can approximate theLED as a point source in the medium of index n1 a

P4

4,-.0

H- I -1 PRASE PLATE LENS

I "'I""', \ : ' LENS ARRAY WAFER

| \ i, n2 3.5s

I t POINT

EFFECTIVE SOURCE POINT

n 1.0

Fig. 6. Ray diagram used in determining the approximate changein the source distance as a result of the small LED array-lens wafer

gap.

distance 135 Am from the Si wafer as shown in Fig. 6.The center-to-center spacing of the LED sources is 250,im; thus the lenses shall be made 250 Am wide and 500,um long. To use Eq. (6), an approximate value of X2 ,the source distance to the lens when the entire sourceregion is of index n2 , must be determined. This ap-proximate value is obtained with the simple ray tracingin Fig. 6. An average ray is taken to be one originatingfrom the source and, if the Si wafer were not present,passing through the edge of the phase plate, 125 ,mfrom the optical axis. Therefore,

01 =tan- hz + t

where here t is the thickness of the silicon wafer, z is theeffective point source location of the LED behind thewafer, and h is half of the lens width. Applying Snell'slaw,

02 = sin-I ± sinO,).

1 September 1987 / Vol. 26, No. 17 / APPLIED OPTICS 3651

With some trigonometry, d, the effective distance ofthe LED behind the Si wafer, is given by

tan0gd = z

tan02(7)

Since for n, < n 2, the ratio of the tangents in Eq. (7) isalways greater than unity, it will be the case that d > z.

Now the values of the phase zone radii can be deter-mined for the experimental lens wafer. As statedabove, h = 125,gm, and the lenses shall be designed forthe closest LED to wafer spacing so z = 135 gm. TheSi wafer thickness is t - 500 gim, and the indices ofrefraction are n1 = 1.0 and n 2 = 3.5. These values yieldd = 481 gm. Therefore, X2 = 981 m so the LEDappears to the phase plate to be -1 mm away. Themaximum numerical aperture of the rectangularlenses is then 0.8. To easily make various measure-ments and, as mentioned above, have the ability toinsert a receiver wafer, the lenses are designed to have aprimary image distance X, of 1 mm. With substitu-tion of these values into Eq. (6), the radii of the lensesare obtained. The resulting air focal length f' is 218im.

11. Fabrication

While recent work has been noted in the literatureregarding the fabrication of Fresnel phase plates forintegrated optics,8 most methods rely on direct elec-tron-beam exposure of photoresist, which then alsoacts as the phase material of the final lens. Forthrough-wafer optical interconnections, the phaseplate material must be compatible with subsequentprocessing of the circuit wafers. Using special tech-niques, the e-beam written photoresist pattern couldbe transferred to underlying material layers thatwould then comprise the lens. Indeed the fine-linecapabilities of direct e-beam exposure are indispens-able if Fresnel phase plates with excellent optical char-acteristics are desired. However, e-beam exposure is aserial process, and while capable of small spot sizes(<0.015 Am), the penalty of increased processing timeand complexity must be weighed. For the purposespursued here, the desire is to increase the optical cou-pling in the through-wafer link with a reasonable in-crease in process complexity. This may best be ac-complished through use of the same exposuretechnology for both the photonic and electronic struc-tures on the wafer circuit board.

Optical lithography, therefore, rather than e-beamlithography, was chosen to pattern the photoresist.The immediate penalty paid for this choice was a re-duction in the expected optical quality of the phaseplates. Typically, e-beam mask fabrication can pro-duce 0.25-,gm minimum linewidths, and the pitch ofthese lines can be adjusted with 0.125-,gm precision.As a result, the mask is visibly composed of regions ofzones with the same linewidths. This is readily seen inFig. 7(a), which is a photo of one phase plate on thefinal mask. While resolution for first-run trials waslimited to -1.0 gim by the contact exposure systemused, zone widths to 0.5 Aim were still written on themask for test purposes. Figure 7(b) is a photo of the

3652 APPLIED OPTICS / Vol. 26, No. 17 / 1 September 1987

I %x

(a)! SE =A.i

.. - w 1

(b)

Fig. 7. Final mask showing (a) a full phase plate lens pattern and(b) a corner region of 0.5-Am zones. Light regions are chrome.

Secondary patterns in (a) are from screen printing.

corner rings on the mask where the transition from0.75- to 0.5-gm zones is clearly seen.

In addition to mask difficulties, there exist well-known photoresist exposure and subsequent etchingproblems with contact lithography of diffraction grat-ings. For gratings of the pitch described here, theseproblems are surmountable given adequate processrefinement. Phase plate array wafers are currentlybeing tested that were fabricated using various posi-tive photoresist processes. In both cases, a [o/(2nfox)]phase layer of 4500-A SiO 2 (nox = 1.46) was thermallygrown on p-type Si wafers and after resist patterningwas reactively ion etched with CHF3. This phase layerthickness was chosen to yield minimum reflectance inconjunction with an Si3N4 antireflection layer. Theoptimum thickness for maximum diffraction efficien-cy is Xo/[2(n, - 1)]. Some of the first SiO 2 phaseplates fabricated are shown in Figs. 8. It is apparentfrom the post RIE results that the resist profile waspoor. Figures 9 show a later phase plate pattern in 2gim of positive photoresist. Excellent sidewall anglesand overall photoresist profiles are evident. Figures

(a)

(a)

(b)

Fig 8 Initial fabrication results ceshown () copetedzne 1l = array Of 5i02 phase plates on 250-ym centers and (b) the center zones

of one lens.

(b)

Fig. 10. Completed phase plate fabricated with the 2-r m litho-

graphic process showing the (a) center and (b) 0.75-gm edge zones.Marker length is 1 gin.

10 show features near the center and outer edge, re-spectively, of one of these lenses after RIE. The 0.75-gin zones were resolved. However, the 0.5-,gm fea-tures were beyond the capabilities of the exposuresystem used.

IV. Preliminary Results

Some preliminary experiments were performed withthe phase plate lens arrays to determine whether the

length infull density of the LED array (250-gm centers) could(a) ~~~~~be realized without considerable optical crosstalk. A

diagram of the setup used to obtain these measure-ments is shown in Fig. 11. The video image from theIR camera is digitized, windowed, and then transferredto a minicomputer for plotting. Initially the LEDarray was positioned at approximately the positionbelow the lens array wafer for which the lenses weredesigned (z=100-150,ginnFig. 11). Figure 12 (a) is aplot of the uncalibrated intensity distribution at apoint 1 mm behind the lens over a single activatedLED (i = 1 mm in Fig. 11). Each grid in the x-y planeof the plot is 3 X 3 ginm. At the low drive current used

U ~(-30 mA), the LED spot size fills the entire 90-gm AuU ~aperture on the top of the device. Figure 12(a), there-U ~fore, shows the intensity map of the approximately

(b) unity magnification image of the LED. Although not

Fig. 9. Phase plate patterned in 2-gum thick resist. The marker plotted, neighboring lenses in the 1 X 6 array showedlength in (b) represents 1-gum essentially no crosstalk. As the LED array was moved

1 September 1987 / Vol. 26, No. 17 / APPLIED OPTICS 3653

1X6 LENS ARRAY

VIDEO OUT

IR CAMERA

MICROSCOPE

… __ _ _ _ __ _ I_-

Si WAFER

LED ARRAY/

Fig. 11. Experimental setup used for measuring the intensity dis-tribution a distance i from the lens when the LED array is a distance

z from the lens wafer back.

1 grid 3m

i = 1000gm

(a)

i = 600gm i = 450gm

(b) (C)

Fig. 12. Image intensity distributions behind the lens of a singleLED at a position z under the lens wafer. The three values of i arethe image distances behind the lenses for three different positions z

of the LED array. Each grid side represents 3.0 gm.

farther from the lens array and the image moved to 600and 450 gm behind the lens wafer [Figs. 12(b) and (c),respectively], still no crosstalk was evident. With theLED at -1.0 mm and the image at 330 gim, crosstalkappeared and is shown in one of the two nearest lensesin Fig. 13. The distance between the two images is-300 gm.

V. Conclusion

Fresnel phase plate lens arrays have been fabricatedto evaluate the use of planar lenses within through-wafer optical interconnections. From initial results, itappears that optical crosstalk will not be a significantproblem for the transmission lengths and device spac-ings of interest and that vertical optical interconnectdensities comparable with that of on-chip electricalbonding pads are attainable within stacked wafer ar-chitectures using these lens arrays. Currently, hybridLED driver and PIN receiver circuit wafers are beingfabricated. These wafers will be used to determinequantitatively the coupling improvement and cros-stalk levels realized by use of the SiO2 phase platearrays and help to ascertain the overall performancecharacteristics of through-wafer free-space optical in-terconnects within H-WSI environments.

Fig. 13. Intensity distribution of the image when the LED array is-1 mm from the lens wafer. Crosstalk of the single LED into the

neighboring lens begins to appear.

Thanks are extended to P. Corvini and S. K. Tewks-bury for their assistance during initial fabrication, toN. Streibl for providing the code for the computergeneration of mask patterns, and to G. Chin for invalu-able assistance and suggestions.

References1. P. R. Haugen, S. Rychnovsky, A. Husain, and L. D. Hutcheson,

"Optical Interconnects for High Speed Computing," Opt. Eng.25, 1076 (1986).

2. C. M. Lin and D. L. Carter, "Photonic I/O's at the PWB andChip Level?," at Sixth International Electronics and PackagingConference, San Diego (16-20 Nov. 1986).

3. R. K. Kostuk, J. W. Goodman, and L. Hesselink, "Optical Imag-ing Applied to Microelectronic Chip-to-Chip Interconnections,"Appl. Opt. 24, 2851 (1985).

4. M. Hatamian and G. Cash, "A 70MHz 8 bit X 8 bit ParallelPipelined Multiplier in 2.5,um CMOS," IEEE J. Solid-StateCircuits SC-21, 505 (Aug. 1986).

5. L. A. Hornak and S. K. Tewksbury, "On the Feasibility ofThrough-Wafer Optical Interconnects for Hybrid Wafer-Scale-Integrated Architectures," IEEE Trans. Electron Devices ED-34, 1557 (1987).

6. S. K. Tewksbury, L. A. Hornak, and A. Ligtenberg, "The Impactof Component Interconnects on Future Large Scale Systems,"Proc IEEE (in revision).

7. J. Grinberg, R. G. R. Nudd, and R. D. Etchells, "A Cellular VLSIArchitecture," Computer 69 (Jan. 1984).

8. G-I. Hatakoshi and K. Goto, "Grating Lenses for the Semicon-ductor Laser Wavelength," Appl. Opt. 24, 4307 (1985).

9. W. S. Chang and P. R. Ashley, "Fresnel Lenses in Optical Wave-guides," IEEE J. Quantum Electron. QE-16, 744 (1980).

10. R. Magnusson and T. K. Gaylord, "Diffraction Efficiencies ofThin Phase Gratings with Arbitrary Grating Shape," J. Opt.Soc. Am. 68, 806 (1978).

11. S. K. Tewksbury, T. L. Lindstrom, L. A. Hornak, M. R. Biazzo,and R. H. Bosworth, "Chip Alignment Templates for Multi-Chip Module Assembly," IEEE Trans. Comput. Hybrid Manuf.Technol. CHMT-10, 111 (Mar. 1987).

12. P. P. Deimel, et al., "Individually Addressable Monolithic X12Light-Emitting Diode Array," IEEE IOSA J. Lightwave Tech-nol. LT-3, 988 (1985).

13. M. G. Brown et al., "Fully Optically and Electrically Interfaced,Monolithic X12 Array of InO.53Gao.47As/InP p-i-n Photodi-odes," International Electron Devices Meeting, p. 727 (1984).

14. C. J. Smith, Optics (Edward Arnold, Ltd. Baltimore, 1960), pp.567-77.

3654 APPLIED OPTICS / Vol. 26, No. 17 / 1 September 1987

i = 330gm

"I'll -IZ