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Freescale Technology Forum: RapidIO and Freescale B4860 and T4240 for Wireless Infrastructure

June 2012

©2011 Integrated Device Technology, Inc.

Devashish PaulSenior Product Manager, IDT

RapidIO enabled Wireless Base Station

●RapidIO Successes and Protocol attributes

●3G and 4G Base station with Freescale Processor and RapidIO networks

●Network Trends local caching

PAGE 2 IDT CONFIDENTIALwww.IDT.com

●Network Trends local caching micro Server

●Next Generation standard, RapidIO 10xN

●Switch Building blocks

Overview

•Lowest Latency Interconnect ~ 100 ns


Lowest latency

Scalability

Performance

Power

•Lowest Latency Interconnect ~ 100 ns•Over 2.5 millions switches shipped•100% 4G interconnect market share, 60% 3G, 100% China 3G market•Scalable System

•Inherently scales to large system with thousands of nodes

•Addresses Critical Interconnect Problems in multiple markets

•Military, Video, Computing, Wireless Industry•Large Eco-System

User/Analog/Data

Acquisition

Right Tool for the Right Job

Processing Domain

Network Domain

� In most systems, data comes from somewhere

� Camera

� Once Data is Received, Processors must perform heavy lifting “inside the box”

� Almost all systems are networked


� Camera

� RF Domain for radar or wireless

� Data from Users (ex Internet)

� Typical Interfaces for this:

� Streaming (ex: CPRI/OBSAI)

� Ethernet

� PCIe (ex: graphics)

� Proprietary

heavy lifting “inside the box”

� Could be single processor

� Multi Processor

� A variety of processing elements

� Typical Interfaces for this:

� RapidIO

� PCIe

� Hypertransport

� Infiniband

� Interlaken

� Need to get to other users

� Need to get to storage

� Need to access applications or processing in another location

� Interfaces for this:

� Ethernet

Ecosystem: RapidIO Gen 2 Multi Vendor Interop

Interop Demo Participants:

• Absolute Analysis,

• Altera,

• Cavium,

• Commagility,

• FET Corp,

• Freescale,

• IDT,

• Lattice,

NAT,


S-RIO Silicon Ecosystem

• NAT,

• Starbridge,

• TI,

• Xilinx

Performance and Reliability:NASA NGSIS


RapidIO Selected as Next Gen Space Interconnect SolutionGroup members: BAE, Honeywell, Boeing, Lockheed-Martin, SandiaCisco, Northrup-Grumman, Loral, LGS, Orbital Sciences, JPL, AFRL

RapidIO: 3 Layers Terminated in H/W

Logical Specification

Transport Specification

Globally SharedMemory

Message Passing

Logical I/O Data Streaming

Transport

Im

ple

mente

d in H

ard

ware

Flow Control

Multicast Interop

System Bring up

System Integration


x8, x16 Parallel

Specification

Physical Specification

FuturePhysical Specs

Transport

x1, x2, x4, x8, x16 Serial

Im

ple

mente

d in H

ard

ware

Multicast

Error Mgmt

Interop

When To Use RapidIO

RapidIO On the backplane- Future proof- High throughput- Low deterministic latency- Guaranteed packet delivery- Prioritized traffic

RapidIO on board as the single, simple interconnect among all boardcomponents


RapidIO for fault tolerantSystems- Flexible sparing strategies- Continued system operation in theevent of single faults

- Rapid detection of faults- Flexible response to faults

Protect your SW investment- S-RIO logical layer remainsthe same across differentphysical layer

- RapidIO scales per port- Saves system total power

Why RapidIO Inside the Box?

RapidIO Gen2

● RapidIO ideal for peer

multi processor

performance with native interface to processors

● Best cut through latency

100 ns, 10 GigE cut through latency of multiple hundreds of ns

● Guaranteed delivery

RapidIO 2 19.6 Gbps actual data

rate, 256 byte packet

10 GbE~8 Gbps,256 byte packet

”


● Guaranteed delivery mechanisms

● Payload rate 19 Gbps for S-RIO2, 8 Gbps for 10 GigE (256 byte packets)

● Better per-port economics than 10 GigE switches

Bandwidth and Per Port Economics in Embedded

System Requirement 10G Ethernet RapidIO2

Switch per-port performance raw data rate 10 G 20 G

End to end packet termination >10 ms ~1-2 us

Messaging performance Poor Excellent

Volume pricing $ per 10G > $10 < $4.00

Overall system power High Lowest

Best Protocol for

Deterministic Latency

For Fault Tolerant

Systems

Applications: Wireless and Server Convergence


Evolution of Bandwidth

This is creating a massive load on wireless backhaul


Smart Phone TabletGSM

x1 x40 x400

3G and 4G Base Station With Freescale Processors

• RapidIO connect all WCDMA and 4G / LTE base stations on the planet

• Every call, app download, email, & web page

• 20G RapidIO is the requisite architecture to meet the exponential increase in wireless traffic

• Backhaul: 1GbE or 10GbE

• Backplane/Inter chassis scaling: RapidIO @ 20 Gbps

• Baseband Subsystem: RapidIO

QorIQ B4860 performs base station on a RapidIO

Freescale MSC 8156

DSP

Freescale MSC 8156

DSPFreescaleB4860

20 GbpsPer port S-RIO

20 GbpsS-RIO

Per port to Backplane/ front panel

Ethernet to

backhaul

CPRI

CPRI


• QorIQ B4860 performs base station on a chip function.

• Scalability by using additional B4840’s or by adding some additional MSC8156 DSPs for high capability processing

• ASICs for WCDMA and CDMA when doing multi mode cards that include LTE Advanced down to CDMA

RapidIO Gen2 switch

ASIC for legacy

Protocols

Freescale8156 DSP

S-RIO

20 GbpsPer portS-RIO

5-10GbpsPer port S-RIO

CPRI

• Next generation, e6500 Dual-Thread Power Architecture® cores offer highest CoreMark/Watt with AltiVec technology for dramatic L2 scheduling acceleration

• Next generation, SC3900 StarCore™ provides 2x DSP performance compared to competitive offerings

• Above 21GHz of Programmable Performance

• Smart hardware acceleration for Layer 1, 2, Control and Transport allows for best in class performance, power and cost

QorIQQorIQ QonvergeQonverge B4860 B4860 –– Block DiagramBlock Diagram


allows for best in class performance, power and cost

• Full cache coherent system

• Large scale SoC integration allows for simpler programming models and easier load balancing

• Integrated, Rich I/O including backhaul and antenna interfaces provides flexibility, interoperability and reduces overall system cost

20 Gbps S-RIO highest capacity interface on B4860

RapidIO + B4860 + T4240 in Cloud-RAN

Remote Radio Heads

CPRI Fiber Connections

Centralized B4860 based BBU Pool/Hotel

Mobile Carrier Core Infrastructure T4240-based Servers

10GbS-RIO S-RIO


● Expense to deploy Fiber creates a practical limit on number and distance of connections to BBU Pool

● QorIQ Qonverge (B4860) addresses needs unique to BBU● Efficient (silicon size and power) for L1/L2/L3 processing● Hardware based accelerators for standard and repetitive

algorithms● Low latency and deterministic behavior with L1, scheduler

and L2 processing● Strong processing assist technology for Transport, Security,

QoS and packet processing Virtualization down to MAC-scheduler level

● 20 Gbps S-RIO connections for BBU balancing within the pool for infinite scaling

● B4860 with S-RIO connectivity Base station-on-a-chip approach provides scalable solution to suit varying capacity needs

● 10GbE Backhaul connectivity is required● QorIQ (T4 family) ideal for Cloud-RAN data-

centric servers● Best Coremark/watt● SoC mimics cloud compute system architecture● Strong processing assist technology for Transport,

Security, QoS and packet processing● Ideal for virtualization of Core, RNC, Backhaul,

Gateway, etc.● Power Architecture leads server market share● Ecosystem and Virtualization solutions exist

Radio Heads

Infinite Scaling BBU Cloud RAN with RapidIO

RapidIO Gen2

Freescale MSC 8156

DSP

Freescale MSC 8156

DSPFreescaleB4860


20 GbpsS-RIO

Per port to Backplane/ front panel

Ethernet to

backhaul

CPRI

CPRIRapidIO Gen2

ASIC for

Freescale MSC 8156

DSP

Freescale MSC 8156

DSPFreescaleB4860


CPRI 20 GbpsPer port S-RIO

5-10GbpsPer port



Gen2 switch

ASIC for legacy

Protocols

Freescale8156 DSP

S-RIO


Gen2 switch

ASIC for legacy

Protocols

Freescale8156 DSP

S-RIO


BBU 0BBU 1BBU 2BBU 3BBU 4BBU N

Per port S-RIO

S-RIO

Wireless Micro Server withFreescale T4240


20 Gbps S-RIO highest capacity interface on T4240

Co located Wireless Micro Server Freescale + RapidIO

CPRI

T4240CPU

Micro

Micro Server/Storage

Freescale MSC 8156

DSP

Freescale MSC 8156

DSPFreescaleB4860


T4240


SATA


Micro Server

RapidIOswitch

RapidIO Gen2 switch

ASIC for legacy

Protocols

Freescale8156 DSP

S-RIO


CPRI

BBU 1


T4240CPU

T4240CPU

T4240CPU




SATA

SATA

SATA

Wireless Micro Server Attributes● Seamless Integration with Base Station via RapidIO front Panel

● Processors can snoop packet up to layer 7 in look aside mode and cache repeated content locally

● Eliminates redundant traffic from backhaul

● Reduces overall system power consumption

● Allows for ease of data intensive traffic to WiFi co located with 4G base stations. This reduces the overall load on licensed spectrum

T4240CPU

Micro Server

Wireless Micro Server/Storage

T4240CPU


20 Gbps

SATA

SATA


spectrum

● Scalable Solutions for and base station. Simply stack more pizza boxes with S-RIO interconnect. Option for adding S-RIO local switch box for scaling between multiple local Micro Servers

● Support Green Initiatives, with overall reduced energy footprint in base station with S-RIO

● Superior end to end deterministic packet latency, throughput and fault tolerance even under faults

Server

RapidIOswitch

CPU

T4240CPU

T4240CPU




SATA

SATA

SATA

RapidIO Wireless Micro Server With T4240

● Integrated solution surpassing x86

● T4240 has native fabric interconnect not available in x86 world

● T4240 has integrated storage interfaces

● Best-in-class end-to-end latency● Switch latency around 100 ns

● Supports any kind of topology

T4240CPU

Micro Server

Wireless Micro Server/Storage

T4240CPU


20 Gbps

SATA

SATA


● Supports any kind of topology● Star, Mesh, Dual-star, Hypercube, Torus etc..

● Ease of interface to Wireless BBU with RapidIO interface

No NIC fully integrate Micro ServerSuperior to

Infiniband and Ethernet solutions

Server

RapidIOswitch

CPU

T4240CPU

T4240CPU




SATA

SATA

SATA

New Spec: RTA S-RIO 10xN Overview

3rd Generation

Scalable embedded

peer to peer

Multi processor

Interconnect

On board, board-to-board and

Chassis to Chassis

RapidIO 10xN switch

FPGA enabledwith S-RIO 10xN

Freescale MSC 8156

DSP

Freescale MSC 8156

DSP

Freescale MSC 8156

DSPDSP with S-RIO 10xN

20-80 GbpsPer port

20-80 GbpsPer port

20-160 GbpsPer port to backplane


switch

Processor with S-RIO 10xN

20-80 GbpsPer port

DSPS-RIO 10xN

Key Additional Features•10 Gbps per lane

•10 to 160 Gbps per port•64/67 encoding

•Power management•Time Distribution

● S-RIO 10xN: data rate of 40 Gbps per port

● 10.3125 Gbaud per serial lane with option of going to 25 Gbaud in future

● Long-reach support (100 cm through two connectors), Short Reach 20 cm 1 connector, 30 cm no connector

● Backward compatibility with RapidIO Gen2 switches (5 & 6.25 Gbps) and endpoints

● Lane widths of x1, x2, x4, x8, x16

● Speed granularity from 1.25, 2.5, 3.125, 5, 6.25, 10.3125 Gbaud

Building Blocks for Wireless Systems with RapidIO Gen2


IDT RapidIO Gen2 Portfolio Highlights• Supports 1.25, 2.5, 3.125, 5, 6.25 Gbaud

• Backward compatible with 1.3 switches and endpoints

• 240 Gbps highest performance backplane switches in embedded industry

• PCIe2 to S-RIO2 protocol conversion bridge in development to expand RapidIO ecosystem options

• RapidIO 2 Endpoint IP available for ASIC Development

• Typical power per 10 Gigabit Data 300 mW is


Designed into Open VPX Systems, Wireless LTE, Industrial and Video

• Typical power per 10 Gigabit Data 300 mW is 40% lower than RapidIO 1.3

• Multiple switches, including security and virtual channel features

• New IDT designed SerDes and fabric

• RapidIO Gen 2 hardware development platform

• RapidFET JTAG switch configuration and bring up software

• RapidIO Gen2 modeling tool support for determining overall system architecture, performance and power optimization

• RapidIO Gen 3 specification in the RapidIO Trade Association (RTA)

RapidIO Gen 2 Switch Overview

Detailed Features

• Designed to S-RIO v1.3 and 2.1

• Up to 48 lanes –12x4, 18x2, 18x1

• Up to Full duplex 240 Gbps non blocking bandwidth

• Supports all RapidIO speeds: 1.25, 2.5, 3.125, 5, 6.25 Gbaud

• Cut through latency 100 ns

• 40% per 10 Gbps power reduction vs S-RIO 1.3

• Several switch fabric related patents filed

CPS-184812x20 Gbps18x 10 Gbps18x 5 Gbps

29x29 FCBGA


●High-Performance SerDes

● Long reach 100 cm 2 connector with DFE support

● Transmit Pre Emphasis and receive Equalization

●As low as 300 mW per 10 Gbps of data

●Dynamic ingress and egress buffers management:

●40 multicast groups per port

●Supports cut-through and store & forward

●Error management extension support

●Error Log: sequence of events in time

●packet mirror, trace, filter support

●Receiver and transmitter based flow control

●Per port reset mode robust support for hot swap

●Multicast event control symbol generation input pin

CPS-14328x20 Gbps

14x 10 Gbps14x 5 Gbps

25x25 FCBGA

CPS-16164x20 Gbps8x 10 Gbps16x 5 Gbps

21x21 FCBGA

RapidIO Interconnect and Freescale Processors enable Wireless

● Highest performance embedded interconnect for highly scalable low latency peer to peer networks

● Freescale Processors and RapidIO networks provide the essential building blocks for 3G and 4G Base stations

● RapidIO and Freescale T4240 can also be used for co located caching micro server Base Station Micro Server


server

● RapidIO 10xN takes us to 40 Gbps per port

● The integration of B4860 and its accelerators along with an embedded Fabric interface with RapidIO provides OEMs with a huge advantage for base stations

RapidIO = Highest Capacity

Interface on Freescale Processors

Base Station Micro Server

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