fqaf19n60 datasheet, pdf
DESCRIPTION
Mosfet N ChannelTRANSCRIPT
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2000 Fairchild Semiconductor International
April 2000
Rev. A, April 2000
FQ
AF
19N
60
QFETQFETQFETQFETTMFQAF19N60600V N-Channel MOSFET
General Description
These N-Channel enhancement mode power field effecttransistors are produced using Fairchilds proprietary,planar stripe, DMOS technology.This advanced technology has been especially tailored tominimize on-state resistance, provide superior switchingperformance, and withstand high energy pulse in theavalanche and commutation mode. These devices are wellsuited for high efficiency switch mode power supply.
Features
11.2A, 600V, RDS(on) = 0.38 @ VGS = 10 V Low gate charge ( typical 70 nC) Low Crss ( typical 35 pF) Fast switching 100% avalanche tested Improved dv/dt capability
Absolute Maximum Ratings TC = 25C unless otherwise noted
Thermal Characteristics
Symbol Parameter FQAF19N60 Units
VDSS Drain-Source Voltage 600 V
ID Drain Current - Continuous (TC = 25C) 11.2 A
- Continuous (TC = 100C) 7.0 A
IDM Drain Current - Pulsed (Note 1) 44.8 A
VGSS Gate-Source Voltage 30 VEAS Single Pulsed Avalanche Energy (Note 2) 1150 mJ
IAR Avalanche Current (Note 1) 11.2 A
EAR Repetitive Avalanche Energy (Note 1) 12 mJ
dv/dt Peak Diode Recovery dv/dt (Note 3) 4.5 VnsPD Power Dissipation (TC = 25C) 120 W
- Derate above 25C 0.96 W/C
TJ, TSTG Operating and Storage Temperature Range -55 to +150 C
TLMaximum lead temperature for soldering purposes,
1/8 from case for 5 seconds300 C
Symbol Parameter Typ Max Units
RJC Thermal Resistance, Junction-to-Case -- 1.04 CW
RJA Thermal Resistance, Junction-to-Ambient -- 40 CW
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D
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TO-3PFFQAF Series
G SD
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2000 Fairchild Semiconductor International
FQ
AF
19
N6
0
(Note 4)
(Note 4, 5)
(Note 4, 5)
(Note 4)
Rev. A, April 2000
Electrical CharacteristicsTC = 25C unless otherwise noted
Notes:1. Repetitive Rating : Pulse width limited by maximum junction temperature2. L = 16.8mH, IAS = 11.2A, VDD = 50V, RG = 25 , Starting TJ = 25C3. ISD 18.5A, di/dt 200A/s, VDD BVDSS, Starting TJ = 25C 4. Pulse Test : Pulse width 300s, Duty cycle 2%5. Essentially independent of operating temperature
Symbol Parameter Test Conditions Min Typ Max Units
Off CharacteristicsBVDSS Drain-Source Breakdown Voltage VGS = 0 V, ID = 250 A 600 -- -- VBVDSS/ TJ
Breakdown Voltage Temperature Coefficient
ID = 250 A, Referenced to 25C -- 0.65 -- V/C
IDSSZero Gate Voltage Drain Current
VDS = 600 V, VGS = 0 V -- -- 10 AVDS = 480 V, TC = 125C -- -- 100 A
IGSSF Gate-Body Leakage Current, Forward VGS = 30 V, VDS = 0 V -- -- 100 nA
IGSSR Gate-Body Leakage Current, Reverse VGS = -30 V, VDS = 0 V -- -- -100 nA
On Characteristics VGS(th) Gate Threshold Voltage VDS = VGS, ID = 250 A 3.0 -- 5.0 VRDS(on) Static Drain-Source
On-ResistanceVGS = 10 V, ID = 5.6 A -- 0.3 0.38
gFS Forward Transconductance VDS = 50 V, ID = 5.6 A -- 12 -- S
Dynamic CharacteristicsCiss Input Capacitance VDS = 25 V, VGS = 0 V,
f = 1.0 MHz
-- 2800 3600 pF
Coss Output Capacitance -- 350 450 pF
Crss Reverse Transfer Capacitance -- 35 45 pF
Switching Characteristics td(on) Turn-On Delay Time VDD = 300 V, ID = 18.5 A,
RG = 25
-- 65 140 ns
tr Turn-On Rise Time -- 210 430 ns
td(off) Turn-Off Delay Time -- 150 310 ns
tf Turn-Off Fall Time -- 135 280 ns
Qg Total Gate Charge VDS = 480 V, ID = 18.5 A,
VGS = 10 V
-- 70 90 nC
Qgs Gate-Source Charge -- 17 -- nC
Qgd Gate-Drain Charge -- 33 -- nC
Drain-Source Diode Characteristics and Maximum RatingsIS Maximum Continuous Drain-Source Diode Forward Current -- -- 11.2 A
ISM Maximum Pulsed Drain-Source Diode Forward Current -- -- 44.8 A
VSD Drain-Source Diode Forward Voltage VGS = 0 V, IS = 11.2 A -- -- 1.4 V
trr Reverse Recovery Time VGS = 0 V, IS = 18.5 A,
dIF / dt = 100 A/s -- 420 -- ns
Qrr Reverse Recovery Charge -- 4.7 -- C
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2000 Fairchild Semiconductor International
FQ
AF
19N
60
Rev. A, April 2000
0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.610
-1
100
101
25150
Notes : 1. V
GS = 0V
2. 250s Pulse Test
I DR ,
Rev
erse
Dra
in C
urre
nt [
A]
VSD
, Source-Drain Voltage [V]
2 4 6 8 1010
-1
100
101
Notes : 1. V
DS = 50V
2. 250s Pulse Test
-55
150
25
I D ,
Dra
in C
urre
nt [
A]
VGS , Gate-Source Voltage [V]10
-110
010
1
100
101
Notes : 1. 250s Pulse Test 2. T
C = 25
VGS
Top : 15 V 10 V 8.0 V 7.0 V 6.5 V 6.0 VBottom : 5.5 V
I D ,
Dra
in C
urre
nt [
A]
VDS
, Drain-Source Voltage [V]
0 15 30 45 60 750
2
4
6
8
10
12
VDS
= 300V
VDS
= 120V
VDS
= 480V
Note : ID = 18.5 A
VG
S, G
ate-
Sou
rce
Vol
tage
[V]
QG, Total Gate Charge [nC]10
-110
010
10
1000
2000
3000
4000
5000C
iss = C
gs + C
gd (C
ds = shorted)
Coss
= Cds + C
gdC
rss = C
gd
Notes : 1. V
GS = 0 V
2. f = 1 MHzC
rss
Coss
Ciss
Cap
acita
nce
[pF]
VDS
, Drain-Source Voltage [V]
0 10 20 30 40 50 60 700.0
0.2
0.4
0.6
0.8
1.0
1.2
VGS
= 20V
VGS
= 10V
Note : TJ = 25
RD
S(O
N) [
],D
rain
-Sou
rce
On-
Res
ista
nce
ID, Drain Current [A]
Typical Characteristics
Figure 5. Capacitance Characteristics Figure 6. Gate Charge Characteristics
Figure 3. On-Resistance Variation vs.Drain Current and Gate Voltage
Figure 4. Body Diode Forward Voltage Variation vs. Source Current and
Temperature
Figure 2. Transfer CharacteristicsFigure 1. On-Region Characteristics
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2000 Fairchild Semiconductor International
FQ
AF
19
N6
0
Rev. A, April 2000
1 0-5
1 0-4
1 0-3
1 0-2
1 0-1
1 00
1 01
1 0-2
1 0-1
1 00
N o te s : 1 . Z
J C( t) = 1 .0 4 /W M a x .
2 . D u ty F a c to r , D = t1/ t
2
3 . TJ M
- TC
= PD M
* Z J C
( t)
s in g le p u ls e
D = 0 .5
0 .0 2
0 .2
0 .0 5
0 .1
0 .0 1
Z
JC(t
), T
he
rma
l R
es
po
ns
e
t1, S q u a re W a v e P u ls e D u ra t io n [ s e c ]
25 50 75 100 125 1500
3
6
9
12
I D, D
rain
Cur
rent
[A]
TC, Case Temperature []10
010
110
210
310
-1
100
101
102
10 s
DC
10 ms
1 ms
100 s
Operation in This Area
is Limited by R DS(on)
Notes :
1. TC = 25
oC
2. TJ = 150
oC
3. Single Pulse
I D, D
rain
Cur
rent
[A]
VDS
, Drain-Source Voltage [V]
-100 -50 0 50 100 150 2000.0
0.5
1.0
1.5
2.0
2.5
3.0
Notes : 1. V
GS = 10 V
2. ID = 9.3 A
RD
S(O
N), (
Nor
mal
ized
)D
rain
-Sou
rce
On-
Res
ista
nce
TJ, Junction Temperature [oC]
-100 -50 0 50 100 150 2000.8
0.9
1.0
1.1
1.2
Notes : 1. V
GS = 0 V
2. ID = 250 A
BVDS
S, (
Nor
mal
ized
)D
rain
-Sou
rce
Brea
kdow
n Vo
ltage
TJ, Junction Temperature [oC]
Typical Characteristics (Continued)
Figure 9. Maximum Safe Operating Area Figure 10. Maximum Drain Currentvs. Case Temperature
Figure 7. Breakdown Voltage Variationvs. Temperature
Figure 8. On-Resistance Variationvs. Temperature
Figure 11. Transient Thermal Response Curve
t1
PDM
t2
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2000 Fairchild Semiconductor International
FQ
AF
19N
60
Rev. A, April 2000
Gate Charge Test Circuit & Waveform
Resistive Switching Test Circuit & Waveforms
Unclamped Inductive Switching Test Circuit & Waveforms
Charge
VGS
10VQg
Qgs Qgd
3mA
VGS
DUT
VDS
300nF
50K
200nF12V
Same Typeas DUT
Charge
VGS
10VQg
Qgs Qgd
3mA
VGS
DUT
VDS
300nF
50K
200nF12V
Same Typeas DUT
VGS
VDS
10%
90%
td(on) tr
t on t off
td(off) tf
VDD
10V
VDSRL
DUT
RGVGS
VGS
VDS
10%
90%
td(on) tr
t on t off
td(off) tf
VDD
10V
VDSRL
DUT
RGVGS
EAS = L IAS2----
21 --------------------
BVDSS - VDD
BVDSS
VDD
VDS
BVDSS
t p
VDD
IAS
VDS (t)
ID (t)
Time
10V DUT
RG
L
I D
t p
EAS = L IAS2----
21
EAS = L IAS2----
21----21 --------------------
BVDSS - VDD
BVDSS
VDD
VDS
BVDSS
t p
VDD
IAS
VDS (t)
ID (t)
Time
10V DUT
RG
LL
I DI D
t p
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2000 Fairchild Semiconductor International
FQ
AF
19
N6
0
Rev. A, April 2000
Peak Diode Recovery dv/dt Test Circuit & Waveforms
DUT
VDS
+
_
DriverRG
Same Type as DUT
VGS dv/dt controlled by RG ISD controlled by pulse period
VDD
LI SD
10VVGS
( Driver )
I SD( DUT )
VDS( DUT )
VDD
Body Diode
Forward Voltage Drop
VSD
IFM , Body Diode Forward Current
Body Diode Reverse Current
IRM
Body Diode Recovery dv/dt
di/dt
D =Gate Pulse Width
Gate Pulse Period--------------------------
DUT
VDS
+
_
DriverRG
Same Type as DUT
VGS dv/dt controlled by RG ISD controlled by pulse period
VDD
LLI SD
10VVGS
( Driver )
I SD( DUT )
VDS( DUT )
VDD
Body Diode
Forward Voltage Drop
VSD
IFM , Body Diode Forward Current
Body Diode Reverse Current
IRM
Body Diode Recovery dv/dt
di/dt
D =Gate Pulse Width
Gate Pulse Period--------------------------D =Gate Pulse Width
Gate Pulse Period--------------------------
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2000 Fairchild Semiconductor International
FQ
AF
19N
60
Rev. A, April 2000
Package Dimensions
15.50 0.20 3.60 0.20
26.5
0 0
.20
4.50
0.2
0
10.0
0 0
.20
16.5
0 0
.20
10
16.5
0 0
.20
22.0
0 0
.20
23.0
0 0
.20
1.50
0.2
0
14.5
0 0
.20
2.00
0.2
0
2.00 0.202.00 0.20
0.85 0.03
2.00 0.20
5.50 0.20
3.00 0.20(1.50)
3.30 0.20
2.00 0.204.00 0.20
2.50
0.2
0
14.8
0 0
.20
3.30
0.2
0
2.00
0.2
0
5.50
0.2
0
0.75 +0.200.10
0.90 +0.200.10
5.45TYP[5.45 0.30]
5.45TYP[5.45 0.30]
TO-3PF
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2000 Fairchild Semiconductor International Rev. A, January 2000
TRADEMARKS
The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and isnot intended to be an exhaustive list of all such trademarks.
ACExBottomlessCoolFETCROSSVOLTE2CMOSFACTFACT Quiet SeriesFAST
FASTrGTO
HiSeCISOPLANARMICROWIREPOPPowerTrench
QFETQSQuiet SeriesSuperSOT-3SuperSOT-6
SuperSOT-8SyncFETTinyLogicUHCVCX
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LIFE SUPPORT POLICY
FAIRCHILDS PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORTDEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTORINTERNATIONAL.
As used herein:1. Life support devices or systems are devices or systemswhich, (a) are intended for surgical implant into the body,or (b) support or sustain life, or (c) whose failure to performwhen properly used in accordance with instructions for useprovided in the labeling, can be reasonably expected to
result in significant injury to the user.2. A critical component is any component of a life supportdevice or system whose failure to perform can bereasonably expected to cause the failure of the life supportdevice or system, or to affect its safety or effectiveness.
PRODUCT STATUS DEFINITIONS
Definition of Terms
Datasheet Identification Product Status Definition
Advance Information Formative or In Design
This datasheet contains the design specifications forproduct development. Specifications may change inany manner without notice.
Preliminary First Production This datasheet contains preliminary data, andsupplementary data will be published at a later date.Fairchild Semiconductor reserves the right to makechanges at any time without notice in order to improvedesign.
No Identification Needed Full Production This datasheet contains final specifications. FairchildSemiconductor reserves the right to make changes atany time without notice in order to improve design.
Obsolete Not In Production This datasheet contains specifications on a productthat has been discontinued by Fairchild semiconductor.The datasheet is printed for reference information only.