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FPGA Switch Block Design Dr. Philip Brisk Department of Computer Science and Engineering University of California, Riverside CS 223

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FPGA Switch Block Design. Dr. Philip Brisk Department of Computer Science and Engineering University of California, Riverside CS 223. FPGA Architecture (Recap). Routing Instance and an S Block. Flexibility of Interconnection Structures for Field-Programmable Gate Arrays. - PowerPoint PPT Presentation

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Page 1: FPGA Switch Block Design

FPGA Switch Block Design

Dr. Philip BriskDepartment of Computer Science and Engineering

University of California, Riverside

CS 223

Page 2: FPGA Switch Block Design

FPGA Architecture (Recap)

Page 3: FPGA Switch Block Design

Routing Instance and an S Block

Page 4: FPGA Switch Block Design

Flexibility of Interconnection Structures for Field-

Programmable Gate Arrays

J. Rose and S. Brown,IEEE Journal of Solid-State Circuits 25(3): 277-282,

Mar. 1991

Page 5: FPGA Switch Block Design

Key Questions• What is the effect of C Block flexibility on routing

completion rate?

• What is the effect of S Block flexibility on routing completion rate?

• How do S and C Block flexibilities interact?

• What is the effect of S and C Block flexibilities on the number of tracks per channel to achieve 100% routability?

Page 6: FPGA Switch Block Design

Switch Block Flexibility• Total number of possible connections offered

to each incoming wire

Page 7: FPGA Switch Block Design

Switch Block Routability

• Cannot route from A to B

• Can route from A to B– Assymmetric about

horizontal and vertical axes

Fs = 2Fs = 2

Page 8: FPGA Switch Block Design

Example Connection Block

Page 9: FPGA Switch Block Design

Routability Study (One Benchmark)

W = 14

• Increasing FS improves routability, but FC must be high to achieve 100% routability

• Routing completion rate approaches 100% when FC > ½W

• Routing completion rate is low for low values of FC

Page 10: FPGA Switch Block Design

Routability Study (One Benchmark)

W = 14

• If FC is high enough, then low values of FS can achieve 100% routability

• The number of different paths between the initial physical pin and the terminating C Block of a two-pin wire is given by:

where N is the number of S Blocks on the global path

• For lower values of FC, increasing FS improves routability up to a point

Page 11: FPGA Switch Block Design

S Block vs. C Block FlexibilityAv

g. F

C/W

for 1

00%

routi

ng c

ompl

etion • A more flexible

S Block can compensate for a less flexible C Block

Page 12: FPGA Switch Block Design

Track Count Requirement for BNREto Achieve 100% Routability

Page 13: FPGA Switch Block Design

Conclusion

• C Blocks should have high flexibility to achieve high-percentage routing completion

• S Blocks require limited flexibility

• With low flexibility, only a few extra tracks more than the minimum can achieve 100% routability

Page 14: FPGA Switch Block Design

Universal Switch Modules for FPGA Design

Y-W. Chang et al.,ACM Transactions on Design Automation for Electronic Systems 1(1): 80-101, Jan. 1996

Page 15: FPGA Switch Block Design

Overview

• A Switch Block with larger routing capacity has better area-performance in FPGA routing– Increased connectivity of routing components– Equivalence of LUT/CLB inputs permits pin

permutations, which yields highly optimal routing– Most nets are short

• 60% of nets route through at most 2 Switch Blocks• 90% of nets route through at most 5 Switch Blocks

• Tradeoff between routing capacity and area

Page 16: FPGA Switch Block Design

Universal Switch Module DefinitionRouting Resource Vector (RRV):N = (n1, n2, n3, n4, n5, n6), 0 < ni < W

Example: N = (1, 0, 1, 1, 0, 0) is routable on the following:

n1

n4 n3

• A Switch Block of size W is universal if the following inequalities are sufficient to determine of an RRV is routable:

Page 17: FPGA Switch Block Design

Examples

Page 18: FPGA Switch Block Design

Universal Sub-modules

• A sub-module of a Universal switch is also universal (but for a smaller W)

Page 19: FPGA Switch Block Design

Theoretical Results

• A universal S Block can be constructed with at least 6W switches

• Any S Block constructed with less than 6W switches cannot be universal

Page 20: FPGA Switch Block Design

Non-universal S Blocks

Disjoint Switch Block (Xilinx XC4000 series)

Antisymmetric Switch Block (Rose and Brown, 1991)

Page 21: FPGA Switch Block Design

Channel Width Required for 100% Routing Capacity (One Benchmark)

Page 22: FPGA Switch Block Design

Conclusion

• Universal S Blocks offer better routability than disjoint and antisymmetric S Blocks

• Algorithm presented to generate S Blocks that are universal (not discussed)

Page 23: FPGA Switch Block Design

Architectures and Algorithms for Field-Programmable Gate Arrays

with Embedded Memory

S. Wilton,Ph.D. Thesis, University of Toronto, 1997

(Section 6.1.2)

Page 24: FPGA Switch Block Design

S Blocks

Disjoint Universal Wilton

Start with Universal S Block, and rotate the diagonal connections by one track

Page 25: FPGA Switch Block Design

FPGA Routing Structures: A Novel Switch Block and Depopulated

Interconnect Matrix Architectures

M. I. Masud,M.S. Thesis, University of British Columbia, 1998

Page 26: FPGA Switch Block Design

Routing with a Disjoint S Block

• Routing fabric partitioned into domains• Cannot cross domains (using routing only)

Page 27: FPGA Switch Block Design

Routing with a Wilton S Block

• Eliminates domain choice problem• Many more routing choices are available

Page 28: FPGA Switch Block Design

Implementation Details

WiltonDisjoint

WiltonDisjoint

Area Overhead

Page 29: FPGA Switch Block Design

Imran S Block

• Routability of Wilton S Block• Implementation efficiency of Disjoint S Block

Page 30: FPGA Switch Block Design

Imran S Block(1) Tracks that terminate at the S Block

• Wilton topology(2) Tracks that pass through the S Block

• Disjoint topology

Page 31: FPGA Switch Block Design

Area Results

Page 32: FPGA Switch Block Design

Delay Results

Page 33: FPGA Switch Block Design

Channel Width Results

Page 34: FPGA Switch Block Design

Conclusion

• Imran Switch Block– Routability of Wilton Switch Block– Area-efficiency of Disjoint Switch Block