FPGA Design of Boolean Functions Using a Cascade of Decoders and Logic Gates

A.N. Borodzhieva*, I.I. Stoev**, I.D. Tsvetkova*, S.L. Zaharieva** and V.A. Mutkov** *University of Ruse “Angel Kanchev”/Department of Telecommunications, Ruse, Bulgaria

**University of Ruse “Angel Kanchev”/Department of Electronics, Ruse, Bulgaria {aborodzhieva, istoev, itsvetkova, szaharieva, vmutkov}@uni-ruse.bg

Abstract – The paper presents active and interactive methods used for improving knowledge that students will get while implementing different Boolean functions with a cascade of full decoders and OR logic gates based on their schematic view and their testing on the laboratory board built with devices of Spartan-6 FPGA Family. The courses “Digital Electronics” and “Pulse and Digital Devices” introduce the students-bachelors of the electrical specialties in our University to the main problems of digital electronics.

Keywords – Boolean functions, combinational circuits, decoders, digital electronics, FPGAs, logic gates, Xilinx.

I. INTRODUCTION Digital electronics is a part of the modern equipment

like washing machines, dryers, dishwashers, toasters, air conditioners, game consoles, etc. The fundamentals and implementation of digital electronics units are basic for understanding the principle of operation and design of computers and communications, military and security equipment, consumer and industrial electronics, embedded systems, and so on [1].

At the University of Ruse one of the main courses is “Digital Electronics” in the curriculum of electrical and computer engineering programs. The course covers various topics in the field of synthesis and analysis of logic devices and it is based on two components – lectures and laboratory exercises. For the purposes of the effective educational process for electrical and computer engineers, a variety of active and interactive learning methods are used during the lab exercises together with the elements of the traditional presentation-based lectures. For faster and longer-lasting learning of the material being studied, active learning techniques such as case-based and problem-based learning, one-minute papers and “think-pair-share”, decision-making activities, etc. are used [2, 3, 4]. Modelling and simulating, as well as FPGA designing give the students opportunities for finding a solution for different practical tasks and better understanding the material. Critical thinking, creativity, collaboration, research and problem solving, innovations

and communication skills are used and developed in the laboratory exercises [2, 3, 4].

First, different active and interactive learning methods used in the training process are considered in the paper. Next, active learning in FPGA design of Boolean functions using a cascade of decoders is described.

II. ACTIVE AND INTERACTIVE LEARNING METHODS USED IN THE TRAINING PROCESS

Usually, students are asked to do some activities outside of school. In primary and secondary education, these activities are often referred to as home-based activities (homework) and are done by students at home. In higher education, these extracurricular activities are often called assignments (tasks), and students typically perform them at home, in libraries, or at other university facilities. Based on these features, education can be generalized as “lessons at classroom and homework at home”. This model, known as a teaching-based model, has been used for decades at each educational level and it is often associated with passive student learning (Fig. 1).

Flip teaching presents a total change of perspective, seeking the active participation of students in the learning process. It performs an interchange of the two main activities of the traditional model: lectures and homework. The main change is that lessons are delivered at home and homework – in the classroom [5].

The active learning method consists of a group of tools allowing students to “actively” participate in the course by engaging in activities proposed to improve their skills rather than attempting to absorb unilaterally transmitted information.

Passive Learning Active Learning

DefineList

DescribeExplain

DemonstrateApply

Practice

AnalyzeDefineCreate

Evaluate Figure 1. Comparison of passive and active learning

This publication is developed within the frame of Project “Forest Monitoring System for Early Fire Detection and Assessment in the Balkan-Med Area” (SFEDA), project code 2263, financed under the transnational Cooperation Programme INTERREG V-B "Balkan-Mediterranean 2014-2020", co-funded by the European Union and the National Funds of the participating countries and by the National Scientific Program ICTinSES, financed by the Ministry of Education and Science of Bulgaria.

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The active learning method (Fig. 1) requires students to implement a variety of activities to generate full awareness of what they are doing as content processing enables them to learn. In essence, it is a student-centered approach in which the student determines his or her pace and style of learning and finds support in his or her peers, and where teachers play the role of “guiding and motivating” the student in the learning process. The active learning approach can be related to a variety of techniques, ranging from traditional problem-solving to case studies, learning from doing, learning through doing, discussion activities, or peer training. Modern technologies play an important role in the learning process, but they are not essential, so problems based on simulations and games are included along with the use of mobile devices and ultimately classrooms equipped with modern high technologies. Definitely, active learning arouses more student interest than traditional lectures, providing flexibility for course development, and encourages a tendency to take on individual and group challenges. In engineering education, experimental-based learning and the group approach offer activities where motivation and creativity are essential. Students are provided with tools to build their own knowledge, modified dynamically, along with the capacity to assess the difficulty of the problem and to determine the criterion to be used to solve it [6].

Continuous assessment throughout the course is considered motivating and maintains regular training habits. Therefore, student assessment requires rethinking. Rather than just an end-of-course exam, project work, exercises and course participation are also an essential part of the assessment. A joint (collaborative) assessment of the project work is used to motivate cooperation, but exams are evaluated individually to prevent free riding. The visualization using numerical software (for example, Scilab, MATLAB, Logisim, Multisim, etc.) aims to focus the learning on understanding the material. Design exercises and practical measurements are used to familiarize students with laboratory equipment and to motivate them studying the theory [7].

Some of the interactive teaching styles and the most effective ways to engage the students’ interests are: 1) brainstorming; 2) think-pair-share; 3) buzz session; 4) incident process; 5) question and answer sessions [8].

The interactive brainstorming is performed in group sessions. It is useful for generating creative ideas and it helps students learn together in a group. Different types of interactive brainstorming are presented in Fig. 2 [8].

Reverse or negative thinking

Brainstorming

Structured and

unstructured

Team-idea mapping

Group passingIndividual

brainstorming

Figure 2. Brainstorming

In the process of think, pair, and share, the lecturer formulates a problem or a question, then groups students in pairs and gives each pair time enough to make a conclusion on the problem, and permits each participant to define the conclusion in voice, for example one student explains a concept while the other student evaluates what is being learned. Applying variations of the process, the students are engaged in the learning process, communicating, and retaining more information [8].

During the buzz sessions, students participate in session groups focused on a single topic. Every student in each group contributes ideas. The teacher encourages discussion and collaboration among the students in each group. During the buzz sessions, students should learn from one another’s experiences [8].

The incident process is a teaching style involving case study formats. The focus of this process is on learning how to solve real problems involving real people, providing small groups of students with details from real situations and then ask them to find out a workable solution. This teaching style prepares the students for life outside the classroom [8].

During the Q&A sessions, each time when the topic is introduced, before the formal lecture, the teacher asks the students to write the thematic questions on cards. After collecting the cards, the teacher mixes them up, reads them and answers the questions generated by students [8].

III. ACTIVE LEARNING IN FPGA DESIGN OF BOOLEAN FUNCTIONS USING A CASCADE OF DECODERS

A. Applied active and interactive methods during implementation of logical functions with decoders Based on the flip teaching, realizing an interchange of

the two main activities of the traditional model (lectures and homework), during the classes in the courses “Digital Electronics” and “Pulse and Digital Devices” lessons are delivered at home and homework – in the classroom. Before the lesson, students should get acquainted with the theoretical issues discussed in detail in [9, 10] (or in other sources in Internet), as well as with the possibilities of Logisim [11] for studying digital circuits (Fig. 3) – for example, definition of decoder (Fig. 3 A), the truth table (Fig. 3 B), the output functions (Fig. 3 C) and the block diagram (Fig. 3 D) of a complete decoder with two inputs and four outputs. Students need to test the circuit (Fig. 3 D) for all four input combinations and the results observed are shown in Fig. 3 E, where the active input and output signals are 1s. For this result, students need to use the software product Logisim [11].

It is also necessary for students to get acquainted in advance with the solved two examples – Problem 1 and Problem 2 (Fig. 4), which allow the implementation of a Boolean function with a decoder and additional logic gates (Problem 1) or by cascading decoders and additional logic gates (Problem 2).

Students learning the courses “Digital Electronics” and “Pulse and Digital Devices” can use individual brainstorming or think, pair, and share activities to solve these problems and test the logic circuit shown in Fig. 3 E.

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Decoders

The decoders are devices with n inputs and m outputs 2nm , providing an active signal (1 or 0) to one of the outputs according to the combination of the logical signals supplied to the inputs.

The truth table, the output functions and the structural diagram built in Logisim of a full decoder with 2 inputs and 4 outputs are presented below.

Truth Table of a Full Decoder with 2 Inputs and 4 Outputs (Active Input and Output Signals: Logic 1) Structural diagram of the decoder

Output functions of the decoder

0 1 2Y x x ; 1 1 2Y x x ; 2 1 2Y x x ; 3 1 2Y x x .

Testing the circuit for all 4 input combinations

A

B

C

D

E

Figure 3. Flip teaching (an interchange of lectures and homework) during the classes in the courses “Digital Electronics” and “Pulse and Digital Devices”

Problem 1. Using a three-input decoder and additional logic gates, construct a structural diagram that implements the function 1 2 3, , 0,1, 3, 7f x x x if the decoder has: a) inverse outputs (integrated circuit

SN74LS138, with three enabling inputs 1 2 3, ,E E E ); b) normal outputs. Justify the type of the additional logic gate by describing the operation of the circuit for the input combinations with numbers 3 and 6.

Depending on the decoder type (normal or inverse outputs) and the way of describing the function (Perfect Disjunctive Normal Form, PDNF, or Perfect Conjunctive Normal Form, PCNF), the chosen additional logic gate is given in the table below.

Problem 2. Using two-input decoders with normal outputs and enabling inputs and additional logic gates,

construct a structural circuit that implements the Boolean function 1 2 3 4, , , 1, 5, 6, 8,12,13,15f x x x x . Solution: In the table below the minterms m corresponding to the input combinations for which the function

has a value of 1 are given. Each minterm is divided into two parts: the first one m includes the variables 1x and

2x , and the second one m – 3x and 4x . Each part can be obtained at the output of a decoder with two inputs. The products of the first two arguments can be obtained at the outputs of a two-input decoder and can be used as enabling signals to the next stage composed of two-input decoders whose information inputs are connected to the other two variables. In this way, the cascade of the decoders is realized and shown in the figure below. The justification of the type of the additional logic gate is based on the results presented in the table above.

Figure 4. Problem 1 and Problem 2 – formulation and solution

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Problem 3. Investigate the operation of a two-input decoder with normal outputs and an enabling input and determine the function implemented by cascading such decoders and with an additional logic gate (OR). Fill in the truth table of the device after programming FPGA with the file casc_Dc_WG_xx.bit, where xx = 01...30. The device realizes the function of four variables by a cascade of two-input decoders with normal outputs and an additional logic gate (OR) (Problem 2). After testing with the laboratory board and completing the truth table, build the schematic of the device used for creating the bit file in the environment of ISE Project Navigator. If you have some free time during the practical classes, create the bit file in ISE Project Navigator by yourself.

Figure 5. Problem 3 – formulation and solution

B. Applied active and interactive methods during implementation of logical functions with decoders Students from the second year study some basic

disciplines, where they learn essential skills. During the classes in the courses “Digital Electronics” and “Pulse and Digital Devices”, students have to realize a function of 3 arguments with a three-input full decoder (Problem 1) and a function of 4 arguments by cascading two-input full decoders (Problem 2) in three ways: 1) manually; 2) by constructing and testing the circuit in Logisim; 3) by constructing and testing (or only testing) the circuit in the environment of ISE Project Navigator [12]. Here students need to use learning from doing, learning through doing, discussion activities, or peer training. A collaborative (joint) assessment of the project work is used to motivate cooperation, but exams are evaluated individually to prevent free riding. The visualization using software (for example, in this case, Logisim and ISE Project Navigator) aims to focus the learning on understanding the material.

During the classes, students get formulated tasks like those shown in Fig. 4 and Fig. 5. For every student, there is a personal assignment. They need to solve them and present a report with solutions like those shown in Fig. 4 and Fig. 5. The solution of the first problem is presented in details in [9].

Students can solve alone the first and the second assignment. To solve these problems students can use individual brainstorming or team idea mapping. In

addition, they need to provide evidence from their work presenting a report consisting of step-by-step solutions.

The third assignment gives the students an opportunity to combine them in pairs, so using the activity think, pair and share they can get the solution. Also, this problem is aimed to provoke them to use learning through doing by programming. Students are divided in groups and they can help each other using discussion activities, or peer training. The generated bit file allows the exploration of two similar devices. After programming FPGA with the bit file, two students can work simultaneously on the lab-board. In the last part of this problem, students use a lab-board to test their solutions. An example of a screenshot from the software used for a part of the solution of a student, on the screen of the computer, is given in Fig. 5. A photo taken when testing with the lab-board is shown in Fig. 5 (the students around the board).

In engineering education, experimentally based learning and the group approach offer activities in which motivation and creativity are essential. These are basic skills that modern students must possess in order to be competitive. Students are given the opportunity to build their own knowledge that can be dynamically modified, along with defining the criteria to be used to solve the problems.

Students enrolled in the courses “Digital Electronics” and “Pulse and Digital Devices” have the opportunity to learn some essential skills, which will make them successful engineers. Lecturers try to improve knowledge

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of the students using active and interactive methods and make them competitive in the future.

IV. CONCLUSION The lectures in the courses “Digital Electronics” and

“Pulse and Digital Devices” at the University of Ruse are really interested in improving the engineering education by applying active learning and interactive methods for attracting the students’ attention, presented in the paper and promoting them within our university community.

On the basis of configuring the logic blocks in FPGAs complex Boolean functions are implemented. In the course “Digital Electronics” and “Pulse and Digital Devices” students study how to build a circuit using logic gates (for example, only 2-input NAND gates) or some combinational units (for example, decoders and multiplexers). One of the topics covered in the courses is the design of devices implementing Boolean functions using decoders or a cascade of decoders and logic gates, presented in the paper.

The laboratory exercises help the students to develop design experience and problem-solving skills, important for the engineering profession. They gain skills for analyzing, synthesizing and evaluating design information and problems. Therefore, it is very important for the lectures in the universities to develop effective teaching pedagogical methods to involve students in active learning for the laboratory classes in digital electronics.

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[3] J. Pang, “Active Learning in the Introduction to Digital Logic Design Laboratory Course”. ASEE Zone III Conference 2015. https://www.asee.org/documents/zones/zone3/2015/Active-Learning-in-the-Introduction-to-Digital-Logic-Design-Laboratory-Course.pdf.

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[5] A. Fidalgo-Blanco, M. Martinez-Nuñez, O. Borrás-Gene, J. J. Sanchez-Medina. “Micro flip teaching ‒ An innovative model to promote the active involvement of students.” Computers in Human Behavior, Volume 72, July 2017, pp. 713-723.

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