foxconn 915a01 schematics

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Foxconn 915a01 Schematics

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Foxconn Precision Co. Inc.915A01 SchematicD

Page Index01. 02. 03. 04. 05. 06. 07. 08. 09. 10. 11. 12. 13. 14. 15. 16. 17. 18. 19. 20. 21. 22. 23. 24. Index Page Topology Rest Map Clock Distribution Power Delivery Map Power Sequence CK410 ClockGen VRD10.1 (SC2646, 3P) VRD10.1 (SC1211) DDR2 POWER Power 1.5V/1.2V 2.5V_MCH LGA775 -1 LGA775 -2 Grantsdale -GMCH -1 Grantsdale -GMCH -2 Grantsdale -GMCH -3 DDR2 Channel A Term. DDR2 Channel A DIMM1, 2 DDR2 Channel B Term. DDR2 Channel B DIMM1, 2 PCI Express x16 Gfx Slot VGA Connector ICH6-1

Fab.B

Date: 2004/05/01D

27. LAN RTL8110S 28. RT8110S/C-POWER 29. LAN Connectors 30.SATA Controller/Regulator 31. AC' 97 2.3/Azalia Codec 32. FWH 33. USB Connectors 34. Power Conn. / 3V_SB/FAN 35. Front Panel / MISC Conn. 36. PCI Express x1 Slot 1 37. PCI Express x1 Slot 2 38.PCI Express x1 Slot3] 39. PCI Slots 1 40.PCI Slot 2 41.PCI Slot 3 42. Super I/O 43. HW Monitor 44. Keyboard / Mouse 45. Serial / Parallel 46. VT6307_1394 47. 1394 CON 48. TPM 49. VID Controller 50. GPIO / IRQ / IDSEL Map 51. Jumper Setting Table 52. Modify List FOXCONN PCEGTitle

C

C

B

B

25. ICH6-2A

26. ICH6-3

A

Index PageSize Date:5 4 3 2

Document Number

915A01 DDR2Sheet1

Rev B of 52

Tuesday, May 18, 2004

1

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2

1

VRD 10.1 3 Phase PWMD

Prescott, Tejas - LGA775 processorSocket T800/533 FSB

CK-410 ClockD

Intel SDVO Card

or

PCI Express x 16 External Graphics Card

PCI Express x16 Port

DDR2 533/400

Channel A DDR2 DIMM1 DIMM2

Back Panel USB2.0 Port 1C

VGA Connector

GMCH4 Lanes Direct Media Interface (DMI)

DDR2 533/400

GrantsDalePCI Express x1 Interface

Channel B DDR2 DIMM1 DIMM2

USB2.0 Port 2 USB2.0 Port 3 USB2.0 Port 4 USB2.0 Port 5 USB2.0 Port 6 Front Panel USB2.0 Port 7 USB2.0 Port 8

PCI-E Slot 1 PCI-E Slot 2 PCI-E Slot 3C

PCI PCI

Interface Interface Interface

uATX Form FactorPCI Slot 1,2,3

ICH6PCI

LAN REALTEK 8100C/8110S 1394 VIA VT6307 Serial ATA SATA Connector 5 SATA Connector 6B

PCI

InterfaceSil3112A

B

ATA100 IDE CONN 1 Super I/O ITE IT8712F LPC I/F

Serial ATA SATA Connector 1 SATA Connector 2 SATA Connector 3 SATA Connector 4

AC 97 2.3/Azalia Header Realtek ALC203/ALC650/ALC655 PS2A

Parallel Serial

Floppy Drive Connector

Keyboard / Mouse

Firmware HUB 4Mb or 8MbTitle

A

FOXCONN PCEGTopologySize Date: Document Number

TPM TCPA1.2 (HEADER)5 4 3 2

915A01 DDR2Sheet1

Rev B of 52

Tuesday, May 18, 2004

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2

1

CPU_PWRGD

ATX PowerD

CPU (Tejas / Prescott) LGA775 processorTranslation CircuitryPWRGD_3V PWROK CPURST#

CPURST#

D

PWRGD_PS PS_ON#

GMCHGrantsDaleRSTIN#

PCI Express x16

LRESET#C

TPMC

ICH_PWRGD PCIRST# PLTRST# Buffer Buffer Buffer uATX Form Factor RST#

PCI Slot 1

ICH6Front PanelFR_RST SW_ON PWROK SYS_RESET#

AC_RST# RST#

LAN RST# 1394 RST# FWH ATA100 IDE CONN 1B

B

RST# RSMRST# PWRBTN# SLP_S3# RCIN# KBRST

Super IORST#

Power on/off circuit

RSMRST#

Audio

PSINPWRON#

A

PSOUT#

A

RSMRST circuit

FOXCONN PCEGTitle

Reset MapSize Date:5 4 3 2

Document Number

915A01 DDR2Sheet1

Rev B of 52

Tuesday, May 18, 2004

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14.318MHz

CPUCPU 133/200 MHz Diff PairD

MCH 133/200 MHz Diff Pair

DDR 4 Slots 12 Diff CLKsPCI Express x16 Gfx Channel A DDR2

D

PCI Express 100 MHz Diff Pair DOT 96 MHz Diff Pair PCI Express/DMI 100 MHz Diff Pair

GrantsDale

GMCH

DIMM1 DIMM2 Channel B DDR2 DIMM1

PCI Express/DMI 100 MHz Diff PairC

DIMM2C

FWH 33 MHz PCI 33 MHz

FWHPCI Slot 1,2,3

B

24.576MHz

CK-410A 5

USB/SIO 48 MHz

ICH 33 MHz REF 14 MHz

ICH6

AC'97AC97 Bit Clock

B

PCI Express 100 MHz Diff Pair

PCI-E SLOT1,2,3

LAN 33 MHz

LANTPM 33 MHz

32.768KHz

TPM1394 33 MHz

1394SIO 33 MHz SATA 100 MHz Diff Pair

Super I/O

A

FOXCONN PCEGTitle

CLOCK DistributionSize Date:4 3 2

Document Number

915A01 DDR2Sheet1

Rev B of 52

Tuesday, May 18, 2004

4

5

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1

VRD 10.1 Switching Four PhaseD

Vccp (CPU Vcore) Voltage=0.8375~1.6V Icc(Max)=110A (Tejas FMB1) 1.2V FSB Vtt-tbdA

Proceessor

Super I/O3.3V Icc(Max)=50mAD

3.3SBV Icc(Max)=50mA(S0) 3.3SBV Icc(Max)=38mA(S3)

ATX P/S12V 5VSB

Grantsdale GMCHLinear 3.3V to 1.2V 5AFSB_Vtt 1.2V FSB Vtt Icc(Max)=1.2A 2.6V DDR1 I/O=5.5A(S0,S1) 2.6V DDR1 I/O=250mA(S3) Vcore (Core Logic) 1.5V Icc(Max)=9.6A(Integrated) Icc(Max)=7.5A(Discrete) *1.5V PCIexpress(X16)=1A *1.5V PCIexpress(X1)=0.06A *1.5V SDVO=tbdA *1.5V DMI=0.25A

USB 8 Ports PS2 FWH

CK 410Vdd (Core) 3.3V Ivdd(Max)=560mA

3.3V 5V -12V

+5V DUAL=4A(S0, S1) +5V DUAL=20mA(S3)

+5V DUAL=345mA(S0, S1) +5V DUAL=2mA(S3)

3.3V=107mA(S0, S1)

DDR2 Channel AC

Vdd (Core) 1.8V Ivdd(Max)=4A(per channel) Vtt (Core) 0.9V Ivterm(Max)=600mA (per channel)

5VDUAL Icc(Max)= 4.345A(S0,S1) 22mA(S3)

PCI Express X16 slot (1)+12V=4.4A 3.3VSB Icc(Max)=0.375A(wake) Icc(Max)=0.02A(no wake) +3.3V=3A

C

DDR Channel BVdd (Core) 1.8V Ivdd(Max)=4A(per channel) Vtt (Core) 0.9V Ivterm(Max)=600mA (per channel)

Single Phase Switch 5V to 2.6V Ivdd(Max)=11.5A Ivdd(Max)=500mA(S3) LDO 2.6V to 1.3V Ivterm(Max)=1.8A

2.5V DAC regulator V_2p5_DAC 100mA

*2.5V DAC=0.07A 2.5V HV=tbdA

ICH6V_1p5_core 1.5V Switching=12A 1.2V VCC_CPU-tbdmA 1.5V Core=1.88A *1.5V PCI Express=270mA *1.5V DMI=290mA 1.5V SATA=430mA LDO 12V to 5V

PCI

Slot 1-12V

-12V Icc(Max)=0.1A 5V Icc(Max)=5A 3.3V Icc(Max)=7.6A 12V Icc(Max)=0.5A 3.3VSB Icc(Max)=0.375A(wake) Icc(Max)=0.02A(no wake) PCI LAN (REALTEK 8100C/8110S) 3.3VSB/3.3V_SYS P(Max)=2W(Gb), P(Max)=.622W(100Mb), P(Max)=.512W(10Mb) PCI 1394 (VIAVT6307) 3.3V_SYS Icc(Max)=0.375A(wake) Icc(Max)=0.02A(no wake)

B

B

AC'97 2.3 CodecVcc 5V Icc(Max)=48mA Vcc 3.3V Icc(Max)=20mA

3.3V=180mA 3.3V VccSus Icc(Max)=330mA 5VRef=tbduA 5VrefSus=tbduA LDO 5VSB to 3.3SB Icc(Max)=1.5A RTC=5uA

A

A

RTC Battery *Power derived through filterTitle

FOXCONN PCEGPower Delivery MapSize C Date: Document Number

915A01 DDR2Sheet1

Rev B of 52

Tuesday, May 18, 2004

5

5

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1

S5->S0

+12V_SYS

S0->S5+12V_SYS

D

+5V_DUAL +3D3V_DUAL

+5V_SYS +3D3V_SYS +2D6V_STR

+5V_SYS +3D3V_SYS +2D6V_STR VTT_DDR VTT_VR Vcc

+5V_DUAL +3D3V_DUAL

D

VTT_DDR VTT_VR Vcc

1ms to 10ms

Vcc_PWRGD VRM_OUTEN

Vcc_PWRGD VRM_OUTEN VIDPWRGD PS_ONJC

C

PS_ONJ

VIDPWRGD

S0->S3+12V_SYS

S3->S0

+12V_SYS

+5V_SYS +3D3V_SYS +2D6V_STR VTT_DDR VTT_VR Vcc

+5V_DUAL +3D3V_DUAL +2D6V_STR

+5V_DUAL +3D3V_DUAL +2D6V_STR

+5V_SYS +3D3V_SYS +2D6V_STR

B

B

VTT_DDR VTT_VR Vcc

1ms to 10ms Vcc_PWRGD VRM_OUTEN VIDPWRGD PS_ONJ PS_ONJ

Vcc_PWRGD VRM_OUTEN VIDPWRGD

A

A

FOXCONN PCEGTitle

Power SequenceSize C Date:5 4 3 2

Document Number

915A01 DDR2Sheet1

Rev B of 52

Tuesday, May 18, 2004

6

5

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3D3V_SYS

25V, X7R, +/-10%

25V, X7R, +/-10%

25V, X7R, +/-10%

FB25 FB L0805 300 Ohm 2 BC153 0.1uF C0603

*

D

C0603

3D3V_SBU31 NC7SZ08 Dummy 4 PWRGD_3V_ACT 15,24

1

*

*

BC150 0.1uF

Note : VDD_PCI 1. When CV115, Pin 54 is FSA. When CV115-2/-4, Pin 54 is FSA/REF1. 2. When CV115, Pin 38 is FSB. When CV115-2/-4, Pin 38 is RESET output and Pin 12 is FSB/48Mhz. 3. When CV115, Pin 37 is FSC. When CV115-2/-4, Pin 37 is TURBO2 input and Pin 52 is FSC/REF0. 4. Pin 5 of CV115-2/-4 is either TURBO1 or PCI4. 5. When CV115-4, Pin 14 and Pin 15 are SRC_0 and SRC_0#. 3D3V_SYS 3D3V_CLK_PCI 3D3V_SB

Filter

3D3V_SYS

VDD_CPU/VDD_SRC Filter

1

1

*

R119

2

C0603

C0603

C0603

C0603

this cap. placed close to power pin

C0603

C0603

C0603

C0603

VCCP

3D3V_CLK_PCI

*

*

5

*

R23

*

2.2 +/-5% R0603

VDD_48 Filter 3D3V_CLK_48

*

C0603 3D3V_CLK_CPU_SRCD

FB24 FB L0805 300 Ohm

R27

0 +/-5% R0603 Dummy

0 +/-5% R0603 3D3V_CLK_PCI_SB 3D3V_CLK_PCI BC163 BC168 BC541 BC542 BC189 BC182 BC188 BC195 BC200 C1206

PWRGD_3V FS1-CV115

1 2 3 R580

0.1uF

0.1uF

0.1uF

25V, X7R, +/-10%

25V, X7R, +/-10%

25V, X7R, +/-10%

0.1uF

0.1uF

25V, X7R, +/-10% 0.1uF

0.1uF

25V, X7R, +/-10% 0.1uF

25V, X7R, +/-10%

*

*

C

** * *

B C E B EC

Q43 MMBT3904 Dummy

** **

Q28 MMBT3904 Dummy

*

R220 220 +/-5% R0603 Dummy

*

*R219 10K +/-5% R0603 Dummy

R204 10K +/-5% R0603 Dummy

Dummy R0603

D11 2

this cap. placed close to power pin

14,24,35,49 ICH_SYS_RSTJ R205 R0603 CLK_VTT_PWRGDJ 4.7K +/-5% Dummy R12400 R0603 40 CK_33M_PCI2 R128 R0603

ICH_SYS_RSTJ 1 BC586

1N4148W 10nF C0603 50V, X7R, +/-10% U12 3D3V_CLK_PCI VDD_PCI VSS_PCI PCI2 PCI3 PCI4/Turbo1 VSS_PCI VDD_PCI PCIF_0/ITP_EN PCIF PCIF2 VDD_48 FS_B/48MHZ VSS_48 DOTT_96MHz DOTC_96MHz (VTT_PwrGd/PD#) SRC_1 SRC_1# VDDSRC VSS SRC_2 SRC_2# SRC_3 SRC_3# VSS_GND SATA SATA# VDD_SRC IDTCV115-2 CLK_OSC2 2 X3

25V, X7R, +/-10%

ONLY POP WHEN CV115 POPED

*

0 +/-5%

*

R222 10K +/-5% R0603 Dummy FS1-CV115

high frequency decoupling caps. placed close to power pins R12401 R121 R126 R142 R134 33 33 33 22 22 +/-5% R0603 +/-5% R0603 +/-5% R0603 +/-5% R0603 +/-5% R0603

33 33

+/-5% +/-5%

* *

42 CK_48M_SIO 24 CK_48M_ICH 15 CK_96M_P_GMCH 15 CK_96M_N_GMCH

** ****

25 CK_SATA_100M_P_ICH 25 CK_SATA_100M_N_ICH

****

22 CK_PE_100M_P_16PORT 22 CK_PE_100M_N_16PORT 36 CK_PE_100M_P_1PORT1 36 CK_PE_100M_N_1PORT1 15 CK_PE_100M_P_GMCH 15 CK_PE_100M_N_GMCH

1 46 CK_33M_1394 2 33M_PCI1 R124 R0603 33 +/-5% 3 39 CK_33M_PCI1 R130 R0603 33 +/-5% 4 48 CK_33M_TPM R685 0 Dummy 5 42 TRUBO1J 6 3D3V_CLK_PCI R1438 33 +/-5% R0603 7 30 CK_33M_Sil3112A XDP_EN R146 R0603 4.7K +/-5% 8 33M_SIO R143 22 R132 R0603 33+/-5% 9 42 CK_33M_SIO 33M_ICH +/-5% R0603 R135 R0603 33+/-5% 10 26 CK_33M_ICH 3D3V_CLK_48 11 Change R from 43OHM to 33OHM FS1-CV115-24 R147 22 +/-5% 12 R0603 13 96M_DOT_P R154 R0603 33 +/-5% 14 96M_DOT_N R161 R0603 33 +/-5% 15 CLK_VTT_PWRGDJ 16 R160 49.9 +/-1% R208 33 10,15,24,32,34 PWRGD_3V R1537 49.9 +/-1% 17 18 PE_100M_P_16PORT 3D3V_CLK_CPU_SRC R166 R0603 33 +/-5% 19 PE_100M_N_16PORT R168 R0603 33 +/-5% 20 R175 R0603 33 +/-5% PE_100M_P1 21 R179 R0603 33 +/-5% PE_100M_N1 22 R181 R0603 33 +/-5% PE_100M_P_GMCH 23 R185 R0603 33 +/-5% PE_100M_N_GMCH 24 25 R190 R0603 33 +/-5% SATA_100M_P_ICH 26 R198 R0603 33 +/-5% SATA_100M_N_ICH 27 3D3V_CLK_CPU_SRC 28

B

*

R165 49.9 +/-1% R0603

*

R167 49.9 +/-1% R0603

*

R178 49.9 +/-1% R0603

*

R174 49.9 +/-1% R0603

*

R184 49.9 +/-1% R0603

*

R180 49.9 +/-1% R0603

*

R197 49.9 +/-1% R0603

*

PCI_1 PCI_0 FS_A/(REF1/PCI5) VDD_suspend FS_C/REF0 VSS_REF XTAL_IN XTAL_OUT VDD_REF SCL SDA CPU_0 CPU_0# VDD_CPU CPU_1 CPU_1# VSS_CPU IREF RESET# Turbo2 CPU_2_ITP/ SRC_7 CPU_2_ITP#/ SRC_7# VDD_SRC SRC_6 SRC_6# SRC_5 SRC_5# VSS_SRC

56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29

33M_LAN 33M_FWH FS0 3D3V_CLK_PCI_SB FS2-CV115-24 CLK_OSC1 CLK_OSC2 3D3V_CLK_PCI 200M_P_CPU +/-5% 200M_N_CPU +/-5% 3D3V_CLK_CPU_SRC 200M_P_GMCH +/-5% 200M_N_GMCH +/-5%

CK_33M_PCI3 41 CK_33M_LAN 27 CK_33M_FWH 32C

CK_14M_AUDIO 31 CK_14M_ICH 24

***

* ** **

33 33 33 33 475 TRUBO2J

R162 R169 R151 R158

SMB_CLK_MAIN 19,21,44 SMB_DATA_MAIN 19,21,44 CK_200M_P_CPU 13 CK_200M_N_CPU 13 CK_200M_P_GMCH 15 CK_200M_N_GMCH 15

** **

**

*

CLK_IREF R172 +/-1% FS1-CV115 FS2-CV115 R435 0 PE_100M_P3 R1547 PE_100M_N3 R1697 R0603 +/-5% 3D3V_CLK_CPU_SRC PE_100M_P2 R182 33 PE_100M_N2 R186 33 PE_100M_P_ICH R191 33 PE_100M_N_ICH R195 33

* **

33 33

42

+/-5% +/-5% +/-5% +/-5% R196 49.9 +/-1% R0603 R192 49.9 +/-1% R0603

****

R170 49.9 +/-1% R163 49.9 +/-1% R159 49.9 +/-1% CK_PE_100M_P_1PORT3 38 R152 49.9 +/-1% CK_PE_100M_N_1PORT3 38 CK_PE_100M_P_1PORT2 37 CK_PE_100M_N_1PORT2 37 CK_PE_100M_P_ICH 24 CK_PE_100M_N_ICH 24

R189 49.9 +/-1% R0603

*

SM Bus Address :1101-0010

1 CLK_OSC1

*BC166 10pF 50V, NPO, +/-5% C0603

*

BC171 XTAL-14.318MHz 10pF 50V, NPO, +/-5% C0603

*

R1609 49.9 +/-1% R0603

*

R153 49.9 +/-1% R0603

*

*

R187 49.9 +/-1% R183 R0603 49.9 +/-1% R0603

*

25V, X7R, +/-10%

3D3V_SB

*

BC187 0.1uF this cap. placed 25V, X7R, +/-10% close to power pin C0603

*

* *

* *

* *10V, Y5V, +80%/-20%

2

BC208 0.1uF

FB29 FB L0805 300 Ohm Change decoupling caps from 10nf to 0.1uf

*

50V,NPO,+/-5%

50V,NPO,+/-5%

50V,NPO,+/-5%

50V,NPO,+/-5%

50V,NPO,+/-5%

50V,NPO,+/-5%

50V,NPO,+/-5%

50V,NPO,+/-5%

50V,NPO,+/-5%

50V,NPO,+/-5%

A

50V,NPO,+/-5%

*

BC170 10pF C0603 Dummy

*

BC175 10pF C0603 Dummy

*

BC157 10pF C0603 Dummy

*

BC154 10pF C0603 Dummy

*

BC161 10pF C0603 Dummy

*

BC164 10pF C0603 Dummy

*

BC165 10pF C0603 Dummy

*

BC152 10pF C0603 Dummy

*

BC158 10pF C0603 Dummy

*

BC169 10pF C0603 Dummy

*

BC162 10pF C0603 Dummy

*

* * *

BC186 C1206 10V, Y5V, +80%/-20%

10uF

50V, X7R, +/-10% BC179 C0603 10nF 10V, Y5V, +80%/-20% BC148 C1206 10uF

BC147 C1206 10V, Y5V, +80%/-20%

*

*

*

10uF

10uF

*

**

B

CK_48M_SIO CK_48M_ICH CK_33M_PCI1 CK_33M_LAN CK_33M_1394 CK_33M_SIO CK_33M_ICH CK_33M_FWH CK_33M_TPM CK_14M_AUDIO CK_14M_ICH

BSEL TABLEFS2-CV115-24 FS2-CV115 R133 R686 2.2K +/-5% 2.2K +/-5% Dummy FSBSEL1 FSBSEL2

**

C B A FSB Frequency 0 0 0 266MHz 0 0 1 133MHz(533) 0 1 0 200MHz(800)

FS1-CV115-24 R164 FS1-CV115 FS0 R687 R171

2.2K R0603 2.2K +/-5% Dummy 2.2K +/-5% R0603

*

FSBSEL0

FSB_VTT R213 R214 R131 470 +/-5% 470 +/-5% 470 +/-5%

A

FSBSEL0 FSBSEL1 FSBSEL2

14,15 14,15 14,15 Title

FOXCONN PCEGCK410 ClockGenSize Date: Document Number

EMI CAPS.5 4 3

915A01 DDR2Sheet1

Rev B of 52

Tuesday, May 18, 2004

7

2

5

4

3

2

1

5V_SB_SYS BC381 0.1uF 25V, X7R, +/-10% C0603 Dummy

PN3 AUX4 AUX1 AUX2 AUX3

PN2

PN1

PN4

MSENSE

*

VCCP R122 24.9K +/-1% R0603

D

*VRM_SYS

*

RT2

47K/NTC

1

2

*

*

3

T

Dummy

+/-1% R0603 R341 25.5K

LOAD_LINE_SELECT

R365 3.6K +/-1% BC3582 R0603 8.2nF Dummy C0603 Dummy

*

*

R3733 150K +/-1% R0603

*

BC358 8.2nF C0603 50V,X7R,+/-10%

*

R373 150K +/-1% R0603

*

BC349 8.2nF C0603 50V,X7R,+/-10%

*

R352 150K +/-1% R0603

*

BC350 8.2nF C0603 50V,X7R,+/-10%

*

R353 150K +/-1% R0603

1 1 +/-1% +/-1% R0603 R0603 Dummy

1 1 +/-1% +/-1% BC346 R0603 R0603 0.22uF 16V, Y5V, +80%/-20% C0603

*R0603 +/-1%

BC353 C0603 150pF

*

*

6

5

R371 20K +/-1% R0603 D

4

NONE

*

S

Pop only if 3 phase design is used R3656 U24 1 2 OS3 OS2 OS1 BGOUT ERROUT GNDSEN FB OS4 OUTSEN OUT4 OUT3 OUT2 OUT1 AGND 24 23 VRM_SENSE 22 21 20 19 18 17 16 15 14 13 R397 OUT4 OUT3 OUT2 OUT1

G Q45 2N7002 Dummy

R412

13

LL_ID0

12V_VRM

1.5K

R0603 Dummy OUT4 9 5 CN11 ATX12V_P1_2X2 L7 1 3

15K R0603 +/-5% Dummy

C

2

R406

VTT_PWRGD R391 BC367 +/-1% 15pF 20K C0603 R0603 BC365 1uF 16V,Y5V,+80%/-20% C0603

4 5 6 MSENSE VRM_SYS 7 8 9 R409 R0603 10 +/-5% 10 BC372 1uF C0603 11 12 16V,Y5V,+80%/-20%

OUT3 OUT2 OUT1

9 9 9

4

VRM_SYS

3

*

* *

BC160 0.1uF 25V, X7R, +/-10% C0603 VIN

DUMMY

*

*

BC373 470pF C0603 50V,NPO,+/-5%

12V_VRM

*

16V,+/-20% CE50D100H300

16V,+/-20% CE50D100H300

VID2 SC2646

VID1

49 49B

PVID0 PVID1 PVID2 PVID3 PVID4 PVID5

PVID0 PVID1 PVID2 PVID3 PVID4 PVID5

VTT_OUT_LEFT 5V_SB_SYSB

49 49 49 49

*

R396

0 VTT_PWRGD

VTT_PWRGD 14

*

R0603 +/-5% Dummy R395 C

R415 10K +/-5% R0603 R410 300 VTT_PWRGD R0603+/-5%

16V, +/-20% CE50D100H300

*

*

*

VRM_FB R283

0 +/-5% R0603

VCC_SENSE 13

2.74K R0603 +/-1%

B

*

R367 0 R0603 +/-5%

R411 22.1K +/-1% R0603

A

*

S

*

BC374 1uF 16V, Y5V, +80%/-20% C0603

E

Q46 MMBT3904 SOT23_BEC G

D

R284

0 +/-5% R0603

VSS_SENSE 13

*

5

*

*

*

*

20K +/-1% R0603 DUMMY

R392 +/-1% 20K R0603

*

*+/-5% 150K

OFFSET/MSENSE OSCREF VCC VID4 VID3 PGOOD VID5 VID0

R0603

R3657 0 R0603 +/-5% Pop only if 3 phase design is used VRM_SYS

Choke Coil 1.2uH EC14 EC9 EC7 EC2 1800uF 1800uF 1800uF 1800uF CE50D100H300 16V,+/-20%

*

*

Q47 2N7002

Title

Voltage Regulator Down 10.1Size Date:4 3 2

Document Number

Tuesday, May 18, 2004

*

R354 30 +/-1% R0603

*

*

R370 60.4K +/-1% R0603

BC344 1.5nF C0603 50V,X7R,+/-10% 0 +/-5% R0603 R385 +/-5%

R417 10K +/-5% R0603 Dummy

*

R2921 24.9K +/-1% R0603 Dummy

*

R292 24.9K +/-1% R0603

*

R109 24.9K +/-1% R0603

*

* R156 10K+/-1% R0603

* R148 10K+/-1% R0603

Dummy BC375 0.1uF 25V, X7R, +/-10% C0603 Dummy

* R155 * R1557 * R149 * R270

+/-1% R0603

R0603 Dummy

*

R416 10K +/-5% R0603 Dummy

*D

* R2739 10K * R273 10K +/-1%

R414 2.7K R0603 +/-5%

50V, NPO, +/-5%

Q49 MMDT3946 Dummy LOAD_LINE_SELECT

50V,X7R,+/-10%

*

*

BC380 0.1uF 25V, X7R, +/-10% C0603 Dummy

*

C

*

50V,NPO,+/-5%

* * *

BC133 4.7uF 16V,Y5V,+80%/-20% C1206

VTT_PWRGD 14

A

FOXCONN PCEG

915A01 DDR2Sheet1

Rev B of 52

8

5

4

3

2

1

VIN

5V_SB_SYS

D

D

D

D21

BC311

BC5111 C0603 1nF 50V,X7R,+/-10% Dummy

VIN

*BC5523 Q36 0.1uF C0603 25V, X7R, +/-10% NTD60N02R Dummy Dummy 10K R0603 +/-5% BC204 4.7uF 16V,Y5V,+80%/-20% C1206 PN1 P N1

*1 D33 B120BD

R303 1 +/-5% R0805 8 D34 B120B 1

*

1

2 1N4148W OUT1

Q37 G S G NTD60N02R S

Q29 G NTD60N02R

1uF C0805 25V,Y5V,+80%/-20% U20 SC1211

**

VCCP UNDER HEATSINK

OUT1

*

R29

S

*

BST

CO

TG

DRN

*

R287

2.2

+/-5% R0603

*

3

2

4

1

L18

EC43

2

2

AUX1 AUX1 D D 9 R293

PGND VREG VPN VIN BG

5

6

7

8

100 R0603 +/-5%

D

BC314 1nF C0603 50V,X7R,+/-10%

Q38 G S Q39 G NTD110N02R-1 Dummy

Q40 NTD110N02R-1 S

*

*

*

1211_VIN BC320 0.47uF 16V,Y5V,+80%/-20% C0603 Dummy BC322 1uF 16V,Y5V,+80%/-20% C0805

*

*

D

D

D6 1 2 1N4148W OUT2 3 4

BC130

*

Q9 G S G NTD60N02R S

Q10 G NTD60N02R

D

BC5112 C0603 1nF 50V,X7R,+/-10% Dummy

VIN

Q11

BC5524 0.1uF

*

8

OUT2

R30

S

1uF C0805 25V,Y5V,+80%/-20% U8 SC1211 R106

D

AUX2 D 9 AUX2 R107 +/-5% BC135 C0603 1nF D G S Q16 R40 BC109 2.2nF 16V,NPO,+/-5% BC596 C0603 0 G R0805 +/-5% 47nF C0603 25V, X7R, +/-10% Dummy G S Q21 NTD110N02R-1 Dummy

Q15 NTD110N02R-1

VREG

C

PGND VPN VIN BG

*

*

5

6

7

1211_VIN

8

100 R0603

*

*

50V,X7R,+/-10%

IND Coil 400nH CK165S135 +/-20% L302 IND Coil 280nH R111 EC28 560uF CK127S110 1 4V,+/-20% +/-20% +/-5% CE35D80H200 Dummy R0603

BST

CO

TG

DRN

*

*

2.2 +/-5% R0603

*

2

1

NTD60N02R C0603 25V, X7R, +/-10% 10K Dummy Dummy R0603 +/-5%

*

* *

BC108 4.7uF 16V,Y5V,+80%/-20% PN2 C1206 P N2

EC30

*

*

*

D

D

D

BC5113 C0603 1nF 50V,X7R,+/-10% Dummy D8 1 2 1N4148W OUT3 3 4 BC139

*

*

Q13 G S G NTD60N02R Dummy

Q12 NTD60N02R G 10K R0603 +/-5% S D

S

1uF C0805 25V,Y5V,+80%/-20% U10 SC1211 R112

*

8

OUT3

R31

BC5525 0.1uF C0603 NTD60N02R 25V, X7R, +/-10% Dummy

Q14

* *

16V,Y5V,+80%/-20% BC134 4.7uF PN3 C1206 P N3

*

VIN

2.2

BST

CO

TG

DRN

AUX3 AUX3 9 D G

Q17 BC149 C0603 1nF G S Q19 D Q20 NTD110N02R-1 S

PGND VREG VPN VIN BG

*

IND Coil 400nH CK165S135 L303 +/-20% IND Coil 280nH CK127S110 +/-20% Dummy

*

100 R0603

*

R118 +/-5%

*

50V,X7R,+/-10%

5

6

7

B

8

NTD110N02R-1 Dummy

R114 1 +/-5% R0603 BC145 2.2nF 16V,NPO,+/-5% C0603

*

+/-5% R0603

*

*

2

1

1211_VIN

*

D

D88 1 2 1N4148W Dummy 8 OUT4 OUT4 3 4

BC1599 Dummy

*

Q131 G S NTD60N02R Dummy R35 G 10K R0603 +/-5% S

D

1uF C0805 25V,Y5V,+80%/-20% U901 SC1211 Dummy 9

2.2

BST

CO

TG

DRN

R2682 Dummy +/-5% R0603 AUX4 AUX4

*

*

2

1

*

PGND VREG VPN VIN BG

R1181

*

5

6

7

8

100 R0603 Dummy R99

*

+/-5%

BC1492 C0603 1nF D G

D

A

1211_VIN BC1418 0.47uF 16V,Y5V,+80%/-20% C0603 Dummy BC1382 1uF 16V,Y5V,+80%/-20% C0805 Dummy

S

*

Dummy

*

*

BC1362 2.2nF BC593 16V,NPO,+/-5% C0603

S

NTD110N02R-1 Dummy

5

4

*

*

*

*

BC141 0.47uF 16V,Y5V,+80%/-20% C0603 Dummy

BC138 1uF 16V,Y5V,+80%/-20% C0805

C0603

BC5114 C0603 1nF 50V,X7R,+/-10% Dummy

*

*

BC136 2.2nF BC592 16V,NPO,+/-5%

NTD110N02R-1 S

VIN

Q121 BC5526 0.1uF C0603 NTD60N02R 25V, X7R, +/-10% Dummy Dummy

*

*

BC1342 4.7uF 16V,Y5V,+80%/-20% PN4 C1206 Dummy P N4 L304 IND Coil 280nH CK127S110 +/-20% Dummy

Q200 NTD110N02R-1 Dummy

*

50V,X7R,+/-10% Dummy 0 Dummy G R0805 +/-5% 47nF C0603 25V, X7R, +/-10% Dummy

Q199

*

R41

0 G R0805 +/-5% 47nF C0603 25V, X7R, +/-10% Dummy

*

*

*

BC124 0.47uF 16V,Y5V,+80%/-20% C0603 Dummy

BC119 1uF 16V,Y5V,+80%/-20% C0805

*

S

C2

*

NTD110N02R-1

*

*

R39 BC321 2.2nF 16V,NPO,+/-5% BC594 C0603

0 G R0805 +/-5% 47nF C0603 25V, X7R, +/-10% Dummy

*

4V,+/-20% 400nH andBC273 280nH choke co-lay CE35D80H200 2.2nF 16V,NPO,+/-5% C0603

NTD110N02R-1

S

EC26

*

IND Coil 400nH CK165S135 +/-20% L301 R263 IND Coil 280nH 1 CK127S110 +/-5% R0603 +/-20% Dummy

560uF 4V, +/-20% CE35D80H200 560uF 4V,+/-20% CE35D80H200 560uF

D

*

EC47

*

EC45

*

*

560uF 4V,+/-20% CE35D80H200

VCCP

EC31

560uF 4V,+/-20% CE35D80H200

*

BC194 68pF 50V,NPO,+/-5% C0603

*

BC193 68pF 50V, NPO, +/-5% C0603

*L8 BC146 2.2nF 16V,NPO,+/-5% C0603

560uF 4V,+/-20% CE35D80H200 820uF/1500uF co-layout

VCCP

EC29

560uF 4V,+/-20% CE35D80H200

*6.3V,+/-20%

EC37 820uF Dummy CE35D80H200

*6.3V,+/-20%

EC24 1500uF Dummy CE50D100H300

*6.3V,+/-20%

EC23 1500uF Dummy CE50D100H300

*6.3V,+/-20%

EC16 1500uF Dummy CE50D100H300

C

EC27

560uF 4V,+/-20% CE35D80H200

560uF 4V,+/-20% CE35D80H200 Dummy

*L9 R1143 1 +/-5% R0603 Dummy BC1854 2.2nF 16V,NPO,+/-5% C0603 Dummy

C1

560uF 4V,+/-20% CE35D80H200

De-pop if 4 phase design is used. --------------------------------Q37, Q29, Q39, Q9, Q11, Q15, Q12, Q14, Q20, Q121

B

*

A

*

FOXCONN PCEGTitle

Voltage Regulator Down 10.1Size Date:3 2

Document Number

915A01 DDR2Sheet1

Rev B of 52

Tuesday, May 18, 2004

9

5

4

3

2

1

5V_SYS 24,42 SLP_S45J

1

Only pop for SC2616R523 0

L26 Choke Coil 1.2uH ACPI_S3

L3 2 2

1 L4 FB L1806 60 Ohm Dummy

*Dummy D

R532 10K +/-5% R0603

*

12,24,34,42 SLP_S3J

R0603D

+/-5% 100 +/-5% R0603 G

*

2N7002 S

*

7,15,24,32,34 PWRGD_3V

R521

12V_SYS

S

Q55

R545 BC525 1uF 16V,Y5V,+80%/-20% C0805

4.7K +/-5% R0603 R5457 0 R0603 +/-5% R520 R530 2K +/-5% R0603 Dummy

G

VDDR_IN

*

5V_SYS 3D3V_SB

5V_SB_SYS

*

R522 10K +/-5% R0603

*

R571 10K +/-5% R0603

1

DDR_PN

D29

5V_SB_SYS

*

D

2 1N4148W Dummy

R568

*

24,42 SLP_S45J

0 +/-5% R0603 Dummy

10 VDDQEN VDDQCOMP BC524 0.1uF C0603 Dummy 18 17 12 3 2

S5# SS/EN COMP AGND THPAD LGND VTTSN NCP5201

SGND VDDQSBY VDDQIN FB VTTO VTTO1

13 DDR_PN R559 7 8 1 6 5 VDDQSBY

These two resistors are necessary. S3# and S5# must be tied to 5Vstb to prevent them floating.

* *25V, X7R, +/-10%

VDDQFB

*

BC520 0.22uF 16V, Y5V, +80%/-20% C0603

R570 30K +/-1% R0603 BC513 1nF 50V,X7R,+/-10% C0603

**

C

12,24,34,42 SLP_S3J

ACPI_S3

11

S3#

BG

14

R519

0 +/-5% R0603 R0603 Dummy 0 +/-5%

S

*

R572 10K +/-5% R0603

EC66 100uF BC511 16V, +/-20% 1.0uF CE20D50H110 C0603 16V,Y5V,+80%/-20%

*

Close to PIN9 of SC2616U33 16 4 12VCC 5VSBY 5VCC TG 9 15

*

R546

0 R0603 +/-5%

*

0.5'' from Controller

S

BC516 1uF 16V,Y5V,+80%/-20% C0805

*

BC598

*

19

*

*

BC508 0.1uF 25V, X7R, +/-10% C0603

Only pop for SC2616B

*

R560

0 +/-5% R0603 Dummy

Place less than 0.25" from Controller

R553 0 R0603 +/-5%

*

BC521 10nF 50V, X7R, +/-10% C0603 VDDQFB

Only pop for NCP5201VDDR_IN VDDR_IN 1D8V_STR 49 SUPERGPIO0 49 SUPERGPIO1 49 SUPERGPIO2

Only pop for NCP5201

* *

BC515 0.1uF 25V, X7R, +/-10% C0603 R538 16 +/-1% R0603 1D8V_STR

BC504 0.1uF C0603 25V, X7R, +/-10%

VDDQSBY

Trace to PIN7 must be able to carry 2A

Only BC507 pop for SC2616 BC510

A

R533

0 +/-5% R0603

Place close to PIN8 of SC2616

5

4

3

*

D

1" from controller

D

*

Dummy

*

0 R0805 +/-5% 0.1uF G C0603 Dummy 25V, X7R, +/-10%

G

Only pop for SC2616

*

BC509 4.7uF 6.3V,X5R,+/-10% C0805

*

R525 62K +/-1% R0603

*

*

4.7uF 10V, Y5V, +80%/-20% C0805 Dummy

*

*Q58 Q57 Q56

ACPI_S3

FB L1806 60 Ohm Dummy

*

NTD60N02R

EC61 100uF 16V, +/-20% CE20D50H110

*

EC62 100uF 16V, +/-20% CE20D50H110

*

BC501 1uF 16V,Y5V,+80%/-20% C0805

D

VDDR_IN VDDR_IN

*L27

NTD40N03R

BC512 1uF 16V,Y5V,+80%/-20% C0805

*

BC514 EC64 4.7uF 2200uF 16V, Y5V, +80%/-20% 6.3V, +/-20% C1206 CE50D100H300

*

1D8V_STR

EC68 16V, +/-20%

EC65 10V,+/-20%

Choke Coil 2.6uH EC67 3300uF NTD40N03R 6.3V, +/-20% CE50D100H300

* * * *470uF CE35D80H200 22uF ce20d50h110

BC517 4.7uF 6.3V,X5R,+/-10% C0805C

VTT_DDR

*

*

EC63 1500uF 6.3V, +/-20% CE35D80H200

*

EC56 470uF 16V, +/-20% CE35D80H200

R537 470 +/-1% R0603

*

R541 1.2K +/-1% R0603

*

R662 1.2K +/-1% R0603 Dummy

*

R663 1.2K +/-1% R0603 Dummy

*

R664 1.2K +/-1% R0603 Dummy

B

*

*

R536 0 R1206 +/-1% Dummy

Value should be tuned

1uF 10V, Y5V, +80%/-20% C0603 DummyA

*

FOXCONN PCEGTitle

DDR1 2.6V/1.3VSize Date:2

Document Number

915A01 DDR2Sheet1

Rev B of 52

Tuesday, May 18, 2004

10

5

4

3

2

1

12V_SYS BC218 0.1uF 25V, X7R, +/-10% C0603

3D3V_SYS

3D3V_SB

*

*12V_SYS D

*D

R200 62 +/-1% R0603 R199 2.2V

EC25 220uF 10V, +/-20% CE25D60H110

*

BC192 0.1uF 25V, X7R, +/-10% C0603

placed near the LM358M pin 8D

8

U14A 1 LM358M SOP8JA G

C

*

2.5V

Q25 IPD09N03LA S

3 BC207 0.1uF 25V, X7R, +/-10% C0603 2

+ 4

*

BC196 22uF C1206 10V,Y5V,+80%/-20%

D14 R

A

*

R207 402 +/-1% R0603

*3D3V_SB

BC212 0.1uF 25V, X7R, +/-10% C0603 12V_SYS

*

121 R0603 +/-1% LM431ACM3

*

R193

1K +/-5% R0603

*

BC205 2.2uF 16V,Y5V,+80%/-20% C0805

8

*C

R229 499 +/-1% R0603 C B Q34 MMBT2222A E

U14B 7 LM358M SOP8JA G R227 1K +/-5% R0603

D Q27C

1.2V

5 6

+ 4

IPD09N03LA S

FSB_VTT

1D5V_CORE

*

R230

E

1K B +/-5% R0603

Q7 MMBT2222A

*

*

*

C

R210 487 +/-1% R0603

BC216 0.1uF 25V, X7R, +/-10% C0603

*5V_SYS L31 Choke COIL 1uH +/-20%

EC38 1000uF 6.3V, +/-20% CE35D80H200

*

BC228 4.7uF C0805 10V, Y5V, +80%/-20%

*

BC248 0.1uF C0603 25V, X7R, +/-10%

*

BC229 33pF 50V,NPO,+/-5% C0603

5V_SYSB

*

2

R288 0 +/-5% R0603

1

D20 SD103AW

*

R279 5.62K +/-1% R0603

*

BC308 1uF 16V, Y5V, +80%/-20% C0603

*

BC302 0.1uF 25V, X7R, +/-10% C0603 R282

D

G S

1D5V_FB

8 7 6 5

PHASE BOOT OCSET UGATE FB GND VCC LGATE RT9202 SOP8JA

1 2 3 4

L20

*

U18

0 +/-5% R0603

*

D

A

G S

5

4

* *EC46 1000uF 6.3V, +/-20% CE35D80H200

*

EC73 1000uF 6.3V, +/-20% CE35D80H200 Dummy

*

BC303 0.1uF 25V, X7R, +/-10% C0603

*

BC313 4.7uF 16V,Y5V,+80%/-20% C0805

B

Q41 NTD60N02R

1D5V_CORE

Choke Coil 5uH CK80D160 EC74 1800uF 6.3V, +/-20% CE50D100H300 Dummy

Value should be tuned

* *

EC49 EC53 1000uF 1000uF 6.3V, +/-20% 6.3V, +/-20% CE35D80H200 CE35D80H200

*

*

R285 105 BC326 +/-1% 4.7uF R0603 16V,Y5V,+80%/-20% C0805 1D5V_FB

* *

* *

BC305 10nF 50V,X7R,+/-10% C0603A

Q42 NTD80N02

R281 118 +/-1% R0603

R665 118 +/-1% R0603 Dummy

*

R666 118 +/-1% R0603 Dummy

FOXCONN PCEGTitle

49 SUPERGPIO4 49 SUPERGPIO3

SUPERGPIO4 SUPERGPIO3

Power 1.5V 1.2VSize Date: Document Number

915A01 DDR2Sheet1

Rev B of 52

Tuesday, May 18, 2004

11

3

2

5

4

3

2

1

SLP_S3J 1D5V_CORE 1 2 BAT54CD

10,24,34,42 3D3V_SYS

D16

2D5V_MCH 3

3D3V_SB

E

C Q32 MMBT2222A Dummy

B

R231 R235 100 10K +/-5% R0603 R0603 +/-5% Dummy Dummy 6 5 4

*

BC201 4.7uF 16V,Y5V,+80%/-20% C1206

*

*0.1uF

BC199 C0603 1 25V, X7R, +/-10% 3 U13 VIN GND SHDN MIC5205-2.5BM5 VOUT BYPASS/ADJ 5

2D5V_MCHD

Changed from 3904 to 2222 by Goldstar 9/15/2003

10,24,34,42 SLP_S3J

*

R241

3.3K +/-5% R0603 Dummy

*

BC224 1uF C0603 10V,Y5V,+80%/-20% Dummy

*

BC210 0.1uF 25V, X7R, +/-10% C0603 Dummy Add

by Goldstar 9/15/2003

3D3V_SB

C

*

R211 47K +/-5% R0603 Dummy

*

R202 10K +/-5% R0603 Dummy

16V,Y5V,+80%/-20%

Q35 MMDT5551 Dummy 1 2 3

*

R321 100 +/-5% R0603

2

6

5

4

1

2

1D5V_CORE

*

R226

10K +/-5% R0603 Dummy

*

BC215 1uF 10V,Y5V,+80%/-20% C0603 Dummy

3

3 2B

8

5V_SYS

*

BC177 0.1uF 25V, X7R, +/-10% C0603 Dummy placed near the LM393 pin 8

4

5V_SYS

*

5 6

+ 4

*

U11B LM393 Dummy 7

A

5

*

*

T

BC181 0.1uF 25V, X7R, +/-10% C0603 Dummy

*

RT1 6.8K +/-1% R0603 Dummy

*

R177 499 +/-1% R0603 Dummy

R176

7.5K R0603 +/-1% Dummy

E

VR Thermal Monitor Circuit

4

*

R145

130 R0603 +/-1% Dummy

C

R157 1K +/-1% R0603 Dummy

8

*

2.5V/100mA 4

3D3V_SYS

*

BC267 BC209 0.1uF 4.7uF 25V, X7R, +/-10% C1206 C0603

*

C

Q30 MMDT5551 Dummy

5V_SYS

+ -

U11A LM393 Dummy 1B

PROCHOTJ

13

*

R173 1K +/-1% R0603 Dummy

R144 680 +/-1% R0603 Dummy B

Q22 MMBT3904 Dummy

A

FOXCONN PCEGTitle

2.5V_MCHSize Date:3 2

Document Number

915A01 DDR2Sheet1

Rev B of 52

Tuesday, May 18, 2004

12

5

4

3

2

1

HDJ[63..0]

HDJ[63..0]

15

15

HAJ[31..3]

HAJ[31..3]

U16B HD J0 HD J1 HD J2 HD J3 HD J4 HD J5 HD J6 HD J7 HD J8 HD J9 HDJ10 HDJ11 HDJ12 HDJ13 HDJ14 HDJ15 15 15 15 HDBIJ0 HDSTBNJ0 HDSTBPJ0 HDJ16 HDJ17 HDJ18 HDJ19 HDJ20 HDJ21 HDJ22 HDJ23 HDJ24 HDJ25 HDJ26 HDJ27 HDJ28 HDJ29 HDJ30 HDJ31 15 15 15 HDBIJ1 HDSTBNJ1 HDSTBPJ1 B4 C5 A4 C6 A5 B6 B7 A7 A10 A11 B10 C11 D8 B12 C12 D11 HDBIJ0 A8 C8 B9 G9 F8 F9 E9 D7 E10 D10 F11 F12 D13 E13 G13 F14 G14 F15 G15 HDBIJ1 G11 G12 E12 D00# D01# D02# D03# D04# D05# D06# D07# D08# D09# D10# D11# D12# D13# D14# D15# DBI0# DSTBN0# DSTBP0# D16# D17# D18# D19# D20# D21# D22# D23# D24# D25# D26# D27# D28# D29# D30# D31# DBI1# DSTBN1# DSTBP1#

2 OF 7 G16 E15 E16 G18 G17 F17 F18 E18 E19 F20 E21 F21 G21 E22 D22 G22 D19 G20 G19 D20 D17 A14 C15 C14 B15 C18 B16 A17 B18 C21 B21 B19 A19 A22 B22 C20 A16 C17 HDJ32 HDJ33 HDJ34 HDJ35 HDJ36 HDJ37 HDJ38 HDJ39 HDJ40 HDJ41 HDJ42 HDJ43 HDJ44 HDJ45 HDJ46 HDJ47 HDBIJ2 HAJ3 HAJ4 HAJ5 HAJ6 HAJ7 HAJ8 HAJ9 HAJ10 HAJ11 HAJ12 HAJ13 HAJ14 HAJ15 HAJ16 15 HREQJ[4..0] HDBIJ2 HDSTBNJ2 HDSTBPJ2 15 15 15 HREQJ0 HREQJ1 HREQJ2 HREQJ3 HREQJ4 15 15 HADSTBJ0 HPCREQJ HAJ17 HAJ18 HAJ19 HAJ20 HAJ21 HAJ22 HAJ23 HAJ24 HAJ25 HAJ26 HAJ27 HAJ28 HAJ29 HAJ30 HAJ31 1TP_LAG775_PIN_AH4 1TP_LAG775_PIN_AH5 1TP_LAG775_PIN_AJ5 1TP_LAG775_PIN_AJ6 L5 P6 M5 L4 M4 R4 T5 U6 T4 U5 U4 V5 V4 W5 N4 P5 K4 J5 M6 K6 J6 R6 G5 AB6 W6 Y6 Y4 AA4 AD6 AA5 AB5 AC5 AB4 AF5 AF4 AG6 AG4 AG5 AH4 AH5 AJ5 AJ6 AC4 AE4 AD5

U16A A03# ADS# A04# BNR# A05# HIT# A06# RSP# A07# BPRI# A08# DBSY# A09# DRDY# A10# HITM# A11# IERR# A12# INIT# A13# LOCK# A14# TRDY# A15# BINIT# A16# DEFER# RSVD1 EDRDY# RSVD2 MCERR# REQ0# REQ1# AP0# REQ2# AP1# REQ3# REQ4# BR0# ADSTB0# TESTHI08 PCREQ# TESTHI09 TESTHI10 A17# A18# DP0# A19# DP1# A20# DP2# A21# DP3# A22# A23# GTLREF A24# A25# RESET# A26# A27# RS0# A28# RS1# A29# RS2# A30# A31# A32# A33# 1 A34# 2 A35# 3 RSVD3 4 RSVD4 ADSTB1# D2 C2 D4 H4 G8 B2 C1 E4 AB2 P3 C3 E3 AD3 G7 F2 AB3 U2 U3 F3 G3 G4 H5 J16 H15 H16 J17 H1 G23 B3 F5 A3 HADSJ HBNRJ HITJ TP15 HBPRIJ HDBSYJ HDRDYJ HITMJ INITJ HLOCKJ HTRDYJ 15 15 15 15 15 15 15 24 15 15 VIN

D

D32# D33# D34# D35# D36# D37# D38# D39# D40# D41# D42# D43# D44# D45# D46# D47# DBI2# DSTBN2# DSTBP2# D48# D49# D50# D51# D52# D53# D54# D55# D56# D57# D58# D59# D60# D61# D62# D63# DBI3# DSTBN3# DSTBP3#

TP_RSPJ

VCCP

1

HIE RRJ

*

TP_MCERRJ 1 TP_APJ0 TP_APJ1 HBR0J TESTHI_8 TESTHI_9 TESTHI_10 TP_DPJ0 TP_DPJ1 TP_DPJ2 TP_DPJ3 HGTLREF 1 1 1 1 1 1

TP7 HDEFERJ 15 HEDRDYJ 15 TP16 TP6 TP10 HBR0J 15 G

D

TP_BINITJ

R228 10K +/-5% R0603 Dummy

*

R248 619 +/-1% R0603 Dummy Q8 2N7002 Dummy

D

1

C

HDJ48 HDJ49 HDJ50 HDJ51 HDJ52 HDJ53 HDJ54 HDJ55 HDJ56 HDJ57 HDJ58 HDJ59 HDJ60 HDJ61 HDJ62 HDJ63 HDBIJ3

15

HAJ[31..3]

HAJ[31..3]

S

MCH_GTLREF 3D3V_SYS

TP31 TP29 TP30 TP28

*15 15 15 15 D

HCPURSTJ HRSJ0 HRSJ1 HRSJ2

R289 249 +/-1% R0603 Dummy Q31

*

HDBIJ3 HDSTBNJ3 HDSTBPJ3

15 15 15

TBDPin CRB Pin CRB D23 0.7: test point TP_VCCPLL AM5 0.7: test point TP_VID6

TP17 TP12 TP9 TP1

R588 110 +/-1% R0603 Dummy

C

CPU Prescott_Socket_LGA775_Rev1.0

TBDPin AL2 PROCHOT# CRB 0.7: pull up to VTT_OUT_RIGHT DG/611A: example VR thermal monitor circuit

1 2 3 4

14

GTLREF_SEL

G S TESTHI_0

TBD

HBR0J CRB 0.7: 220 ohm, 5% DG 0.51: 62 ohm, 5%

2N7002 Dummy

15

HADSTBJ1

FSB_VTT R209 R223 62 R0603 +/-5% 62 R0603 +/-5% TESTHI_0 TESTHI_2_7

24 24 24 24 24 24 24B

SMIJ A20MJ FERRJ INTR NMI IGNNEJ STPCLKJ HVCCA HVSSA TP33 HVCCIOPLL VID0 VID1 VID2 VID3 VID4 VID5 TP4 VID0 VID1 VID2 VID3 VID4 VID5 TP_VID6

P2 K3 R3 K1 L1 N2 M3 A23 B23 D23 C23 AM2 AL5 AM3 AL6 AK4 AL4 AM5 F28 G28 SKTOCCJ AE8 AL1 AK1 1 1 TP_VCCSENSE TP_VSSSENSE AN3 AN4 AN5 AN6

SMI# A20M# FERR#/PBE# LINT0 LINT1 IGNNE# STPCLK# VCCA VSSA RSVD5 VCCIOPLL VID0 VID1 VID2 VID3 VID4 VID5 VID6 BCLK0 BCLK1 SKTOCC# THERMDA THERMDC

1

TP_VCCPLL

14 42,49 42,49 42,49 42,49 42,49 42,49

*24 24 12 24

SLP# RSVD12 PWRGOOD PROCHOT# THERMTRIP# COMP0 COMP1 COMP2 COMP3 RSVD13 RSVD14 RSVD15 RSVD16 RSVD17 RSVD18

L2 AH2 N1 AL2 M2 A13 T1 G2 R1 N5 AE6 C9 G10 D16 A20 E23 E24 F23 H2 J2 J3 Y1 V2 AA2 HCOMP0 HCOMP1 HCOMP2 HCOMP3

CPUSLPJ CPU_PWRG PROCHOTJ THERMTRIPJ

R326 100 +/-1% R0603

*

BC341 1.0uF 10V,Y5V,+80%/-20% C0603

*

BC340 220pF 50V, X7R, +/-20% C0603

*

14 14

TESTHI_2_7 RSVD_AK6 RSVD_G6

R315

0 R0603 +/-5%

HGTLREF

******** * *

TESTHI00 TESTHI01 TESTHI11 TESTHI12 TESTHI02 TESTHI03 TESTHI04 TESTHI05 TESTHI06 TESTHI07 RSVD10 RSVD11

F26 W3 P1 W2 F25 G25 G27 G26 G24 F24 AK6 G6

TESTHI_0 TESTHI_1 TESTHI_11 TESTHI_12

VTT_OUT_RIGHT

TBDPin AK6, G6 refer to CRB 0.7

*

R325 49.9 +/-1% R0603

GTLREF voltage 12 mils width, divider should caps should be

should be 0.67*FSB_VTT 15 mils spacing be within 1.5" of the GTLREF pin placed near CPU pin

VTT_OUT_LEFT Place at CPU end of route 62 R0603 HBR0J +/-5% Place at CPU end of route R328 100 +/-5% R0603 CPU_PWRG R310 R317 R313 R311 TESTHI_1 62 R0603 +/-5% TESTHI_8 62 R0603 +/-5% TESTHI_9 62 R0603 +/-5% TESTHI_10 62 R0603 +/-5% TESTHI_11 62 R0603 +/-5% TESTHI_12 62 R0603 +/-5% RSVD_G6 62 R0603 +/-5% Dummy HCPURSTJ 62 R0603 +/-5%

**

U16C

3 OF 7

1 OF 7 CPU Prescott_Socket_LGA775_Rev1.0

*

R590 62 +/-1% R0603 Dummy

B

VTT_OUT_RIGHT

Place at CPU end of route

R316 R329 R318 R314

1

7 CK_200M_P_CPU 7 CK_200M_N_CPU 34,49 43 43 SKTOCCJ THERMDA THERMDC TP3 TP2 8 8 VCC_SENSE VSS_SENSE

* * *

R340 R319

62 R0603 +/-5% 1K R0603 +/-5% Dummy 62 R0603 +/-5% Dummy

HIE RRJ CPU_BOOT RSVD_AK6

TBDPin N5 ~ Pin J3 CRB 0.7: connections ok?

R332

R357

*

BC342 22pF 50V,NPO,+/-5% C0603

**

A

VCCSENSE VSSSENSE RSVD19 VCC_MB_REG RSVD20 VSS_MB_REG RSVD21 Changed pin name GTLREF1 COMP4 from RSV F29 RSVD9 RSVD24 BOOTSELECT LL_ID0 LL_ID1

TP_RSVD_CPU_N5 TP_RSVD_CPU_AE6 TP_RSVD_CPU_C9 TP_RSVD_CPU_G10 TP_RSVD_CPU_D16 TP_RSVD_CPU_A20 CPU_BOOT LL_ID0 TP_LL_ID1

1 1 1 1 1 1

TP35 TP34 TP32 TP13 TP14 TP11

VTT_OUT_LEFT R312 R330 HCOMP0 10 mils width 7 mils spacing 100 R0603 +/-1% 100 R0603 +/-1% HCOMP2 HCOMP3 60.4 R0603 +/-1% 60.4 R0603 +/-1% Title

A

1

LL_ID0 TP8

8

HCOMP1

R331

**

R268

FOXCONN PCEGCPU-HOSTSize Date: Document Number

CPU Prescott_Socket_LGA775_Rev1.05 4 3

10 mils width 7 mils spacing2

915A01 DDR2Sheet1

Rev B of 52

Tuesday, May 18, 2004

13

5

4

3

2

1

FSB_VTT U16D HTCK HTDI HTDO HTMS HTRSTJ HBPM0J HBPM1J HBPM2J HBPM3J HBPM4J HBPM5J HTCK HTDI HTDO HTMS HTRSTJ HBPM0J HBPM1J HBPM2J HBPM3J HBPM4J HBPM5J AE1 AD1 AF1 AC1 AG1 AJ2 AJ1 AD2 AG2 AF2 AG3 TCK TDI TDO TMS TRST# 4 OF 7 A29 B25 B29 B30 C29 A26 B27 C28 A25 A28 A27 C30 A30 C25 C26 C27 B26 D27 D28 D25 D26 B28 D29 D30 AM6 AA1 J1 F27

VCCP U16E AG22 K29 AM26 AL8 AE12 AE11 W23 W24 W25 T25 Y28 AL18 AC25 W30 Y30 AN14 AD28 Y26 AC29 M29 U24 J23 AC27 AM18 AM19 AB8 AC26 J8 J28 T30 AM9 AF15 AC8 AE14 N23 W29 U29 AC24 AC23 Y23 AN26 AN25 AN11 AN18 Y27 Y25 AD24 AE23 AE22 AN19 V8 K8 AE21 AM30 AE19 AC30 AE15 M30 K27 M24 AN21 T8 AC28 N25 AE18 W26 AD25 M8 N30 AD26 AJ26 AM29 M25 M26 L8 U25 Y8 AJ12 AD27 U23 M23 AG29 N27 AM22 U28 K28 U8 AK18 AD8 K24 AH28 AH21 VCCP1 VCCP2 VCCP3 VCCP4 VCCP5 VCCP6 VCCP7 VCCP8 VCCP9 VCCP10 VCCP11 VCCP12 VCCP13 VCCP14 VCCP15 VCCP16 VCCP17 VCCP18 VCCP19 VCCP20 VCCP21 VCCP22 VCCP23 VCCP24 VCCP25 VCCP26 VCCP27 VCCP28 VCCP29 VCCP30 VCCP31 VCCP32 VCCP33 VCCP34 VCCP35 VCCP36 VCCP37 VCCP38 VCCP39 VCCP40 VCCP41 VCCP42 VCCP43 VCCP44 VCCP45 VCCP46 VCCP47 VCCP48 VCCP49 VCCP50 VCCP51 VCCP52 VCCP53 VCCP54 VCCP55 VCCP56 VCCP57 VCCP58 VCCP59 VCCP60 VCCP61 VCCP62 VCCP63 VCCP64 VCCP65 VCCP66 VCCP67 VCCP68 VCCP69 VCCP70 VCCP71 VCCP72 VCCP73 VCCP74 VCCP75 VCCP76 VCCP77 VCCP78 VCCP79 VCCP80 VCCP81 VCCP82 VCCP83 VCCP84 VCCP85 VCCP86 VCCP87 VCCP88 VCCP89 VCCP90 VCCP91 VCCP92 5 OF 7 VCCP93 VCCP94 VCCP95 VCCP96 VCCP97 VCCP98 VCCP99 VCCP100 VCCP101 VCCP102 VCCP103 VCCP104 VCCP105 VCCP106 VCCP107 VCCP108 VCCP109 VCCP110 VCCP111 VCCP112 VCCP113 VCCP114 VCCP115 VCCP116 VCCP117 VCCP118 VCCP119 VCCP120 VCCP121 VCCP122 VCCP123 VCCP124 VCCP125 VCCP126 VCCP127 VCCP128 VCCP129 VCCP130 VCCP131 VCCP132 VCCP133 VCCP134 VCCP135 VCCP136 VCCP137 VCCP138 VCCP139 VCCP140 VCCP141 VCCP142 VCCP143 VCCP144 VCCP145 VCCP146 VCCP147 VCCP148 VCCP149 VCCP150 VCCP151 VCCP152 VCCP153 VCCP154 VCCP155 VCCP156 VCCP157 VCCP158 VCCP159 VCCP160 VCCP161 VCCP162 VCCP163 VCCP164 VCCP165 VCCP166 VCCP167 VCCP168 VCCP169 VCCP170 VCCP171 VCCP172 VCCP173 VCCP174 VCCP175 VCCP176 VCCP177 VCCP178 VCCP179 VCCP180 VCCP181 VCCP182 VCCP183 VCCP184 AK12 AH22 T29 AM14 AM25 AE9 Y29 AK25 AK19 AG15 J22 T24 AG21 AM21 J25 U30 AL21 AG25 AJ18 J19 AH30 J15 AG12 AJ22 J20 AH18 AH26 W27 AL25 AN8 AH14 U27 T23 R8 AK22 AN29 AG11 AK26 J10 AJ15 AG26 AN9 AH15 AF18 AL15 J26 J18 J21 AG27 AK15 AF11 AD23 AM15 AF8 AK21 AG30 AJ21 AM11 AL11 AJ11 K30 AL14 AN30 AH25 AL12 AJ9 AK11 AG14 N29 AL30 AJ25 AH9 J29 J11 K25 P8 K23 AL19 AM8 T26 N28 AH12 AL22 AN15 AJ8 U26 AJ19 T27 AK8 AN12 AG9 N26

VCCP

VCCP 6 OF 7 VCCP185 VSS41 AL23 VCCP186 VSS42 A12 VCCP187 VSS43 L25 VCCP188 VSS44 J7 VCCP189 VSS45 AE28 VCCP190 VSS46 AE29 VCCP191 VSS47 K5 VCCP192 VSS48 J4 VCCP193 VSS49 AE30 VCCP194 VSS50 AN20 VCCP195 VSS51 AF10 VCCP196 VSS52 AE24 VCCP197 VSS53 AM24 VCCP198 VSS54 AN23 VCCP199 VSS55 H9 VCCP200 VSS56 H8 VCCP201 VSS57 H13 VCCP202 VSS58 AC6 VCCP203 VSS59 AC7 VCCP204 VSS60 AH6 VCCP205 VSS61 C16 VCCP206 VSS62 AM16 VCCP207 VSS63 AE25 VCCP208 VSS64 AE27 VCCP209 VSS65 AJ28 VCCP210 VSS66 AJ7 VCCP211 VSS67 F19 VCCP212 VSS68 AH13 VCCP213 VSS69 AD7 VCCP214 VSS70 AH16 VCCP215 VSS71 AK17 VCCP216 VSS72 E17 VCCP217 VSS73 AH17 VCCP218 VSS74 AH20 VCCP219 VSS75 AE5 VCCP220 VSS76 AH23 VCCP221 VSS77 AE7 VCCP222 VSS78 AM13 VCCP223 VSS79 AH24 VCCP224 VSS80 AJ30 VCCP225 VSS81 AJ10 VCCP226 VSS82 AF3 VSS83 AK5 VSS84 AJ16 VSS1 VSS85 AF6 VSS2 VSS86 AK29 VID7 VSS87 AJ17 VSS4 VSS88 F22 VSS5 VSS89 AH3 VSS6 VSS90 AK10 VSS7 VSS91 AM10 VSS8 VSS92 F16 VSS9 VSS93 AJ23 VSS10 VSS94 F13 VSS11 VSS95 AG7 VSS12 VSS96 F10 VSS13 VSS97 L26 VSS14 VSS98 AD4 VSS15 VSS99 H11 VSS16 VSS100 L24 VSS17 VSS101 L23 VSS18 VSS102 AM23 VSS19 VSS103 A15 VSS20 VSS104 AH10 VSS21 GTLREF_SEL H29 VSS22 VSS106 B24 VSS23 VSS107 L3 VSS24 VSS108 H27 VSS25 VSS109 A21 VSS26 VSS110 AE2 VSS27 VSS111 AJ29 VSS28 VSS112 A24 VSS29 VSS113 AK27 VSS30 VSS114 AK28 VSS31 VSS115 B20 VSS32 VSS116 AM20 VSS33 VSS117 H26 VSS34 VSS118 B17 VSS35 VSS119 H25 VSS36 VSS120 H24 VSS37 VSS121 AA3 VSS38 VSS122 AA7 VSS39 VSS123 H23 VSS40 VSS124 AA6 VSS125 H10 U16F H22 H21 H20 H19 H18 AB7 H17 AJ24 AM17 AC3 H14 P28 V6 AK2 P27 P26 AM28 AJ13 W4 P25 AJ20 W7 P23 AG13 AG16 AG17 C7 Y2 L30 L29 D15 AL27 Y7 L27 AA29 N6 N7 AA28 AN13 AA27 AA26 P4 AA25 AA24 P7 E26 V30 R2 V29 V28 R5 V27 R7 E20 AN10 V25 T3 V24 V23 T6 AL7 E25 U1 R29 R28 R27 R26 R25 U7 R24 R23 P30 V3 P29 AF16 AE10 AF13 H6 A18 A2 E2 D9 C4 A6 D6

U16G VSS126 VSS127 VSS128 VSS129 VSS130 VSS131 VSS132 VSS133 VSS134 VSS135 VSS136 VSS137 VSS138 VSS139 VSS140 VSS141 VSS142 VSS143 VSS144 VSS145 VSS146 VSS147 VSS148 VSS149 VSS150 VSS151 VSS152 VSS153 VSS154 VSS155 VSS156 VSS157 VSS158 VSS159 VSS160 VSS161 VSS162 VSS163 VSS164 VSS165 VSS166 VSS167 VSS168 VSS169 VSS170 VSS171 VSS172 VSS173 VSS174 VSS175 VSS176 VSS177 VSS178 VSS179 VSS180 VSS181 VSS182 VSS183 VSS184 VSS185 VSS186 VSS187 VSS188 VSS189 VSS190 VSS191 VSS192 VSS193 VSS194 VSS195 VSS196 VSS197 VSS198 VSS199 VSS200 VSS201 VSS202 VSS203 VSS204 VSS205 VSS206 VSS207 VSS208 VSS209 VSS210

7 OF 7 VSS211 VSS212 VSS213 VSS214 VSS215 VSS216 VSS217 VSS218 VSS219 VSS220 VSS221 VSS222 VSS223 VSS224 VSS225 VSS226 VSS227 VSS228 VSS229 VSS230 VSS231 VSS232 VSS233 VSS234 VSS235 VSS236 VSS237 VSS238 VSS239 VSS240 VSS241 VSS242 VSS243 VSS244 VSS245 VSS246 VSS247 VSS248 VSS249 VSS250 VSS251 VSS252 VSS253 VSS254 VSS255 VSS256 VSS257 VSS258 VSS259 VSS260 VSS261 VID_SELECT VSS263 VSS264 VSS265 VSS266 VSS267 VSS268 VSS269 VSS270 VSS271 VSS272 VSS273 VSS274 VSS275 VSS276 D5 A9 D3 B1 B5 B8 AJ4 AE26 AH1 E29 V7 C13 AK24 AB30 L6 L7 AB29 M1 AB28 E8 AG20 AN17 AB27 AB26 AN16 M7 AB25 AB24 AB23 N3 AA30 F4 AG10 AE13 AF30 H28 F7 AF29 AF28 G1 AF27 AF26 AF25 AN28 AN27 AF24 AF23 AG24 AF17 AN24 H3 AN7 P24 AE20 AE17 E27 T7 R30 AJ27 AB1 AM4 V26 AA23 AL28 AF20 AG23

D

7,24,35,49 ICH_SYS_RSTJ

ICH_SYS_RSTJ AC2 AK3 AJ3

7,15 7,15 7,15

FSBSEL0 FSBSEL1 FSBSEL2

FSBSEL0 FSBSEL1 FSBSEL2

G29 H30 G30

VTT1 VTT2 VTT3 VTT4 VTT5 VTT6 VTT7 BPM0# VTT8 BPM1# VTT9 BPM2# VTT10 BPM3# VTT11 BPM4# VTT12 BPM5# VTT13 VTT14 DBR# VTT15 VTT16 ITPCLKOUT0 VTT17 ITPCLKOUT1 VTT18 VTT19 BSEL0 VTT20 BSEL1 VTT21 BSEL2 VTT22 VTT23 VTT24 VTTPWRGD VTT_OUT1 VTT_OUT2 VTT_SEL

VTT_OUT_RIGHT

*

R320 0 +/-5% R0603 Dummy

VTT_PWRGD 8 VTT_OUT_RIGHT VTT_OUT_LEFT R203 VTT_OUT_RIGHT VTT_OUT_LEFT 3D3V_SYS

1K R0603 Dummy +/-5%

VTT_OUT_RIGHT

CPU Prescott_Socket_LGA775_Rev1.0

Place BPM termination near CPUC

******

R336 R363 R334 R359 R338 R337

49.9 +/-1% 49.9 +/-1% 49.9 +/-1% 49.9 +/-1% 49.9 +/-1% 49.9 +/-1%

HBPM5J HBPM4J HBPM3J HBPM2J HBPM1J HBPM0J

HBPM5J HBPM4J HBPM3J HBPM2J HBPM1J HBPM0J

VTT_OUT_RIGHT

AF9 AF22 AH11 AJ14 AH19 AH29 AH27 AG28 AL26 AM12 J24 J13 T28 W28 J12 J27 AG19 AL9 AD30 AF21 Y24 AK14 J9 M27 AF14 J30 AG18 AA8 AG8 AL29 AD29 W8 AH8 N24 AN22 J14 K26 AF19 N8 AF12 M28 AK9 C10 D12 AM7 C24 K2 C22 AN1 B14 K7 AE16 B11 AL10 AK23 H12 AF7 AK7 H7 E14 L28 Y5 E11 AL16 AL24 AK13 AL3 D21 AL20 D18 AN2 AK16 AK20 AM27 AM1 AL13 AL17 C19 E28 AH7 AK30 D24

D

*

C

*

R335 49.9 +/-1% R0603

*

R361 49.9 +/-1% R0603

*

R358 49.9 +/-1% R0603

*

R360 49.9 +/-1% R0603

*

R362 49.9 +/-1% R0603 HTDO HTDI HTMS HTCK

*

BC348 0.1uF 25V, X7R, +/-10% C0603

*

BC347 0.1uF 25V, X7R, +/-10% C0603

place TDO termination near XDP connector

place TCK/TDI/TMS terminations near CPU within 1.5 inch place TRSTJ termination anywhere on routeB

HTRSTJ

FSB_VTT PLL Supply Filter 1 125mA L11 L0805 10uH +/-10% 0805 +/-10% 13 HVCCIOPLL 1 125mA L10 L0805 10uH +/-10% 0805 +/-10% Notes: 1. Cap. should be within 600 mils of the VCCA and VSSA pins 2. VCCA route should be parallel and next to VSSA route 3. Min. 12 mils trace from the filter to the processor pins 4. The inductors should be close to the cap. EC34 33uF 35V, +/-20% CE20D50H110 ESL