flip-chip market and technology trends - … · flip-chip market and technology trends ......

19
© 2013 FLIP-CHIP Market and Technology Trends 2013 Business Update Flip Chip platform is still in mutation and provides continuously innovative fine pitch bumping solutions to serve the most advanced packaging technologies like 3DIC and 2.5D Interposer !

Upload: vanphuc

Post on 12-Apr-2018

228 views

Category:

Documents


6 download

TRANSCRIPT

© 2013

FLIP-CHIP Market and

Technology Trends

2013 Business Update

Flip Chip platform is still in mutation and provides continuously innovative fine pitch bumping

solutions to serve the most advanced packaging technologies like 3DIC and 2.5D Interposer !

© 2013 • 2

Copyrights © Yole Développement SA. All rights reserved.

Table of contents (1/3)

• Table of contents …………………………………………………………

• Glossary ……………………………………………………………………

• Report Scope …………………………………………………………….. – What’s new ?

– Report technology scope

– Report objectives

– Companies cited in the report

• Executive summary ……………………………………………………... – General conclusions

– Flip-Chip market in 2012

– Flip-Chip market in 2018

• Recent key press headlines ……………………………………………

• Flip-Chip market forecast – Methodology

– Flip-Chip Activity – Wafer forecast

By metallurgy type

By area and end products

– Flip-Chip Activity – Unit forecast

2

5

6 7

10

15

17

18 19

21

22

64

68 69

72

72

80

91

© 2013 • 3

Copyrights © Yole Développement SA. All rights reserved.

• Flip-Chip installed capacities …………………………………………. – Methodology

– 2012 installed capacities

– Recent activity and investments for FC

– Focus on PTI’s recent investment

– Matching 2012 top down and bottom up

– Summary

• Flip-Chip market value ………………………………………………….. – Flip-Chip Market Value Forecast

– 2012 total Flip-Chip Market Value by COO segment

– 2012 total Flip-Chip Market Value by end use type

– 2012 Flip-Chip in package Market Value by COO segment

– 2018 total Flip-Chip Market Value by COO segment (forecast)

• Infrastructure & supply chain …………………………………………. – Transforming golbal IC Packaging Supply Chain*

– Flip-Chip Supply Chain

– Typical Flip Chip Flow-Chart

– Flip Chip Supply Chain Ecosystem

– Business Model in Flip Chip Space

– Flip Chip Players

– Business cases and supply chain examples

Table of contents (2/3)

95 97

98

108

109

119

120

122 123

124

126

127

128

130 131

133

134

135

136

137

139

© 2013 • 4

Copyrights © Yole Développement SA. All rights reserved.

• Bumping technologies …………………………………………………... – Overview of bumping technologies

– Focus on Cu pillar bumping

– µ-bumping for 2.5D/3DIC

– C2 & TCB – applications and trends

• Assembly technologies …………………………………………………. – Substrates

– Flip-Chip bonders

– TIM

– Underfills

• Flip-Chip applications & market ……………………………………….. – Memories

– Imaging

– 2D Logic SoC

– HB-LED

– Small logic, RF, Power, Analog and mixed signals ICs

– µ-bumping for 2.5D & 3D SiP/SoC

• Conclusions & Perspectives ……………………………………………

• Presentation of Yole’s Activity …………………………………………

Table of contents (3/3)

146 148

157

172

204

215 216

230

237

245

255 260

272

275

287

298

310

323

328

© 2013 • 5

Copyrights © Yole Développement SA. All rights reserved.

A 2013 business update including µ-bumping !

and many more new features… • “Flip-Chip 2011” report was the first Yole’s report

dedicated to the flip-chip platform, its related

bumping technologies and applications

• This 2013 version provides an update of all the major

parts describing this advanced packaging

technological platform (market forecast, supply

chain, technology trends and applications)

• Major changes and improvements

– The new Yole’s top down approach has been used,

leading to an exhaustive quantification of IC devices

using flip-chip (80 IC screened, in 90 end products and

9 markets) leading to a more accurate modeling of the

flip-chip market

– In the frame of this new top down approach, major

changes and improvements have to be highlighted

• Flip-Chip micro-bumping has been included in this update

to point out the impact of the brand new technological

platforms (3DIC, 2.5D Interposer) driving new demand of FC

copper pillar

• Accurate modeling of memory and HB-LED applications

© 2013 • 6

Copyrights © Yole Développement SA. All rights reserved.

Also new in this 2013 report…

• Market analysis – Fully updated 2010 – 2018 market forecast

– Fully updated bottom up approach

• 2012 installed capacities

• 2010 – 2014 capacity expansion overview

• Technology analysis – Comparison between C2 and TCB

– Strong focus on micro-bumping for 3DIC & 2.5D

– Updated and new parts on assembly

• TIM (new)

• Flip-chip bonders (new)

• Underfills

• Substrates

• Applications – Flip-chip for HB-LED

– Micro-bumping in 3DIC and 2.5D Interposer applications

– Flip-chip for memories

– Flip-chip for analog, RF, mixed signals IC

© 2013 • 7

Copyrights © Yole Développement SA. All rights reserved.

What we highlighted, what we missed in our 2011 Flip-Chip report

• 2011 Flip-Chip was the first Yole’s report on Flip-Chip technology, thus completing our

report collection describing wafer level packaging infrastructure

• What we chose not to address

– Thermal Interface Materials

– Silicon to silicon Micro-bumping – but we mentioned it would be included in this new release

– High Power LEDs since it was an emerging market with specific technologies

these 3 topics have been included in this new report

• What we missed

– Flip-Chip adoption for memory, faster than expected

• What we highlighted / we pointed out

– Our CAGR, wafer forecast, unit forecast and revenues forecast have been in good agreement with

2011/2012 production

– We expected a wide adoption of Cu pillar for APE, BB and advanced CMOS ICs

– We mentioned that Copper Pillar Bumping was on its way to become the next standard solution for

flip chip bumping

– Moreover, we concluded that “by largely contributing to the consolidation of the “middle-end” wafer

level packaging infrastructure, flip chip will favor the fast growth of 3D wafer level packaging with

through silicon vias (which require a similar infrastructure) and will benefit from it in return (fast

growth of silicon to silicon micro-bumping, emergence of silicon and glass interposers in flip chip

packages)”

© 2013 • 8

Copyrights © Yole Développement SA. All rights reserved.

Wafer Bumping Packaging and Applications Definition

WAFER BUMPING

FLIP CHIP WAFER LEVEL PACKAGING

FC BGA FC CSP FAN IN FAN OUT

Bump

characteristics

Plating, screen

printing

pitch: <180µm

Bump

characteristics

Plating, screen

printing, stud

pitch: < 150µm

Courtesy of Statschippac

CHIP

EMBEDDING Chip on Board

COF/COG

Bump characteristics

Ball dropping

pitch: 400-500µm

Bump

characteristics

Plating

pitch: <150µm

Courtesy of

NXP and FCI

Courtesy of 3M

Scope of the 2012

WLCSP report Scope of the 2012

fan-out/embedded report Scope of the

2013 Flip-Chip report

Silicon on silicon

micro-bumping

Bump

characteristics

Plating

pitch: < 60µm

Courtesy

of SPIL

© 2013 • 9

Copyrights © Yole Developpement SA. All rights reserved.

Report Objectives

• The objectives of this report are – To update the business status of the Flip-Chip market

– To provide a forecast for the next five years, and predict future trends

– To provide an overview of the technological trends and applications that use

Flip-Chip technology

• The Flip-Chip market is studied from the following angles – Market forecast (demand, production and installed capabilities)

– Industrial supply chain

– Market drivers

– Market value

– State-of-the-art technology and trends

– End-user applications

© 2013 • 10

Copyrights © Yole Developpement SA. All rights reserved.

Company cited in the report

3M, AdvanPack Solutions, AEM Tec, Ajinomoto, Akita, Altera, AMD, Amkor,

Apple, Applied Materials, ASE, Asymtek, Bergquist, Carsem, Casio

Micronics, Chipbond, Chipmos, Chomerics, Cookson, Dalsa, Datacon,

Dek, Denka, Dow Chemical, Dow Corning, Elpida, EMMicroelectronics,

Epcos, eSilicon, FCI, Fraunhofer IZM, Fuji Polymer, Fujitsu, Global

Foundries, Global Unichip, Henkel, Hitachi Chemical, Honeywell, Ibiden,

IBM, IC interconnect, IMI, Indium Corporation, Infineon, Intel, Ipdia, JCAP,

J-devices, Kinsus, Kyocera, LB Semicon, Lord Corporation, Lumileds,

Micrel, Minami, Murata, Namics, Nanium, Nan Ya, Nepes, Nexx, Nichia,

Nokia, Nordson, Nvidia, NXP, OKI, Omnivision, Optopac, OSE, Pactech,

Panasonic, Polymatech, PowerTech (PTI), Premier Semiconductor

Services, Qualcomm, Renesas, Samsung, Samsung Electromechanics

(SEMCO), Shibuya, Shin Etsu, Shinko Electric, Silex Microsystems,

Siltech, Sony Chemical, SPIL, StatsChipPac, SK-Hynix,

STMicroelectronics, Sumitomo, TDK, Tessera, Texas Instruments, Tong

Hsing, Toray, Toshiba, Triquint, TSMC, UMC, Unimicron, Unisem, UTAC,

Xilinx, Zymet and more…

© 2013 • 11

Copyrights © Yole Développement SA. All rights reserved.

Flip-Chip market in 2012…

• In 2012…

– Flip-Chip was a $20B market

– 20 M units ICs have been bumped (12.8M 12’’eq wafers)

– Average fab loading rate was 78%

– Taiwan became the leading place for flip-chip bumping

– 50% of bumped wafers were used in a laptop or a desktop

– IC which are flip-chip packaged can be classified in 2 categories

Early adopters like GPU, CPU and Chipset that have been using FC for a long time

New comers like interposer IC, memory, APE, BB, that are moving fast to flip chip mainly

motivated by the ultra fine pitch, the high IO count possibility and the provided performance of

this interconnection solution

$20B Market

20B Units

12.8M 12’’eq wafer

Taiwan #1 Location

50% End Product

© 2013 • 12

Copyrights © Yole Développement SA. All rights reserved.

Flip-Chip drivers and benefits

• Drivers and benefits provided by Flip-Chip

– High I/O density

– Large die-to-package fan-out area

– Interconnection to fine-pitch substrate

– Electrical performance / interface bandwidth

In particular for APE, GPUs, FPGAs, ASICs, PMU, RF Tx, memories

– Thermal dissipation

CPUs, GPUs, PA

– Hermeticity

SAW filters

– Ergonomics, topology

CMOS Image Sensors and LEDs

APE, BB in fcCSP

GPUs, CPUs, chipsets in fcBGA

Display drivers in COG, COF

© 2013 • 13

Copyrights © Yole Développement SA. All rights reserved.

Flip-Chip wafer forecast by bumping metallurgy

2010 2011 2012 2013 2014 2015 2016 2017 2018

Flip-chip bumping wafer forecast* Breakdown by bumping metallurgy (12''eq wafers)

Cu Pillar

Lead Free Solder

Sn/Pb Eutectic Solder

Gold Stud + Plated

*3D µ-bumping included

Yole Developpement © February 2013

2010 – 2018 Flip-Chip CAGR = 19%

© 2013 • 14

Copyrights © Yole Développement SA. All rights reserved.

Flip-Chip wafer forecast by bumping metallurgy Comments

• Cu Pillar is already a well established platform, especially due to Intel that

started Cu pillar bumping of processors in 2006

• This technology diffused during the 7 last years within the industry and

today, the important expected growth of Cu pillar bumping (35% CAGR on

the 2010 – 2018 time frame) is mainly linked to the big demand coming

from 3 areas

– CMOS 28nm IC (and beyond), including new types of ICs like Application

Processors (APE), Base Band module (BB) for mobile phones

– Next generation of DDR Memories (DDR3 and DDR4 memories)

– 3DIC/2.5D Interposer using Cu pillar (µbumping)

• µbumping for 3DIC and 2.5D Interposer is a real game changer for the

packaging industry and we decided to include it in our updated market

forecast to highlight how it will impact the flip-chip landscape

© 2013 • 15

Copyrights © Yole Développement SA. All rights reserved.

2012 Flip-Chip wafer start By end product

• In 2012, Laptop and desktop PC were the top end products using Flip Chip

• PCs are followed by Smart TV and LCD TVs (for LCD drivers), smartphones and high

performance computers

Laptop 3 662 163

29%

Desktop PC 2 695 375

21% Smart TV & LCD TV 1 491 188

12%

Smartphones 1 163 752

9%

HPC 791 256

6%

Desktop PC Screen 590 940

5%

Feature Phone 555 129

4%

Game stations 504 135

4%

Network (Switch, Router, Appliance)

298 779 2%

Tablet 212 999

2%

Base stations 180 327

2%

Set-Top Box and Hybrid Set-Top Box

177 625 1%

Server 172 784

1%

Other end applications 270 474

2%

2012 Flip-Chip wafer start* Breakdown by end product (12''eq wafers)

*3D µ-bumping included

Yole Developpement © February 2013

© 2013 • 16

Copyrights © Yole Développement SA. All rights reserved.

0

20

40

60

80

100

120

140

160

2002 2003 2004 2005 2006 2007 2008 2009 2010 2011 2012 2013 2014 2015 2016 2017 2018 2019

Pit

ch (

µm

)

Flip ChipArray

Flip ChipPeripheral

Wafer Bumping Trends Pitch capabilities / Alloy

45 nm

32 nm

22 nm 18 nm

Screen Printing

solder bump

conductive polymer bump

Electroplating

Cu-Pillars

µ-Bumps

Eutectic, High Lead, Pb free

(SnAgCu) Lead free, Au stud, Solder bump, Cu pillars

Electroplating / Evaporation / Stud bumping

Au bump

Solder bump

Cu-pillars

Micro-bump

bonding

Bump-less

‘pads’?

• Bumping interconnect technology roadmap for FC BGA

© 2013 • 17

Copyrights © Yole Développement SA. All rights reserved.

Bumping Hierarchy * in Flip Chip & related 3D Packaging Solutions as of 2013

PCB

BGA

Laminate

2.5D Silicon

interposer

Digital IC CPU

Wide I/O

memory stack

400-800µm

Bumps/Cu Pillars: 40-250µm

µ-Bumps: 10-40µm * in pitch (µm), underfills not represented

µ-Bumps

20-80µm

• µ-bumping for 2.5D & 3DIC in conjunction with new applications like APE, DDR memories etc. is

going to boost flip-chip demand, thus leading also to new challenges and new technological

developments. Today flip-chip is available through a wide range of pitches to answer specific

needs of all the applications

– µ-bumping for advanced 3D stacking: 10 – 20 µm pitch required

– CMOS 28nm and below, logic on interposer etc.: 20 – 80 µm pitch required

– Other logic (in FC BGA) : 40 – 450 µm pitch required

© 2013 • 18

Copyrights © Yole Développement SA. All rights reserved.

Present/future markets for Flip-Chip

• Flip-Chip technology is already present in a wide range of application, from high

volumes/consumer applications, to low volumes/high end applications. All these

applications have their own requirements, specifications and challenges !

High Volumes

Lower Volumes

Smartphones/

tablets

Smart TV/Display

Network

Desktop & Laptop

Game stations

Set top box

HPC

Servers

Base

stations

Military & Aerospace

Computing

Mobile &

Consumer

Consumer

Automotive

Industrial

Medical

Cars Medical

devices

© 2013 • 19

Copyrights © Yole Developpement SA. All rights reserved.

About the Author of This Report

Lionel Cadix

– Lionel joined Yole after completing several projects linked to the

characterization and modeling of high-density TSV and 3DIC chip stacking in

collaboration with CEA-Leti and STMicroelectronics for his PhD. He is the

author of several publications and holds eight patents in the field of 3D

Integration

Contact: [email protected]