final program - idaminyoung kim, sudarshan banerjee, nikil dutt, nalini venkatasubramanian session...
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Final ProgramOctober 22-27, 2006
Seoul, Koreahttp://www.esweek.org
International Conference on Hardware –Software Codesign and System Synthesis
International Conference on Embedded Sofware
International Conference on Compilers, Architecture, and Synthesis for Embedded Systems
Embedded Systems Week is an exciting event which brings togetherconferences, tutorials and workshops centered on various aspects of embedded systems research and development. Three leading conferences in the area - CODES+ISSS, EMSOFT and CASES - take place at the same time and location, allowing attendees to benefit from a wide range of topics covered by these conferences and their associated tutorials and workshops.
Sponsoring societies: ACM SIGBED, ACM SIGDA, ACM SIGMICRO, IEEE Circuits and Systems Society, IEEE Computer Society , IEEE Council on Electronic Design Automation
Technical co-sponsor: IFIPCooperating societies: KISS, IEEK
Premier Industrial Contributors
LG Electronics (www.lge.com) Samsung (www.samsung.com)
Industrial/Academic Contributors
ARTIST2 (www.artist-embeded.org) ASRI at Seoul National University (asri.snu.ac.kr)
Axell (www.axell.co.ip) Cadence (www.cadence.com)
Chip Estimate Corporation (www.chipestimate.com) Dynalith Systems (www.dinalith.com)
Elsevier (www.elsevier.com) Ericsson (www.ericsson.com)
Faraday Technology (www.faraday-tech.com) Huins (www.huins.com)
IBM (www.research.ibm.com) ICT at Seoul National University (riact.snu.ac.kr)
KAIST EE (www.ee.kaist.ac.kr) KETI (www.keti.re.kr)
KOSEF (www.kosef.re.kr) Microsoft (research.microsoft.com)
Philips (www.philips.com) Sharp (www.sharp-world.com)
SpringSoft Technology (www.springsoft.com) Springer (www.springer.com) Synfora (www.synfora.com)
Synopsys (www.synopsys.com) Telelogic (www.telelogic.com) Tensilica (www.tensilica.com)
Vast Systems (www.vastsystems.com) Xilinx (www.xilinx.com)
October 22, Sunday, Tutorial DayCODES+ISSS (Emerald) CASES (Ruby&Jade)
9:00 -12:00
UML and Model-Driven Development for SoC
Wolfgang Mueller (Paderborn University/C-LAB) YvesVanderperren, Wim Dehaene Katholieke Universiteit Leuven
(ESAT-MICAS)
Automated Architectural Synthesis from C algorithms
Vinod Kathail, Craig Gleason, Shail Aditya (Synfora)
12:00 -14:00
Lunch
CODES+ISSS (Emerald) EMSOFT (Ruby&Jade)
14:00 -17:00
Automotive Electronics: System, Software, and Local AreaNetwork
Yoshimi Furukawa (Shibaura Institute of Technology), SeijiKawamura (AutoNetworks Technologies, Ltd)
Component-Based Embedded Software Design
Pierre van de Laar (ESI)
October 23, Monday8:30 -9:00
ESWeek opening session (Crystal ballroom)
9:00 -10:00
CODES+ISSS Keynote - plenary session (Crystal ballroom)Dr. Namsung Woo (Executive VP of Samsung)
10:00 -10:30
Coffee break
CODES+ISSS EMSOFT CASESCrystal Ballroom 1 Ruby&Jade Pearl Crystal Ballroom 2 Emerald
10:30 -12:00
Session A1:HW/SW DesignExploration forMultimediaApplications
Session A2: LowPower Schedulingand EstimationTechniques
Session A3:System-LevelPerformanceIssues
Session B1: Design and Implementationof Embedded Software
session C1:Modeling andSimulation
12:00 -13:30
Lunch
13:30 -15:30
Session A4:Transaction-LevelModeling andExploration
Session A5:Architecture andModeling forNetwork-on-Chip
Session A6:Embedded Securityand Reliability
Session B2: Component-basedDevelopment and Software Engineering
C2: ShortPresentations withPosters 1
Coffee break
Crystal Ballroom 1 Ruby&Jade Pearl Topaz Crystal Ballroom 2 CASES
15:30 -17:30
Session A7:AdvancedTechniques forHigh-LevelSynthesis andPhysical Design
Session A8: DesignOptimization forNetwork-on-Chip
Session A9:Application-SpecificCode Optimization
Session B3:Modeling ofSynchronousSystems
Session B4:NetworkedEmbeddedSoftware
Session C3:Compilation
Coffee break
17:30 -19:00
CODES+ISSS panel (joint session - Crystal Ballroom)Are current ESL Tools Meeting the Requirements of Advanced Embedded Designs?
October 24, Tuesday9:00 -10:00
EMSOFT Keynote - plenary session (Crystal Ballroom)Dr. Werner Damm (OFFIS)
10:00 -10:30
Coffee break
CODES+ISSS EMSOFT CASESCrystal Ballroom 1 Crystal Ballroom 2 Emerald Pearl
10:30 -12:30
Special session A10: ProgrammingModels for Multiprocessor Systems:
Session B5: Concurrent Real-TimeProgramming
Session C4:Architecture/Power
Session C5:Memory Systems
12:30 -14:00 Lunch (sponsored by LG Electronics)
Crystal Ballroom 1 Ruby&Jade Crystal Ballroom 2 Emerald
14:00 -16:00
Session A11:Simulation,Optimization, andAcceleration
Session A12:System-LevelDesign of MPSoC
Special session B6: Software Supportfor Portable Storage
Session C6: Short Presentations withPosters II
Coffee break
Crystal Ballroom 1 Ruby&Jade Topaz Crystal Ballroom 2 Emerald
16:00 -18:00
Session A13:System-LevelOptimization
Session A14:ArchitectureExploration
Session B7:Compiling andProgramTransformations
Session B8: EnergyAdaptation andOptimization
Session C7: Multithreading andMultiprocessing
Coffee break18:00 -19:00
ACM SIGBED Business meeting(Topaz)
19:00 -22:00
Banquet (Crystal Ballroom) - sponsored by Samsung
October 25, Wednesday9:00 -10:00
CASES Keynote - plenary session (Crystal Ballroom)Dr. Liang-Gee Chen (National Taiwan University)
10:00 -10:30
Coffee break
CODES+ISSS EMSOFT CASESCrystal Ballroom 1 Crystal Ballroom 2 Emerald
10:30 -12:00
Special Session A15: Industry Solutionsto Emerging Embedded Systems
Session B9: Modeling and Validation Session C8: Low power
12:00 -13:30
Lunch
Crystal Ballroom 1 Ruby&Jade Topaz Crystal Ballroom 2 Emerald
13:30 -15:30
Session A16:SynthesisTechniques forAccelerators
Session A17:CommunicationSynthesis andAnalysis forMPSoC
Session B10:Scheduling andExecution TimeAnalysis
Session B11:Architecture andPlatform Analysis
Session C9: Robustness
Coffee break
15:30 -16:30
EMSOFT panel (joint session - Crystal Ballroom):Embedded Software Education
16:30 -17:00
Closing (Crystal Ballroom)
October 26, Thursday, WorkshopsRuby Pearl Topaz Emerald Jade
8:30 -10:00
ESTIMedia 2006 -4th IEEE Workshop
on EmbeddedSystems for Real-Time Multimedia
The First Workshopon Foundations
and Applications ofComponent-based
Design
WESE 2006 - TheSecond Workshop
on EmbeddedSystems Education
IWSSPS 2006 -The Second
Workshop onSoftware Support
for PortableStorage
The FirstInternationalWorkshop on
EmbeddedSystems Security
Telelogic Hands-onWorkshop:Application
Development withTAUG2 and UML
2.0
10:00 -10:30
Coffee break
10:30 -12:0012:00-13:30
Lunch
13:30 -15:0015:00-15:30
Coffee break
15:30-17:00
Closing Closing Closing Closing Closing
October 27, Friday, WorkshopsRuby Jade
9:00-10:00
ESTIMEDIA 2006 - 4th IEEE Workshop on EmbeddedSystems for Real-Time Multimedia
CASA 2006 - Workshop on Compiler Assisted SoCAssembly
10:00 -10:30
Coffee break
10:30 -12:0012:00-13:30
Closing Lunch
13:30 -15:0015:00-15:30
Coffee break
15:30-17:00
Closing
Session A1: HW/SW Design Exploration for Multimedia ApplicationsSession chairs: Hiroto Yasuura (Kyushu University), Donatella Sciuto(Politecnico di Milano)
A1.1 Application-specific Workload Shaping in Multimedia-enabled Personal Mobile DevicesBalaji Raman and Samarjit Chakraborty
A1.2 Efficient Computation of Buffer Capacities for Multi-Rate Real-Time Systems with BackpressureM. Wiggers, M. Bekooij, P. Jansen, G. Smit
A1.3 Design Space Exploration of Real-time Multi-media MPSoCs with Heterogeneous Scheduling PoliciesMinyoung Kim, Sudarshan Banerjee, Nikil Dutt, Nalini Venkatasubramanian
Session A2: Low Power Scheduling and Estimation TechniqueSession chairs: Naehyuck Chang (Seoul National University), Joerg Henkel (University of Karlsruhe)
A2.1 Battery Discharge Aware Energy Feasibility AnalysisHenrik Lipskoch, Karsten Albers, Frank Slomka
A2.2 A Run-Time, Feedback-Based Energy Estimation Model For Embedded DevicesSelim Gurun and Chandra Krintz
A2.3 Hardware Based Frequency/Voltage Control ofVoltage Frequency Island Systems Puru Choudhary, Diana Marculescu
Session A3: System-Level Performance IssuesSession chairs: Ahmed Jerraya(TIMA Laboratory), M. Balakrishnan (IIT Delhi)
A3.1 A Formal Approach to Robustness Maximization of Complex Heterogeneous Embedded SystemsArne Hamann, Razvan Racu, Rolf Ernst
A3.2 Automatic Run-Time Extraction of Communication Graphs from Multithreaded ApplicationsAi-Hsin Liu, Robert P. Dick
A3.3 The Pipeline Decomposition Tree: an Analysis Tool for Multiprocessor Implementation of Image Processing Applications Dong-Ik Ko and Shuvra S. Bhattacharyya
October 23, Monday, 10:30 - 12:00CODES+ISSS EMSOFT CASES
Session B1: Design and Implementation of Embedded SoftwareSession chair: Reinhard Wilhelm
B1.1 Time-triggered Implementations of Dynamic ControllersTruong Nghiem, George J. Pappas, Antoine Girard, Rajeev Alur
B1.2 Efficient Distributed Deadlock Avoidance with Liveness GuaranteesCesar Sanchez, Henny B. Sipma, Zohar Manna, Christopher D. Gill
B1.3 A Memory-Optimal Buffering Protocol for Preservation of Synchronous Semantics under Preemptive SchedulingC. Sofronis, S. Tripakis, P. Caspi
Sesstion C1 : Modeling and SimulationSession chair: Sami Yehia (ARM)
C1.1 An Accurate and Efficient Simulation Based Analysis for Worst Case Interruption Delay Hiroshi Nakashima, Masahiro Konishi and Takashi Nakada, Toyohashi University of Technology, Japan
C1.2 Reaching Fast Code Faster: Using Modeling for Efficient Software Thread Integration on a VLIW DSPWon So and Alexander G. Dean, NC State, USA
C1.3 Automatic Performance Model Construction for the Fast Software Exploration of New Hardware DesignsJohn Cavazos, Christophe Dubach, Grigori Fursin, Mike O'Boyle and
Session A6: Embedded Security and ReliabilitySession chairs: Yukihiro Nakamura (Kyoto
(Seoul National University)
A6.1 Methodology for Attack of a Java-based PDAC.Gebotys, B.White
A6.2 Hardware Assisted Pre-emptive Control Flow Checking for Embedded Processors to Improve ReliabilityRoshan G. Ragel, SridevanParameswaran
A6.3 Architectural Support for Safe Software Execution on Embedded ProcessorsDivya Arora, AnandRaghunathan, Srivaths Ravi, and Niraj K. Jha
Session A5: Architecture and Modeling for Network-on-ChipSession chairs: Hiroyuki Tomiyama (Nagoya Univ.),
A5.1 Bounded Arbitration Algorithm for QoS-Supported On-chip CommunicationMohammad Abdullah Al Faruque, Gereon Weiss, Joerg Henkel
A5.2 Increasing the Throughput of an Adaptive Router in Network on Chip (NoC)Seung Eun Lee and Nader Bagherzadeh
A5.3 Automatic Phase Detection for Stochastic On-Chip Traffic GenerationAntoine Scherrer, Antoine Fraboulet and Tanguy Risset
Session A4: Transaction-Level Modeling and ExplorationSession chairs: Wolfgang Mueller (U. Paderborn), Ando Ki (Dynalith Systems)
A4.1 TLM/Network Design Space Exploration for Networked Embedded SystemsNicola Bombieri, Franco Fummi, Davide Quaglia
A4.2 Automatic Generation of Transaction-level Models for Rapid Design Space ExplorationDongwan Shin, Andreas Gerstlauer, Junyu Peng, Rainer Doemer, Daniel D. Gajski
A4.3 Accurate yet Fast Modeling of Real-Time CommunicationGunar Schirner and Rainer Doemer
CODES+ISSS
Session A6: Embedded Security ReliabilitySession chairs: Yukihiro Nakamura (Kyoto University), Jihong Kim
A6.1 Methodology for Attack of a Java-based PDAC.Gebotys, B.White
A6.2 Hardware Assisted Pre-emptive Control Flow Checking for Embedded Processors to Improve ReliabilityRoshan G. Ragel, SridevanParameswaran
A6.3 Architectural Support for Safe Software Execution on Embedded ProcessorsDivya Arora, AnandRaghunathan, Srivaths Ravi, and Niraj K. Jha
Session A5: Architecture and Modeling for Network-on-ChipSession chairs: Hiroyuki TomiyamaSungchan Kim (Seoul National University)
A5.1 Bounded Arbitration Algorithm for QoS-Supported On-chip CommunicationMohammad Abdullah Al Faruque, Gereon Weiss, Joerg Henkel
A5.2 Increasing the Throughput of an Adaptive Router in Network on Chip (NoC)Seung Eun Lee and Nader Bagherzadeh
A5.3 Automatic Phase Detection for Stochastic On-Chip Traffic GenerationAntoine Scherrer, Antoine Fraboulet and Tanguy Risset
Session A4: Transaction-Level Modeling and ExplorationSession chairs: Wolfgang Mueller (U. Paderborn),
A4.1 TLM/Network Design Space Exploration for Networked Embedded SystemsNicola Bombieri, Franco Fummi, Davide Quaglia
A4.2 Automatic Generation of Transaction-level Models for Rapid Design Space ExplorationDongwan Shin, Andreas Gerstlauer, Junyu Peng, Rainer Doemer, Daniel D. Gajski
A4.3 Accurate yet Fast Modeling of Real-Time CommunicationGunar Schirner and Rainer Doemer
CODES+ISSS
October 23, Monday, 13:30 - 15:30 - 15:30
C2 : Short Presentations with Posters
C2.1 Supporting Precise Garbage Collection for Java Bytecode-to-C Ahead-of-Time Compiler for Embedded SystemsDong-Heon Jung, JongKuk Park, Sung-Hwan Bae, JaemokLee and Soo-Mook
C2.2 Adapting Compilation Techniques to Enhance the Packing of Instructions into RegistersStephen Hines, David Whalley, and Gary Tyson, Florida State University, USA
C2.3 Modeling MEMS Microhotplate Structures With SystemCAnkush Varma, Yaqub Afridi, Akin Akturk, Paul Klein, Allen Hefner and Bruce Jacob, NIST, USA
C2.4 A Network Agent for Diagnosis and Analysis of Real-time Ethernet NetworksRainer Buchty and Hans-Peter Lob, Univ. Karlsruhe (TH), Germany
C2.5 Memory Optimization by Counting Points in Integer Transformations of Parametric PolytopesRachid Seghir and Vincent Loechner, LSIIT, FRANCE
C2.6 State Space Reconfigurability: An Implementation Architecture for Self Modifying Finite AutomataKaming Keung and Akhilesh Tyagi, Iowa State University, USA
C2.7 Incremental Elaboration for Run-Time Reconfigurable Hardware DesignsA. Derbyshire, T. Becker and W. Luk, Imperial College London, UK
C2.8 FlashCache: A NAND Flash Memory File Cache for Low Power Web ServersTaeho Kgil and Trevor Mudge, University of Michigan, USA
Session B2: Component-Based Development and Software Engineering
Sifakis
B2.1 Real-Time Interfaces for Composing Real-Time SystemsLothar Thiele, Ernesto Wandeler, NikolayStoimenov
B2.2 A Causality Interface for Deadlock Analysis in DataflowYe Zhou, Edward A. Lee
B2.3 Towards A Formal Foundation For Domain Specific Modeling LanguagesEthan K. Jackson, Janos Sztipanovits
B2.4 Defining a Strategy to Introduce Software Product Line Using the Existing Embedded SystemsKentaro Yoshimura, Dharmalingam Ganesan, Dirk Muthig
CASES
SessionSession Chair: Ben Carrion Schafer (Seoul National Univ.)
C2 : Short Presentations with Posters
C2.1 Supporting Precise Garbage Collection for Java Bytecode-to-C Ahead-of-Time Compiler for Embedded SystemsDong-Heon Jung, JongKuk Park, Sung-Hwan Bae, JaemokLee and Soo-Mook Moon, Seoul National University, Korea
C2.2 Adapting Compilation Techniques to Enhance the Packing of Instructions into RegistersStephen Hines, David Whalley, and Gary Tyson, Florida State University, USA
C2.3 Modeling MEMS Microhotplate Structures With SystemCAnkush Varma, Yaqub Afridi, Akin Akturk, Paul Klein, Allen Hefner and Bruce Jacob, NIST, USA
C2.4 A Network Agent for Diagnosis and Analysis of Real-time Ethernet NetworksRainer Buchty and Hans-Peter Lob, Univ. Karlsruhe (TH), Germany
C2.5 Memory Optimization by Counting Points in Integer Transformations of Parametric PolytopesRachid Seghir and Vincent Loechner, LSIIT, FRANCE
C2.6 State Space Reconfigurability: An Implementation Architecture for Self Modifying Finite AutomataKaming Keung and Akhilesh Tyagi, Iowa State University, USA
C2.7 Incremental Elaboration for Run-Time Reconfigurable Hardware DesignsA. Derbyshire, T. Becker and W. Luk, Imperial College London, UK
C2.8 FlashCache: A NAND Flash Memory File Cache for Low Power Web ServersTaeho Kgil and Trevor Mudge, University of Michigan, USA
Session B2: Component-Based Development and Software EngineeringSession chair: Joseph
B2.1 Real-Time Interfaces for Composing Real-Time SystemsLothar Thiele, Ernesto Wandeler, NikolayStoimenov
B2.2 A Causality Interface for Deadlock Analysis in DataflowYe Zhou, Edward A. Lee
B2.3 Towards A Formal Foundation For Domain Specific Modeling LanguagesEthan K. Jackson, Janos Sztipanovits
B2.4 Defining a Strategy to Introduce Software Product Line Using the Existing Embedded SystemsKentaro Yoshimura, Dharmalingam Ganesan, Dirk Muthig
CASESEMSOFT
Session A9: Application-Specific Code OptimizationSession chairs: Rolf Ernst (TU Braunschweig),
A9.1 Retargetable Code Optimization with SIMD InstructionsManuel Hohenauer, Christoph Schumacher, Rainer Leupers, GerdAscheid, Heinrich Meyr, Hans van Someren
A9.2 Pack Instruction Generation for Media Processors Using Multi-valued Decision DiagramHiroaki Tanaka, Yoshinori Takeuchi, Keishi Sakanushi, Masaharu Imai, Yutaka Ota, Nobu Matsumoto, Masaki Nakagawa
A9.3 Automatic Selection of Application - Specific Instruction Set ExtensionsCarlo Galuzzi, Elena MoscuPanainte, Yana Yankova, Koen Bertels, StamatisVassiliadis
Session A8: Design Optimization for Network-on-ChipSession chairs: Petru Eles(Linkoping U.), DavideQuaglia (U. Verona)
A8.1 A Buffer-sizing Algorithm for Networks on
Martijn Coenen, SrinivasanMurali, Andrei Radulescu, Kees Goossens, and Giovanni De Micheli
A8.2 Layout Aware Design of Mesh Base Network-on-Chip ArchitecturesKrishnan Srinivasan and Karam S. Chatha
A8.3 A Methodology for Design of Application Specific Deadlock-free Routing Algorithms for NoC SystemsMaurizio Palesi, Rickard Holsmark, Shashi Kumar
Session A7: Advanced Techniques for High-Level Synthesis and Physical DesignSession chairs: Allen Wu (Tsing Hua U.), YoungsooShin (KAIST)
A7.1 Droplet
Tao Xu and KrishnenduChakrabarty
A7.2 Floorplan Driven Leakage Power Aware IP-Based SoC Design Space ExplorationAseem Gupta, Fadi Kurdahi, Nikil Dutt, Kamal Khouri, Magdy Abadir
A7.3 Thermal-Aware High-level Synthesis Based on Network Flow MethodPilok Lim and Taewhan Kim
CODES+ISSS
October 23, Monday, 15:30 - 17:30
Session A9: Application-Specific Code OptimizationSession chairs: Rolf Ernst (TU Shrivastava (Arizona StateUniversity)
Braunschweig), Aviral
A9.1 Retargetable Code Optimization with SIMD InstructionsManuel Hohenauer, Christoph Schumacher, Rainer Leupers, GerdAscheid, Heinrich Meyr, Hans van Someren
A9.2 Pack Instruction Generation for Media Processors Using Multi-valued Decision DiagramHiroaki Tanaka, Yoshinori Takeuchi, Keishi Sakanushi, Masaharu Imai, Yutaka Ota, Nobu Matsumoto, Masaki Nakagawa
A9.3 Automatic Selection of Application - Specific Instruction Set ExtensionsCarlo Galuzzi, Elena MoscuPanainte, Yana Yankova, Koen Bertels, StamatisVassiliadis
Session A8: Design Optimization for Network-on-ChipSession chairs: Petru Eles(Linkoping U.), DavideQuaglia (U. Verona)
A8.1 A Buffer-sizing Algorithm for Networks on
Martijn Coenen, SrinivasanMurali, Andrei Radulescu, Kees Goossens, and Giovanni De Micheli
A8.2 Layout Aware Design of Mesh Base Network-on-Chip ArchitecturesKrishnan Srinivasan and Karam S. Chatha
A8.3 A Methodology for Design of Application Specific Deadlock-free Routing Algorithms for NoC SystemsMaurizio Palesi, Rickard Holsmark, Shashi
Session A7: Advanced Techniques for High-Level Synthesis and Physical DesignSession chairs: Allen Wu (Tsing Hua U.), YoungsooShin (KAIST)
A7.1 Droplet-Trace-BasedArray Partitioning and a PinAssignment Algorithm forthe Automated Design ofDigital Microfluidic BiochipsTao Xu and KrishnenduChakrabarty
A7.2 Floorplan Driven Leakage Power Aware IP-Based SoC Design Space ExplorationAseem Gupta, Fadi Kurdahi, Nikil Dutt, Kamal Khouri, Magdy Abadir
A7.3 Thermal-Aware High-level Synthesis Based on Network Flow MethodPilok Lim and Taewhan Kim
CODES+ISSS
-
SessionSession Chair: Alex Orailoglu (UCSD)
C3 : Compilation
C3.1 Adaptive and Flexible Dictionary Code Compression for Embedded ApplicationsMats Brorsson and MikaelCollin, KTH , Sweden
C3.2 Automated Compile-Time and Run-Time Techniques to Increase Usable Memory in MMU-Less Embedded SystemsLan Bai, Lei Yang and Robert. P. Dick, Northwestern University, USA
C3.3 Modulo Graph Embedding: Mapping Applications onto Coarse-Grained Reconfigurable ArchitecturesHyunchul Park, Kevin Fan, Manjunath Kudlur and Scott Mahl, University of Michigan, USA
C3.4 Scalable SubgraphMapping for Acyclic Computation AcceleratorsNathan Clark, Amir Hormati, Scott Mahlke and Sami Yehia, University of Michigan, USA
Session B4: Networked Embedded SoftwareSession chair: LotharThiele
B4.1 S2DB : A Novel Simulation-Based Debugger for Sensor Network Applications Ye Wen, Rich Wolski, SelimGurun
B4.2 Multi-level Software Reconfiguration for Sensor NetworksRahul Balani, Simon Han, Ram Kumar Rengaswamy, Ilias Tsigkogiannis, Mani Srivastava
B4.3 An Analysis Framework for Network-Code ProgramsMadhukar Anand, Sebastian Fischmeister, Insup Lee
Session B3: Modelling of Synchronous SystemsSession chair: Rajeev Alur
B3.1 Mixing Signals and Modes in Synchronous Dataflow SystemsJean-Louis Colaco, GregoireHamon, Marc Pouzet
B3.2 Polychronous Mode AutomataJean-Pierre Talpin, Christian Brunette, Thierry Gautier, Abdoulaye Gamatie
B3.3 A Timing Model for Synchronous Language Implementations in SimulinkT. Bourke, A. Sowmya
CASESEMSOFT
C3 : Compilation
C3.1 Adaptive and Flexible Dictionary Code Compression for Embedded ApplicationsMats Brorsson and MikaelCollin, KTH , Sweden
C3.2 Automated Compile-Time and Run-Time Techniques to Increase Usable Memory in MMU-Less Embedded SystemsLan Bai, Lei Yang and Robert. P. Dick, Northwestern University, USA
C3.3 Modulo Graph Embedding: Mapping Applications onto Coarse-Grained Reconfigurable ArchitecturesHyunchul Park, Kevin Fan, Manjunath Kudlur and Scott Mahl, University of Michigan, USA
C3.4 Scalable SubgraphMapping for Acyclic Computation AcceleratorsNathan Clark, Amir Hormati, Scott Mahlke and Sami Yehia, University of Michigan, USA
Session B4: Networked Embedded SoftwareSession chair: LotharThiele
B4.1 S2DB : A Novel Simulation-Based Debugger for Sensor Network Applications Ye Wen, Rich Wolski, SelimGurun
B4.2 Multi-level Software Reconfiguration for Sensor NetworksRahul Balani, Simon Han, Ram Kumar Rengaswamy, Ilias Tsigkogiannis, Mani Srivastava
B4.3 An Analysis Framework for Network-Code ProgramsMadhukar Anand, Sebastian Fischmeister, Insup Lee
Session B3: Modelling of Synchronous SystemsSession chair: Rajeev Alur
B3.1 Mixing Signals and Modes in Synchronous Dataflow SystemsJean-Louis Colaco, GregoireHamon, Marc Pouzet
B3.2 Polychronous Mode AutomataJean-Pierre Talpin, Christian Brunette, Thierry Gautier, Abdoulaye Gamatie
B3.3 A Timing Model for Synchronous Language Implementations in SimulinkT. Bourke, A. Sowmya
CASESEMSOFT
Chip Using TDMA and Credit-Based End-to-EndFlow Control
Session B5: Concurrent Real-Time ProgrammingSession chair: Frits Vaandrager
B5.1 A Hierarchical Coordination Language for Interacting Real-Time TasksArkadeb Ghosal, Thomas A. Henzinger, Daniel Iercan, Christoph Kirsch, Alberto Sangiovanni-Vincentelli
B5.2 SHIM: Scheduling-Independent Threads and Exceptions in SHIMOlivier Tardieu, Stephen A. Edwards
B5.3 Communication by Sampling in Time-Sensitive Distributed SystemsAlbert Benveniste, Benoit Caillaud, Luca P. Carloni, Paul Caspi, Alberto Sangiovanni-Vincentelli, Stavros Tripakis
Special Session A10: Programming Models for Multiprocessor Systems: From Supercomputing Programming to Multiprocessors on a ChipSesssion chairs: Wolfgang Rosenstiel(Tubingen Univ.)
A10.1 SHAPES: A Tiled Scalable Software Hardware Architecture Platform for Embedded SystemsPier S. Paolucci (Atmel Roma and Dip. Fisica Uni. Roma)
A10.2 Challenges in Exploitation of Loop Parallelism in Embedded ApplicationsAlexander V. Veidenbaum (U.C. Irvine)
A10.3 Resource Virtualization in RealTime CORBA MiddlewareChristopher D. Gill (Washington University)
EMSOFTCODES
October 24, Tuesday, 10:30 - 12:30
Session B5: Concurrent Real-Time ProgrammingSession chair: Frits Vaandrager
B5.1 A Hierarchical Coordination Language for Interacting Real-Time TasksArkadeb Ghosal, Thomas A. Henzinger, Daniel Iercan, Christoph Kirsch, Alberto Sangiovanni-Vincentelli
B5.2 SHIM: Scheduling-Independent Threads and Exceptions in SHIMOlivier Tardieu, Stephen A. Edwards
B5.3 Communication by Sampling in Time-Sensitive Distributed SystemsAlbert Benveniste, Benoit Caillaud, Luca P. Carloni, Paul Caspi, Alberto Sangiovanni-Vincentelli, Stavros Tripakis
Special Session A10: Programming Models for Multiprocessor Systems: From Supercomputing Programming to Multiprocessors on a ChipSesssion chairs: Wolfgang Rosenstiel(Tubingen Univ.)
A10.1 SHAPES: A Tiled Scalable Software Hardware Architecture Platform for Embedded SystemsPier S. Paolucci (Atmel Roma and Dip. Fisica Uni. Roma)
A10.2 Challenges in Exploitation of Loop Parallelism in Embedded ApplicationsAlexander V. Veidenbaum (U.C. Irvine)
A10.3 Resource Virtualization in RealTime CORBA MiddlewareChristopher D. Gill (Washington University)
EMSOFTCODES
October 24, Tuesday, 10:30 - 12:30
SessionSession Chair: Hiroshi Nakashima (Toyohashi Univ. of Technology)
C5 : Memory Systems
C5.1 Minimizing Bank Selection Instructions for Partitioned MemoryBernhard Scholz, Bernd Burgstaller and Jingling Xue, The University of Sydney, Australia
C5.2 Protected Heap Sharing for Memory-Constrained Embedded SystemsYoonseo Choi and Hwansoo Han, KAIST, South Korea
C5.3 A Dynamic Code Placement Technique for Scratchpad Memory using Postpass OptimizationBernhard Egger, Chihun Kim, Choonki Jang, Yoonsung Nam, Jaejin Lee and Sang LyulMin, Seoul National University, South Korea
C5.4 CFLRU: A Replacement Algorithm for Flash MemorySeon-yeong Park, Dawoon Jung, Jeong-ukKang, Jin-soo Kim and Joonwon Lee, KAIST, South Korea
SessionSession Chair: Robert Dick (Northwestern Univ.)
C4 : Architecture / Power
C4.4 Probabilistic Arithmetic and Extremely Energy Efficient Embedded Signal ProcessingJ. George, B. Marr, B. E. S. Akgul and K. V. Palem, Georgia Institute of Technology, USA
C4.5 Power Efficient Branch Prediction for Embedded Processors through Early Identifications of Branch InstructionsChengmo Yang and Alex Orailoglu, UCSD, USA
C4.6 Reducing Energy of Virtual Cache Synonym Lookup using Bloom FiltersDong Hyuk Woo, Mrinmoy Ghosh, EmreOzer, Stuart Biles and Hsien-Hsin S. Lee, Georgia Institute of Technology, USA
C4.7 Determining Efficient Custom Embedded Architectures Based on Runtime Profiles of ApplicationsLukasz Strozek and David Brooks, Harvard University, USA
CASES
C5.1 Minimizing Bank Selection Instructions for Partitioned MemoryBernhard Scholz, Bernd Burgstaller and Jingling Xue, The University of Sydney, Australia
C5.2 Protected Heap Sharing for Memory-Constrained Embedded SystemsYoonseo Choi and Hwansoo Han, KAIST, South Korea
C5.3 A Dynamic Code Placement Technique for Scratchpad Memory using Postpass OptimizationBernhard Egger, Chihun Kim, Choonki Jang, Yoonsung Nam, Jaejin Lee and Sang LyulMin, Seoul National University, South Korea
C5.4 CFLRU: A Replacement Algorithm for Flash MemorySeon-yeong Park, Dawoon Jung, Jeong-ukKang, Jin-soo Kim and Joonwon Lee, KAIST, South Korea
C4.4 Probabilistic Arithmetic and Extremely Energy Efficient Embedded Signal ProcessingJ. George, B. Marr, B. E. S. Akgul and K. V. Palem, Georgia Institute of Technology, USA
C4.5 Power Efficient Branch Prediction for Embedded Processors through Early Identifications of Branch InstructionsChengmo Yang and Alex Orailoglu, UCSD, USA
C4.6 Reducing Energy of Virtual Cache Synonym Lookup using Bloom FiltersDong Hyuk Woo, Mrinmoy Ghosh, EmreOzer, Stuart Biles and Hsien-Hsin S. Lee, Georgia Institute of Technology, USA
C4.7 Determining Efficient Custom Embedded Architectures Based on Runtime Profiles of ApplicationsLukasz Strozek and David Brooks, Harvard University, USA
CASES
Session A12: System-Level Design of MPSoCSession chairs: Alex Orailoglu (UCSD), EuiyoungChung (Yonsei University)
A12.1 Decision-theoretic Exploration of Multi-Processor PlatformsGiovanni Beltrame, Dario Bruschi, Donatella Sciuto, Cristina Silvano
A12.2 Multi-processor System Design with ESPAMHristo Nikolov, TodorStefanov, Ed Deprettere
A12.3 Heterogeneous Multiprocessor Implementations for JPEG : A Case StudySeng Lin Shee, Andrea Erdos, Sri Parameswaran
Session A11: Simulation, Optimization, and AccelerationSession chairs: Dongwan
A11.1 Phase Guided Sampling for Efficient Parallel Application SimulationJeffrey Namkung, Igor Kozintsev, Jean-Yves Bouget, Carole Dulong, Rajesh Gupta, Dohyung Kim
A11.2 A Multiprocessing Approach to Accelerate Retargetable and Portable Dynamic-compiled Instruction-set SimulationWei Qin, Joseph D'Errico, Xinping Zhu
A11.3 B2Sim: A Fast Micro-Architecture Simulator Based on Basic Block CharacterizationWonbok Lee, Kimish Patel, Massoud Pedram
CODES
October 24, Tuesday, 14:00 - 16:00
Special session B6: Software Support for Portable StorageSession chair: Sang LyulMin
B6.1 A Superblock-based Flash Translation Layer for NAND Flash MemoryJeong-Uk Kang, HeeseungJo, Jin-Soo Kim, JoonwonLee
B6.2 Energy-Efficient File Placement Techniques for Heterogeneous Mobile Storage SystemsYoung-Jin Kim, Kwon-TaekKwon, Jihong Kim
B6.3 Reliability Mechanisms for File Systems Using Non-Volatile Memory as a Metadata StoreKevin M. Greenan, Ethan L. Miller
Special session B6: Software Support for Portable StorageSession chair: Sang LyulMin
B6.1 A Superblock-based Flash Translation Layer for NAND Flash MemoryJeong-Uk Kang, HeeseungJo, Jin-Soo Kim, JoonwonLee
B6.2 Energy-Efficient File Placement Techniques for Heterogeneous Mobile Storage SystemsYoung-Jin Kim, Kwon-TaekKwon, Jihong Kim
B6.3 Reliability Mechanisms for File Systems Using Non-Volatile Memory as a Metadata StoreKevin M. Greenan, Ethan L. Miller
EMSOFT
Session C6 : Short Presentations with
C6.1 Code Transformation Strategies for Extensible Embedded ProcessorsPaolo Bonzini and Laura Pozzi, University of Lugano, Switzerland
C6.2 Syntax-Driven Implementation of Software Programming Language Control Constructs and Expressions on FPGAsNeil Audsley and Michael Ward, University of York, UK
C6.3 A Dynamic Binary Instrumentation Engine for the ARM ArchitectureKim Hazelwood and ArturKlauser, University of Virginia, USA
C6.4 High-Level Languages for Small Devices: A Case StudyM. Carro, J. Morales, H. Muller, G. Puebla and M. Hermenegildo, Technical U. Madrid, Spain
Presentations with Posters?Session Chair: Soo-MookMoon (Seoul National Univ.)
C6.1 Code Transformation Strategies for Extensible Embedded ProcessorsPaolo Bonzini and Laura Pozzi, University of Lugano, Switzerland
C6.2 Syntax-Driven Implementation of Software Programming Language Control Constructs and Expressions on FPGAsNeil Audsley and Michael Ward, University of York, UK
C6.3 A Dynamic Binary Instrumentation Engine for the ARM ArchitectureKim Hazelwood and ArturKlauser, University of Virginia, USA
C6.4 High-Level Languages for Small Devices: A Case StudyM. Carro, J. Morales, H. Muller, G. Puebla and M. Hermenegildo, Technical U. Madrid, Spain
C6.5 Adaptive Object Code CompressionJohn Gilbert and David M Abrahamson, Trinity College Dublin, IRELAND
C6.6 Limitations of Special Purpose Instructions for Similarity Measurements in Media SIMD ExtensionsAsadollah Shahbahrami, Ben Juurlink and StamatisVassiliadis, Delft University of Technology, Netherlands
C6.7 Entropy-based Low Power Data TLB DesignChinnakrishnan S. Ballapuram, KiranPuttaswamy and Hsien-HsinS. Lee, Georgia Institute of Technology
C6.8 Automatic Optimization of Embedded Applications on an Adaptive SoC ArchitectureCharles R. Hardnett, Krishna V. Palemand Yogesh Chobe, Spelman College
C6.5 Adaptive Object Code CompressionJohn Gilbert and David M Abrahamson, Trinity College Dublin, IRELAND
C6.6 Limitations of Special Purpose Instructions for Similarity Measurements in Media SIMD ExtensionsAsadollah Shahbahrami, Ben Juurlink and StamatisVassiliadis, Delft University of Technology, Netherlands
C6.7 Entropy-based Low Power Data TLB DesignChinnakrishnan S. Ballapuram, KiranPuttaswamy and Hsien-HsinS. Lee, Georgia Institute of Technology
C6.8 Automatic Optimization of Embedded Applications on an Adaptive SoC ArchitectureCharles R. Hardnett, Krishna V. Palemand Yogesh Chobe, Spelman College
Session A12: System-Level Design of MPSoCSession chairs: Alex Orailoglu (UCSD), EuiyoungChung (Yonsei University)
A12.1 Decision-theoretic Exploration of Multi-Processor PlatformsGiovanni Beltrame, Dario Bruschi, Donatella Sciuto, Cristina Silvano
A12.2 Multi-processor System Design with ESPAMHristo Nikolov, TodorStefanov, Ed Deprettere
A12.3 Heterogeneous Multiprocessor Implementations for JPEG : A Case StudySeng Lin Shee, Andrea Erdos, Sri Parameswaran
Session A11: Simulation, Optimization, and AccelerationSession chairsShin (U.C. Irvine), Jaejin Lee(Seoul National University)
A11.1 Phase Guided Sampling for Efficient Parallel Application SimulationJeffrey Namkung, Igor Kozintsev, Jean-Yves Bouget, Carole Dulong, Rajesh Gupta, Dohyung Kim
A11.2 A Multiprocessing Approach to Accelerate Retargetable and Portable Dynamic-compiled Instruction-set SimulationWei Qin, Joseph D'Errico, Xinping Zhu
A11.3 B2Sim: A Fast Micro-Architecture Simulator Based on Basic Block CharacterizationWonbok Lee, Kimish Patel, Massoud Pedram
CASESCODES
October 24, Tuesday, 14:00 - 16:00
C7 : Multithreading and Multiprocessing
C7.1 Extensible Control ArchitecturesGreg Hoover, Timothy Sherwood and Forrest Brewer, University of California, USA
C7.2 High-performance Packet Classification Algorithm for Many-core and Multithreaded Network ProcessorDuo Liu, Bei Hua, XianghuiHu and Xinan Tang, Intel Corp., USA
C7.3 Improving Performance of Shared Helpers in CMPAnahita Shayesteh, Glenn Reinman, Norman JouppiSuleyman Sair and Timothy Sherwood, UCLA, USA
C7.4 A Case Study of Multi-Threading in the Embedded SpaceGreg Hoover, Timothy Sherwood and Forrest Brewer, University of California, USA
Session A14: Architecture ExplorationSession chairs: Cathy Gebotys (University of Waterloo), Sung-Soo Lim(Kookmin University)
A14.1 Application Specific Forwarding Network and Instruction Encoding for Multi-pipe ASIPsSwarnalatha Radhakrishnan, Hui Guo, Sri Parameswaran, Aleksandar Ignjatovic
A14.2 A Bus Architecture for Crosstalk Elimination in High Performance Processor DesignWen-Wen Hsieh, Po-Yuan Chen, TingTing Hwang
A14.3 Yield Prediction for Architecture Exploration in Nanometer Technology Nodes: a Model and Case Study for Memory OrganizationsAntonis Papanikolaou, Thomas Grabner, Miguel Miranda, Philippe Roussel, Francky Catthoor
A14.4 A Unified Hardware/Software Runtime Environment for FPGA-Based Reconfigurable Computers using BORPHHayden Kwok-Hay So, Artem Tkachenko and Robert Brodersen
Session A13: System-Level OptimizationSession chairs: KazutoshiWakabayashi (NEC), Kang Yi (Handong University)
A13.1 Fuzzy Decision Making in Embedded System DesignAlessandro G. Di Nuovo,Maurizio Palesi, Davide Patti
A13.2 Demand Paging for OneNAND Flash eXecute-In-PlaceYongsoo Joo, Yongseok Choi, Chanik Park, Sung WooChung, Eui-Young Chung,Naehyuck Chang
A13.3 Creation and Utilization of a Virtual Platform for Embedded Software Optimization: an Industrial Case StudySungpack Hong, SungjooYoo, Sangwoo Lee, SheayunLee, Bum-Seok Yoo, HyeJeong Nam, DonghyunSong, JaehyunHwang, JanghwanKim, JeongeunKim, HoonSang Jin, Kyu -Myung Choi, Jeong -TaekKong, Soo Kwan Eo
CODES
SessionMultithreading and Multiprocessing Session Chair: Krishna Palem (Georgia Tech.)
ArchitecturesGreg Hoover, Timothy Sherwood and Forrest Brewer, University of California, USA
C7.2 High-performance Packet Classification Algorithm for Many-core and Multithreaded Network ProcessorDuo Liu, Bei Hua, XianghuiHu and Xinan Tang, Intel Corp., USA
C7.3 Improving Performance of Shared Helpers in CMPAnahita Shayesteh, Glenn Reinman, Norman Jouppi,Suleyman Sair and Timothy Sherwood, UCLA, USA
C7.4 A Case Study of Multi-Threading in the Embedded SpaceGreg Hoover, Timothy Sherwood and Forrest Brewer, University of California, USA
Session A14: Architecture ExplorationSession chairs: Cathy Gebotys (University of
A14.1 Application Specific Forwarding Network and Instruction Encoding for Multi-pipe ASIPsSwarnalatha Radhakrishnan, Hui Guo, Sri Parameswaran, Aleksandar Ignjatovic
A14.2 A Bus Architecture for Crosstalk Elimination in High Performance Processor DesignWen-Wen Hsieh, Po-Yuan Chen, TingTing Hwang
A14.3 Yield Prediction for Architecture Exploration in Nanometer Technology Nodes: a Model and Case Study for Memory OrganizationsAntonis Papanikolaou, Thomas Grabner, Miguel Miranda, Philippe Roussel, Francky Catthoor
A14.4 A Unified Hardware/Software Runtime Environment for FPGA-Based Reconfigurable Computers using BORPHHayden Kwok-Hay So, Artem Tkachenko and Robert Brodersen
Session A13: System-Level OptimizationSession chairs: KazutoshiWakabayashi (NEC), Kang Yi (Handong University)
A13.1 Fuzzy Decision Making in Embedded System Design
A13.2 Demand Paging for OneNAND Flash eXecute-In-Place
A13.3 Creation and Utilization of a Virtual Platform for Embedded Software Optimization: an Industrial Case StudySungpack
Jeong
CASESCODES
October 24, Tuesday, 16:00 - 18:00October 24, Tuesday, 16:00 - 18:00
Session B8: Energy Adaptation and OptimisationSession chair: GernotHeiser
B8.1 Energy-Efficient Dynamic Memory Allocators at the Middleware Level of Embedded Systems Stylianos Mamagkakis, David Atienza, Christophe Poucet, Francky Catthoor, Dimitrios Soudris
B8.2 Energy Adaptation for Multimedia Information KiosksRichard Urunuela, Gilles Muller, Julia L. Lawall
B8.3 Compiler-Assisted Leakage Energy Optimization for Clustered VLIW ArchitecturesRahul Nagpal and Y. N. Srikant
Session B7: Compiling and Program TransformationsSession chair: Jaejin Lee
B7.1 Efficient Exception Handling in Java Bytecode-to-C Ahead-of-Time CompilerDong-Heon Jung, JongKukPark, Jaemok Lee, SungHwan Bae, Soo-MookMoon
B7.2 Schedulable Persistence System for Real-Time Applications in Virtual MachineOkehee Goh, Yann-Hang Lee, Ziad Kaakani, Elliott Rachlin
B7.3 Implementing Fault-tolerance in Real-time Systems by Automatic Program TransformationsTolga Ayav, Pascal Fradet, Alain Girault
Session B8: Energy Adaptation and OptimisationSession chair: GernotHeiser
B8.1 Energy-Efficient Dynamic Memory Allocators at the Middleware Level of Embedded Systems Stylianos Mamagkakis, David Atienza, Christophe Poucet, Francky Catthoor, Dimitrios Soudris
B8.2 Energy Adaptation for Multimedia Information KiosksRichard Urunuela, Gilles Muller, Julia L. Lawall
B8.3 Compiler-Assisted Leakage Energy Optimization for Clustered VLIW ArchitecturesRahul Nagpal and Y. N. Srikant
Session B7: Compiling and Program TransformationsSession chair: Jaejin Lee
B7.1 Efficient Exception Handling in Java Bytecode-to-C Ahead-of-Time CompilerDong-Heon Jung, JongKukPark, Jaemok Lee, SungHwan Bae, Soo-MookMoon
B7.2 Schedulable Persistence System for Real-Time Applications in Virtual MachineOkehee Goh, Yann-Hang Lee, Ziad Kaakani, Elliott Rachlin
B7.3 Implementing Fault-tolerance in Real-time Systems by Automatic Program TransformationsTolga Ayav, Pascal Fradet, Alain Girault
EMSOFT
Session B9: Modeling and ValidationSession chair: Thomas A. Henzinger
B9.1 Analysis of the Zeroconf Protocol Using UppaalBiniam Gebremichael, Frits Vaandrager, Miaomiao Zhang
B9.2 Reusable Models for Timing and Liveness Analysis of Middleware for Distributed Real-Time Embedded SystemsVenkita Subramonian, Christopher Gill, Cesar Sanchez, Henny B. Sipma
B9.3 Software Partitioning for Effective Automated Unit TestingArindam Chakrabarti, Patrice Godefroid
Special Session A15: Industry Solutions to Emerging Embedded SystemsSession chairs: Kiyoung Choi (Seoul
A15.1 Cutting across Layers of Abstraction: Removing Obstacles from the Advancement of Embedded SystemsKrisztian Flautner (ARM)
A15.2 Key Technologies for the Next Generation Wireless CommunicationsKyung-Ho Kim (Samsung)
EMSOFTCODES
Session B9: Modeling and ValidationSession chair: Thomas A. Henzinger
B9.1 Analysis of the Zeroconf Protocol Using UppaalBiniam Gebremichael, Frits Vaandrager, Miaomiao Zhang
B9.2 Reusable Models for Timing and Liveness Analysis of Middleware for Distributed Real-Time Embedded SystemsVenkita Subramonian, Christopher Gill, Cesar Sanchez, Henny B. Sipma
B9.3 Software Partitioning for Effective Automated Unit TestingArindam Chakrabarti, Patrice Godefroid
Special Session A15: Industry Solutions to Emerging Embedded SystemsSession chairsNational University)
A15.1 Cutting across Layers of Abstraction: Removing Obstacles from the Advancement of Embedded SystemsKrisztian Flautner (ARM)
A15.2 Key Technologies for the Next Generation Wireless CommunicationsKyung-Ho Kim (Samsung)
EMSOFTCODES
October 25, Wednesday, 10:30 - 12:30 - 12:30
C8 : Low Power
C8.1 Architecture and Circuit Techniques for Low-Throughput, Energy-Constrained Systems Across Technology GenerationsMark Hempstead, Gu-Yeon Wei and David Brooks, Harvard University, USA
C8.2 Methods for Power Optimization in Distributed Embedded Systems with Real-Time RequirementsRazvan Racu, Arne Hamann, Rolf Ernst, Bren Mochocki and Xiaobo Sharon Hu, Technical University of Braunschweig, Germany
C8.3 High-Level Power Analysis for Multi-Core ChipsNoel Eisley, Vassos Soteriou and Li-ShiuanPeh, Princeton University, USA
CASES
SessionSession Chair: Robert Dick (Northwestern Univ.)
C8.1 Architecture and Circuit Techniques for Low-Throughput, Energy-Constrained Systems Across Technology GenerationsMark Hempstead, Gu-Yeon Wei and David Brooks, Harvard University, USA
C8.2 Methods for Power Optimization in Distributed Embedded Systems with Real-Time RequirementsRazvan Racu, Arne Hamann, Rolf Ernst, Bren Mochocki and Xiaobo Sharon Hu, Technical University of Braunschweig, Germany
C8.3 High-Level Power Analysis for Multi-Core ChipsNoel Eisley, Vassos Soteriou and Li-ShiuanPeh, Princeton University, USA
CASES
Session B11: Architectures and Performance AnalysisSession chair: Stewart Tansley
B11.1 New approach to Architectural Synthesis: Incorporating QoSconstraintHarsh Dhand, BasantDwivedi, M. Balakrishnan
B11.2 Formal Performance Evaluation of AMBA-based System-on-Chip DesignsGabor Madl, Qiang Zhu, Sudeep Pasricha, Luis Angel D. Bathen, Nikil Dutt
B11.3 Scratchpad Memory Management for Portable Systems with a Memory Management UnitBernhard Egger, Jaejin Lee, Heonshik Shin
Session B10: Scheduling and Execution Time AnalysisSession chair: P. S. Thiagarajan
B10.1 Incremental Schedulability Analysis of Hierarchical Real-Time ComponentsArvind Easwaran, Insik Shin, Oleg Sokolsky, Insup Lee
B10.2 Scheduling for Multi-Threaded Real-time Programs via Path PlanningThao Dang, Philippe Gerner
B10.3 Modeling a System Controller for Timing AnalysisStephan Thesing
C9 : Robustness
C9.1 Integrated Scratchpad Memory Optimization and Task Scheduling for MPSoCArchitecturesVivy Suhendra, Chandrashekar Raghavanand Tulika Mitra, National University of Singapore, Singapore
C9.2 Mitigating Soft Error Failures for Multimedia Applications by Selective Data ProtectionKyoungwoo Lee, AviralShrivastava, Ilya Issenin, Nikil Dutt and NaliniVenkatasubramanian, UC Irvine, USA
C9.3 Cost-Efficient Soft Error Protection for Embedded MicroprocessorsJason A. Blome, ShantanuGupta, Shuguang Feng, Scott Mahlke and Daryl Bradley, University of Michigan, USA
Session A17: Communication Synthesis and Analysis for MPSoCSession chairs: SungjooYoo (Samsung), TadaakiTanimoto (RenesasTechnology Corp.)
A17.1 Integrated Analysis of Communicating Tasks in MPSoCsSimon Schliecker, Matthias Ivers, Rolf Ernst
A17.2 Data Reuse Driven Energy-Aware MPSoC Co-Synthesis of Memory and Communication Architecture for Streaming ApplicationsIlya Issenin, Nikil Dutt
A17.3 System-Level Power-Performance Trade-Offs in Bus Matrix Communication Architecture SynthesisSudeep Pasricha, Young-Hwan Park, Fadi Kurdahi, Nikil Dutt
Session A16: Synthesis Techniques for AcceleratorsSession chairs: Sri Parameswaran (U. South Wales), Tohru Ishihara (Kyushu University)
A16.1 Streamroller: Automatic Synthesis of Prescribed Throughput Accelerator PipelinesManjunath Kudlur, Kevin Fan, and Scott Mahlke
A16.2 Increasing Hardware Efficiency with Multifunction Loop AcceleratorsKevin Fan, ManjunathKudlur, Hyunchul Park, Scott Mahlke
A16.3 Generic NetlistRepresentation for System and PE Level Design ExplorationBita Gorjiara, MehrdadReshadi, PramodChandraiah, Daniel Gajski
CODES
Session B11: Architectures and Performance AnalysisSession chair: Stewart Tansley
B11.1 New approach to Architectural Synthesis: Incorporating QoSconstraintHarsh Dhand, BasantDwivedi, M. Balakrishnan
B11.2 Formal Performance Evaluation of AMBA-based System-on-Chip DesignsGabor Madl, Qiang Zhu, Sudeep Pasricha, Luis Angel D. Bathen, Nikil Dutt
B11.3 Scratchpad Memory Management for Portable Systems with a Memory Management UnitBernhard Egger, Jaejin Lee, Heonshik Shin
Session B10: Scheduling and Execution Time AnalysisSession chair: P. S. Thiagarajan
B10.1 Incremental Schedulability Analysis of Hierarchical Real-Time ComponentsArvind Easwaran, Insik Shin, Oleg Sokolsky, Insup Lee
B10.2 Scheduling for Multi-Threaded Real-time Programs via Path PlanningThao Dang, Philippe Gerner
B10.3 Modeling a System Controller for Timing AnalysisStephan Thesing
EMSOFT
SessionSession Chair: Ki-Seok Chung (Hanyang Univ.)
C9.1 Integrated Scratchpad Memory Optimization and Task Scheduling for MPSoCArchitecturesVivy Suhendra, Chandrashekar Raghavanand Tulika Mitra, National University of Singapore, Singapore
C9.2 Mitigating Soft Error Failures for Multimedia Applications by Selective Data ProtectionKyoungwoo Lee, AviralShrivastava, Ilya Issenin, Nikil Dutt and NaliniVenkatasubramanian, UC Irvine, USA
C9.3 Cost-Efficient Soft Error Protection for Embedded MicroprocessorsJason A. Blome, ShantanuGupta, Shuguang Feng, Scott Mahlke and Daryl Bradley, University of Michigan, USA
Session A17: Communication Synthesis and Analysis for MPSoCSession chairs: SungjooYoo (Samsung), TadaakiTanimoto (RenesasTechnology Corp.)
A17.1 Integrated Analysis of Communicating Tasks in MPSoCsSimon Schliecker, Matthias Ivers, Rolf Ernst
A17.2 Data Reuse Driven Energy-Aware MPSoC Co-Synthesis of Memory and Communication Architecture for Streaming ApplicationsIlya Issenin, Nikil Dutt
A17.3 System-Level Power-Performance Trade-Offs in Bus Matrix Communication Architecture SynthesisSudeep Pasricha, Young-Hwan Park, Fadi Kurdahi, Nikil Dutt
Session A16: Synthesis Techniques for AcceleratorsSession chairs: Sri Parameswaran (U. South Wales), Tohru Ishihara (Kyushu University)
A16.1 Streamroller: Automatic Synthesis of Prescribed Throughput Accelerator PipelinesManjunath Kudlur, Kevin Fan, and Scott Mahlke
A16.2 Increasing Hardware Efficiency with Multifunction Loop AcceleratorsKevin Fan, ManjunathKudlur, Hyunchul Park, Scott Mahlke
A16.3 Generic NetlistRepresentation for
Bita Gorjiara, MehrdadReshadi, PramodChandraiah, Daniel Gajski
CASESCODES
October 25, Wednesday, 13:30 - 15:30October 25, Wednesday, 13:30 - 15:30
Crystal Ballroom1
Crystal Ballroom2
Crystal Ballroom3
(poster room)
Emerald
Pearl Ruby Jade Topaz
Conference floor layout
Practiceroom