final design review fsae instrumentation ryan gunn john lee dan van winkle ali yilmaz
TRANSCRIPT
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Final Design ReviewFSAE Instrumentation
Ryan GunnJohn LeeDan Van WinkleAli Yilmaz
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Formula SAE
Intercollegiate competitionNew car every yearCars designed for non-professional auto
cross racerOver 120 international teams
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Operational Concept
Real time data capturePost ProcessingData analysis and reduction
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Sensors
Shock Position SensorsSteering Position SensorAccelerometerWheel Speed SensorsOil Pressure SensorBrake Pressure SensorThermal Sensors
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LF Wheel Speed
LF Shock Position
RF Wheel Speed
RF Shock Position
Engine Tach
Front Power and Signal
Conditioning Box
cRio
Rear Power and Signal
Conditioning Box
Unregulated 12V
RR Wheel Speed
RR Shock Position
LR Wheel Speed
LR Shock Position
Radiator Temperature
In
Oil Pressure
Break Pressure
Radiator Temperature
Out
Common
Steering Position
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Front Sensors
LF Wheel Speed
LF Shock Position
RF Wheel Speed
RF Shock Position
Engine Tach
Front Power and Signal
Conditioning Box
cRio Unregulated 12V Common
Steering Position
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Rear Sensors
cRio
Rear Power and Signal
Conditioning Box
Unregulated 12V
RR Wheel Speed
RR Shock Position
LR Wheel Speed
LR Shock Position
Radiator Temperature
In
Oil Pressure
Break Pressure
Radiator Temperature
Out
Common
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Wheel Speed Sensors
Hall Effect SensorWheel SlipSpeed
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Shock Position
Rotary Potentiometers
Shock lengthLoad on wheels
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Pressure Transducers
Oil Pressure Design has been
questioned previously in competition
Brake Pressure Driver’s use of
brakes
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Additional Sensors
Engine Tach Measured directly
from coil Square wave
Accelerometer 3 axis acceleration
Steering Position
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Thermocouples
Heat exchange efficiency of radiator
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PCB
Various power and signal conditioning circuits
Needed to be ruggedizedNeeded to be documentedNeeded easy to use software
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Pspice Schematics
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Pspice AC Sweep (cont)
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Engine Tachometer
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Front PCB Layout
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Front Annotated
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Front PCB Installed
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Rear PCB Layout
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Rear Annotated
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Rear PCB installed
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Parts ListPart Digikey # Manufacturer Manufacturer # Qty
Cost per unit
Cost per part
0.1 μf BC1148TR-ND Vishay K104Z15Y5VE5TL2 2 $0.07 $0.13
0.15 μf BC1079TR-ND Vishay K153K15X7RF5TL2 1 $0.02 $0.02
0.22 μf BC1112TR-ND Vishay K223K15X7RH5TL2 2 $0.15 $0.30
1 μf BC1151TR-ND Vishay K105Z20Y5VE5TL2 3 $0.18 $0.53
10 μf 718-1212-ND Vishay 199D106X9010B1V1E3 5 $0.95 $4.75
100 μf 199D104X9035A2V1E3-ND Vishay 199D104X9035A2V1E3 10 $0.21 $2.10
2.6V regulator 296-11117-5-ND Texas Instrument UA78L02ACLP 1 $0.40 $0.40
10V regulator KA78L10AZTA-ND Fairchild KA78L10AZTA 4 $0.10 $0.38
3 pin terminal 277-1274-ND Pheonix Contact 1725669 1 $1.81 $1.81
6 pin OSTVN06A150-ND Pheonix Contact OSTVN06A150 12 $0.71 $8.50
2 pin terminal 277-1247-ND Pheonix Contact 1729128 3 $0.83 $2.49
10K Resistor RC1/410KKR-ND Stackpole RC 1/4 10K 10% R 6 $0.12 $0.73
220 Resistor RC1/4220JR-ND Stackpole RC 1/4 220 5% R 2 $0.13 $0.26
680 Resistor RC1/4680KR-ND Stackpole RC 1/4 680 10% R 2 $0.12 $0.24
1k Reistor RC1/41KKR-ND Stackpole RC 1/4 1K 10% R 3 $0.12 $0.37
20K Resistor RC1/420KJR-ND Stackpole RC 1/4 20K 5% R 1 $0.13 $0.13
Amp AD8620AR-ND Analog Devices AD8620AR 1 $15.51 $15.51
Diode 1N5240BFSTR-ND Fairchild 1N5240BTR 1 $0.08 $0.08
Switch EG1889-ND E-Switch RR3130ABLKBLKFS 1 $3.48 $3.48
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Software Requirements
Debug existing software
Improve functionality
Write documentation
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Software Improvements
Boot fileSwitchTimestampUSB StorageNo intermediate step
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Software Improvements - Boot File
The logging program will be loaded in the memory on startup
No need to connect a computer to start logging
Faster and easier use of the system
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Software Improvements - Switch
Added functionality to turn it on/off with a switch
The switch will stop logging when the run is done
It will start logging again with a new log file
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Software Improvements - Timestamp
Log files were named cRIO_Log.datAdded functionality to create a different
filename for every runFilename includes date and timeEasier to identify filesNo risk of overwriting old log files
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Software Improvements – USB Storage
Added functionality to store files on a USB drive
Not limited to 128 MB on the cRIOCan support up to 4 GBEasier to transfer files to the computer
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Software Improvements – No Intermediate Step
Got rid of intermediate step in reading log files
Used to have two programsOne to convert binary files to measurement
filesOne to read the measurement files
Combined the two into one programEasier to read the log files
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Data Flow
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Data Flow
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Data Flow (FPGA)
“FPGA – Buffered DAQ with DMA.vi”Set up analog and digital channels for
acquisitionRead in data from input channels
Store in AI data cluster data structure (Real Time)
Store in DMA FIFO data structure (Logging)
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Data Flow
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Data Flow (cRIO)
“RT – Logging & RT.vi”Open FPGA reference from previous stepReal Time
Read in AI data cluster data structureSplit clusters into component signalsPerform calculations on raw data from
sensorsDisplay data to the end user
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Data Flow (cRIO) (cont’d)
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Data Flow
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Data Flow (cRIO) (cont’d)
Logging:Calibration of channels stored on cRIOCalibrate channels .xml fileRead in FIFO data structure .dat file
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Data Flow (cRIO) (cont’d)
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Data Flow
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Data Flow (PC)
“Windows – Read LVM file.vi” Option to convert binary data files to .lvm file Open .lvm file Split signals from .lvm file to component
waveforms Perform calculations on raw waveforms from
sensors Display data to the end user
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Data Flow (PC) (cont’d)
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Recommendations
Digital signal processingImprove modularityAdditional power sourceCode simplification for improvement of
real-time data streamPost run statistic breakdown