figure$3.21:$ stack$frame$ structure.$bren/cs304au17/practices/practice... · 54$ 4$ pushl$%esp$...

CS304&Practice&Problems& &&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&28&|&P a g e &&&

&

&

Figure$3.21:$Stack$frame$structure.$


&

Setting the following flags for the result of an operation: CF (carry) – unsigned overflow; unsigned ADD: t = a + b, t cannot fit in w-bit, carry-out = 1 unsigned SUB: t = a – b, a < b, borrow = 1 OF (overflow) – signed overflow; carry-in != carry-out P + P = N; or N + N = P SF (signed) - negative; MSB = 1 ZF (zero) - zero; all bits = 0

Directions$! $ADD$each$pair$of$numbers$being$sure$to$specify$each$bit$for$the$carry$as$well$as$the$result$

$ADD$ CCFlags$ SUBTRACT/CMP$ CCFlags$

carry$ 01110&0100& ZF:&0& 11111&1100& ZF:&0&7A$ &&0111&1010& SF:&1& &&0111&1010& SF:&0&52$ &&0101&0010& CF:&0& &&1010&1110& CF:&0&result$ 01100&1100& OF:&1& &&0010&1000& OF:&0&$$ $$ $$ $$ $$carry$ 00000&0100& ZF:&0& 00001&1100& ZF:&0&2A$ &&0010&1010& SF:&0& &&0010&1010& SF:&1&52$ &&0101&0010& CF:&0& &&1010&1110& CF:&1&result$ 00111&1100& OF:&0& &&1001&1000& OF:&0&$$ $$ $$ $$ $$carry$ 10001&0000& ZF:&0& 11111&1000& ZF:&0&AC$ &&1010&1100& SF:&0& &&1010&1100& SF:&0&8A$ &&1000&1010& CF:&1& &&0111&0110& CF:&0&result$ 10011&0110& OF:&1& &&0010&0010& OF:&0&$$ $$ $$ $$ $$carry$ 11100&0000& ZF:&0& 10001&1000& ZF:&0&AC$ &&1010&1100& SF:&0& &&1010&1100& SF:&0&72$ &&0111&0010& CF:&1& &&1000&1110& CF:&0&result$ 10001&1110& OF:&0& &&0011&1010& OF:&0&


&

&&

unparse_symbol:&& pushl& %ebp&& movl& %esp,&%ebp&& movl& 8(%ebp),&%eax&& cmpl& $5,&%eax&& ja& .L2&& jmp& *.L9(,%eax,4)&& .section& .rodata&& .align&4&& .align&4&.L9:&& .long& .L3&& .long& .L4&& .long& .L5&& .long& .L6&& .long& .L7&& .long& .L8&& .text&.L4:&& movl& $42,&%eax&& jmp& .L1&.L5:&& movl& $45,&%eax&& jmp& .L1&.L6:&& movl& $47,&%eax&& jmp& .L1&.L7:&& movl& $37,&%eax&& jmp& .L1&.L8:&& movl& $63,&%eax&& jmp& .L1&.L2:&& jmp& .L1&.L3:&& movl& $43,&%eax&.L1:&& popl& %ebp&& ret&

Disassembly&of&section&.text:&00000000&<unparse_symbol>:&&&&0:& 55&&&&&&&&&&&&&&&&&&&& & push&&&%ebp&&&&1:& 89&e5&&&&&&&&&&&&&&&&& & mov&&&&%esp,%ebp&&&&3:& 8b&45&08&&&&&&&&&&&&&&& mov&&&&0x8(%ebp),%eax&&&&6:& 83&f8&05&&&&&&&&&&&&&& & cmp&&&&$0x5,%eax&&&&9:& 77&2a&&&&&&&&&&&&&&&&& & ja&&&&&35&<unparse_symbol+0x35>&&&&b:& ff&24&85&00&00&00&00&& jmp&&&&*0x0(,%eax,4)&&&12:& b8&2a&00&00&00&&&&&&&& mov&&&&$0x2a,%eax&&&17:& eb&23&&&&&&&&&&&&&&&&& & jmp&&&&3c&<unparse_symbol+0x3c>&&&19:& b8&2d&00&00&00&&&&&&&& mov&&&&$0x2d,%eax&&&1e:& eb&1c&&&&&&&&&&&&&&&&& & jmp&&&&3c&<unparse_symbol+0x3c>&&&20:& b8&2f&00&00&00&&&&&&&& mov&&&&$0x2f,%eax&&&25:& eb&15&&&&&&&&&&&&&&&&& & jmp&&&&3c&<unparse_symbol+0x3c>&&&27:& b8&25&00&00&00&&&&&&&& mov&&&&$0x25,%eax&&&2c:& eb&0e&&&&&&&&&&&&&&&&& & jmp&&&&3c&<unparse_symbol+0x3c>&&&2e:& b8&3f&00&00&00&&&&&&&& mov&&&&$0x3f,%eax&&&33:& eb&07&&&&&&&&&&&&&&&&& & jmp&&&&3c&<unparse_symbol+0x3c>&&&35:& eb&05&&&&&&&&&&&&&&&&& & jmp&&&&3c&<unparse_symbol+0x3c>&&&37:& b8&2b&00&00&00&&&&&&&& mov&&&&$0x2b,%eax&&&3c:& 5d&&&&&&&&&&&&&&&&&&&& & pop&&&&%ebp&&&3d:& c3&&&&&&&&&&&&&&&&&&&& & ret&&&&

Reminder:&enum&values&have&consecutive&&integer&values&starting&with&0&

JUMP$TABLE$

What&value&is&returned&when&“op”&is&invalid?&Register&%eax&set&to&“op”&at&beginning&of&procedure&This&becomes&the&returned&value&


&

opcode$register$

ID$ instruction$50$ 0$ pushl$%eax$51$ 1$ pushl$%ecx$52$ 2$ pushl$%edx$53$ 3$ pushl$%ebx$54$ 4$ pushl$%esp$55$ 5$ pushl$%ebp$56$ 6$ pushl$%esi$57$ 7$ pushl$%edi$58$ 0$ popl$%eax$59$ 1$ popl$%ecx$5A$ 2$ popl$%edx$5B$ 3$ popl$%ebx$5C$ 4$ popl$%esp$5D$ 5$ popl$%ebp$5E$ 6$ popl$%esi$5F$ 7$ popl$%edi$

&

&

"&PUSH/POP&opcodes&

&&&&&&&PUSH&=&50&+&regoid&

&&&&&&&&POP&=&58&+&regoid&

MOV&–&Move&opcodes&NOTICE&description&

# mov&D,S&


&

All#IAo32#instruction#encodings)are)subsets)of)the)general)instruction)format)shown)below,)in)the)given)order&

Instructions*consist*of:*& optional(instruction(prefixes((in(any(order)& 1o3"opcode"bytes"–!determines)the)action)of)the)statement& an#addressingoform%specifier%(if%required)%consisting%of:%&

$ the$ModR/M$byte$$o!addressing)modes)register/memory&$ sometimes'the'SIB'(ScaleoIndexoBase)&byte&$ a"displacement"(if"required)&$ an#immediate#data#field#(if#required).&

&

&

Mod=00,& First&operand&a&register,&specified&by&Reg&#& Second&operand&in&memory;&address&stored&in&a&register&numbered&by&R/M.&&

$ That&is,&Memory[Reg[R/M]]& Exceptions:&&

$ R/M=100&(SP):&SIB&needed&$ R/M=101&(BP):&disp32&needed&

Mod=01,&same&as&Mod&00&with&8obit&displacement.& Second&operand:&Memory[disp8+Reg[R/M].& Exception:&SIB&needed&when&R/M=100&&

Mod=10,&same&as&Mod&01&with&32obit&displacement& Mod=11&&

Second&operand&is&also&a&register,&numbered&by&R/M.& Do&not&confuse&displacement&width&with&data&width.&

Data&width&is&specified&by&the&opcode.& For&example,&the&use&of&disp8&does&not&imply&8obit&data.&

***%For%some%opcodes,%the%reg#%is%used%as%an%extension%of%the%opcode.$ Specify&how&a&memory&address&is&calculated& Address&=&Reg[base]&+&Reg[Index]&*&2scale& Exceptions:&

SP&cannot&be&an&index,&and& BP&cannot&be&a&base.&

$ $

&

&


&

$

$$$$

$

$$$$$

00000000$<arith>:$ $$ Op$

code$ ModR/M$ SIB$Displace$ment$

Imme$diate$

0:$$55$$$ push$$$%ebp$$ 55$ $$ $$ $$ $$

1:$$89$e5$$ mov$$$$%esp,%ebp$ 89$ 11$100$101$ $$ $$ $$

3:$$8b$4d$08$ mov$$$$0x8(%ebp),%ecx$ 8b$ 01$001$101$ $$ 0000$1000$ $$

6:$$8b$55$0c$$ mov$$$$0xc(%ebp),%edx$ 8b$ 01$010$101$ $$ 0000$1100$ $$

9:$$8d$04$52$$ lea$$$$(%edx,%edx,2),%eax$ 8d$ 00$000$100$ 01$010$010$ $$ $$

c:$$c1$e0$04$$ shl$$$$$0x4,%eax$ c1$ 11$100$000$ $$$ 0000$$$$$$$$$$$$$$$$$$$$$$$$$$$$

0100$f:$$$8d$44$01$04$ lea$$$$0x4(%ecx,%eax,1),%eax$ 8d$ 01$000$100$ 00$000$001$ 0000$0100$ $$

13:$01$ca$$ add$$$$%ecx,%edx$ 01$ 11$001$010$ $$ $$ $$

15:$03$55$10$$ add$$$$0x10(%ebp),%edx$ 03$ 01$010$101$ $$ 0001$0000$ $$

18:$0f$af$c2$ imul$$$%edx,%eax$ 0f$af$ 11$000$010$ $ $$ $$

1b:$5d$$ pop$$$$%ebp$ 5d$ $$ $$ $$ $$

1c:$c3$$ ret$ c3$ $$ $$ $$ $$

Pg&420&LEA&


&

$$$

$$$

Pg&741&SHIFT&operations&


&

$$

$$$$

$& &

Pg&366&IMUL&

Pg&60&ADD&


&

Jcc&–&Jump&if&Condition&is&Met&

&


&

&

& &

figure$3.21:$ stack$frame$ structure.$bren/cs304au17/practices/practice... · 54$ 4$ pushl$%esp$...

Documents