feedback on nanosecond timescales (font) - review of feedback prototype tests at atf(kek) glenn...
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Feedback on Nanosecond Timescales (FONT)
- Review of Feedback Prototype Tests at ATF(KEK)
Glenn Christian
John Adams Institute, Oxford
for FONT collaboration
Glenn Christian - LC-ABD 24/09/07 2
ILC IP Feedback system - concept
• Fast beam-based feedback system essential for the ILC interaction point to compensate for relative beam misalignment.
• Measure vertical position of outgoing beam and hence beam-beam kick angle
• Use fast amplifier and kicker to correct vertical position of beam incoming to IR
• Delay loop necessary to maintain the correction for subsequent bunches in the train
Last line of defence against relative beam misalignment
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Previous Feedback Prototypes
• Originally FONT technology demonstrator for ultra-fast feedback, driven by challenge of ‘warm’ machine (192 x 1.4 ns) – very low latency system (analogue only)
• FONT@NLCTA – 2001-4, 65 MeV beam, 170 ns train length, 87 ps bunch spacing– FONT1 – latency 67 ns– FONT2 – latency 54 ns
• FONT3@ATF - 2004-5, 1.3 GeV beam, 56 ns train length, 2.8 ns bunch spacing– take advantage of ~ GeV beam (1 micron @ 1GeV -> 1 nm @ 1TeV)– latency aim: 20 ns (observe two and a bit periods), 23 ns achieved
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FONT1,2,3: Summary67 ns
54 ns
23 ns
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Current/Future Feedback Prototypes
• ‘Cold’-machine bunch parameters allow digital signal processing techniques:– support implementation of algorithms for greater luminosity recovery– easier inter-connectivity of processors – angle feedback?– integration of other systems – upstream feedbacks, feed-forward, lumi-
monitor etc.• FONT4@ATF 2005-present, 1-bunch/3-train mode, ~140ns -
~154 ns bunch spacing– demonstrator for digital feedback system with ILC-like bunch spacing– Latency target: < bunch spacing (~140 ns)
• Later,– ATF2 – aim to stabilise third bunch @ micron level– (FONT5 ?) 20 – 60 bunches @ 150 – 300 ns spacing (future extraction
scheme)
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FONT4 system overview
KICKERBPM 11BPM 13 BPM 12
AMPAnalog FE Analog FE Analog FE
Witness BPMs
Digital processor
Feedback BPM
Machinetimingsystem
Scopes
∑
∆
BEAM
clks, triggers
LO
DAQ
I/O, digital DAQ
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Analogue BPM processor
Resolution c. 3-5 umLatency c. 10 ns
old new
Output pulse width c. 5 ns
Tested @ ATF November 2006
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Digital Board
2 x Analog Input channels (single-ended)
2 x Analog Output channels (differential or single-ended)
4 x General-purpose digital outputs
3 x external clock/trigger inputs
Xilinx Virtex4 FPGA
Analog Devices ADC/DACs (14-bit)
40 MHz oscillator
RS232 serial port
JTAG port PROM
GP I/O Header
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Kicker Drive Amplifier
• New design for “universal” FONT amplifier– Designed to have flexibility to
meet future requirements – Design for 10 us operation with
40 ns settling time to 90%, rep rate up to 10 Hz
– Output current up to +/- 30 A (kicker shorted), +/- 15 A (50-ohm termination)
– Manufactured by TMD Technologies
– Two units delivered 1 December 2006
• Tested at ATF Dec 2006
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FONT4 installation at ATF (May 2007)
BPM processor boardAmplifier FEATHERKicker
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Recent tests at ATF (May 2007)
• Objectives:– Demonstrate closed-loop feedback with full version of firmware– Demonstrate acceptable latency– Optimise feedback gain
• Two versions of firmware:– Without charge normalisation
• Gain set in software and given as a virtual-input to FPGA in real-time• 5 clock cycles @357 MHz (expected latency ~140 ns)
– With real-time charge normalisation• Used a partial reconfiguration technique to recompute LUTs to optimise gain
setting• 8 clock cycles @357 MHz (expected latency ~148 ns)
– Evaluate the effect of normalisation
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Latency without charge normalisation (154ns bunch spacing)
~15 ns slack to 90% of full kick
Latency ~140 ns
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Feedback results – no real-time charge normalisation(average over 11 pulses)
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Feedback results with charge normalisation (average over 11 pulses)
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Further Development - FONT4
• FONT4 so far concerned with solving technical challenges in getting the closed-loop feedback working. Now, concentrate on quality measurements
• Reduce the processor resolution – FOM for system, system resolution– Limited by phase jitter in LO (~ 5 degrees) – Reduce the sensitivity to the LO jitter by balancing the signal levels and better
matching of input lengths to the analogue processor – tune the difference signal to zero in the working region of the system
• Understand statistical nature of the jitter – correlations?– Requires an integrated, online DAQ system to acquire large data sets and
analyse the data in real-time – Step towards making the feedback system ‘turn-key’ at ATF2
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Further Developments – ATF2
• Goals/Plans for ATF2:– Resolution 1 micron or less
• Need to investigate methods to further improve processor resolution
– Defining BPM and kicker locations in beamline and simulate feedback performance
• Position and angle feedback in both planes (x,x’,y,y’)?
– For position feedback only, could use existing FONT4 processor, but for angle feedback latency increased by physical distance between BPMs, as well as extra clock cycles needed in the processing
• New digital board design – two channel, faster ADCs, Virtex-5 FPGA with RocketIO (fast digital interconnects)
– Feed-forward and constant-energy extraction (Kalinin)• Same kickers as feedback• Hardware tests at ATF
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Summary
• Completed FONT3 analogue feedback – achieved latency 23 ns
• Developed FONT4 digital feedback system– New hardware developed and tested at ATF – analogue and digital
processors, amplifier – Demonstrated closed loop feedback at ATF with 3 bunches ~150ns
spacing with digital feedback processor – Optimised gain with and without real-time charge normalisation in the
system– System latency ~140ns (~148ns with real-time Q-normalisation)
• Ongoing programme to further develop system and prepare to employ system at ATF2