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  • 7/31/2019 Fager PASymposium09 Final

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    GigaHertz Centre

    CENTRE

    Ev a lua t ion o f H igh Ef f i ciency PAs fo r u se in- -

    r s an ager, osse n as a ema ,Ulf Gustavsson, ,*Rik Jos, and Herbert Zirath

    Chalmers University of Technology, Sweden,

    Ericsson, Sweden,* NXP Semiconductors, Netherlands

    [email protected]

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    Out ine

    PA efficiency for modulated signals

    Efficiency enhancement techniques

    General polar architectures

    Static polar characterization of LDMOS class D-1 PA

    Load modulation transmitters Load impedance tuning

    Static load modulation characterization of LDMOS class D-1 PA

    Optimum operation for maximized efficiency

    Summary and conclusions Summar of efficienc redictions with modulated si nal statistics Comparison between supply- and load modulation results

    Conclusions

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    Out ine

    PA efficiency for modulated signals

    Efficiency enhancement techniques

    General polar architectures

    Static polar characterization of LDMOS class D-1 PA

    Dynamic load modulation transmitter Load impedance tuning

    Static load modulation characterization of LDMOS class D-1 PA

    Optimum operation for maximized efficiency

    Summary and conclusions Summar of efficienc redictions with modulated si nal statistics Comparison between supply- and load modulation results

    Conclusions

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    PA e iciency or mo u ate signa s

    Overall efficiency is maximized by minimizing the dissipatedpower, P

    diss

    =

    Average PAE is determined by the probability: p(Pou t)Pdiss To im rove efficienc PAE must be increased at intermediate P where

    diss out in

    42009-01-19 Power Amplifier Symposium 2009

    the signal spends most of its time

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    PA e iciency or mo u ate signa s

    Different efficiency enhancement techniques have beenproposed Dynam ic supp ly m odu la t ion ( EER / enve lope t rack ing / hyb r id EER)

    Dynam ic load m odu la t ion

    Outphasing (Chireix / LINC)

    Doherty

    52009-01-19 Power Amplifier Symposium 2009

    u se-w mo u a on - , an pass ...

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    Out ine

    PA efficiency for modulated signals

    Efficiency enhancement techniques

    General polar architectures

    Static polar characterization of LDMOS class D-1 PA

    Load modulation transmitter Load impedance tuning

    Static load modulation characterization of LDMOS class D-1 PA

    Optimum operation for maximized efficiency

    Summary and conclusions Summar of efficienc redictions with modulated si nal statistics Comparison between supply- and load modulation results

    Conclusions

    62009-01-19 Power Amplifier Symposium 2009

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    Dynamic supp y mo u ation princip e

    decreased for lower power levels

    Different techniques can be defined depending on how the RFin ut ower and V are ointl controlled...

    72009-01-19 Power Amplifier Symposium 2009

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    modulation

    PA supply voltage is alwayssufficiently high

    Out ut ower is controlled binput signal, i.e. PA in linear mode

    Pre-distortion of the RF inputonly, like in ordinary PA

    Envelope elimination and restoration (EER) Output power is controlled

    only by the PA supply voltage

    PA operated in saturation

    PA operation

    Time alignment betweensupply voltage and RF signal

    82009-01-19 Power Amplifier Symposium 2009

    cr ca

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    Genera po ar transmitter arc itecture

    all power levels EER: Lower efficiency at low output power

    Hybrid EER is considered PAE can be maximized for all power levels by simultaneous control of both RF

    in ut ower and su l volta e

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    Measurement examp e: LDMOS c ass D-

    PA ou t . in dd

    ( ),, out in dd inP P V PPAE P V =

    -1

    ,dc in dd P V

    Devices: 2Freescale MRF282

    Performance summary =

    Pou t = 20W

    PAEMAX

    = 70%

    Gain = 15 dB

    Bandwidth (PAE>50%): 90 MHz

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    Static po ar c aracterization resu tsNumbered contours represent output power levels in dBm

    Efficiency and output power have mutual dependence on inputpower and supply voltage The V and combination that maximizes efficienc can be determined

    112009-01-19 Power Amplifier Symposium 2009

    for every given Pout

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    class D-1 PASimulated results with W-CDMA input signal statistics

    O timal drive

    D r i v e c ond i t i on

    PA ( % )

    PAPR

    10 . 3 dB

    PAPR

    6. 6 dB

    Traditional PATraditional (Vdd fixed) 24% 36%

    EER (Pin fixed) 37% 48%

    Optimum Pin/Vdd drive 53% 60%

    EER

    ( )out out out PA

    P p P dP

    =

    Pinand Vddare independent parameters in the figurein out out dc out out p p +

    Simultaneous Pin and Vdd control can give a substantialefficiency improvement for the presented LDMOS class D-1 PA

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    Out ine

    PA efficiency for modulated signals

    Efficiency enhancement techniques

    General polar architectures

    Static polar characterization of LDMOS class D-1 PA

    Load modulation transmitter Load impedance tuning

    Static load modulation characterization of LDMOS class D-1 PA

    Optimum operation for maximized efficiency

    Summary and conclusions Summar of efficienc redictions with modulated si nal statistics Comparison between supply- and load modulation results

    Conclusions

    132009-01-19 Power Amplifier Symposium 2009

    Gi H t C t

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    Dynamic oa mo u ation princip e

    increased at low power Average dc current is decreased, while maintaining full voltage swing

    Desired load impedance variations can be generated actively

    142009-01-19 Power Amplifier Symposium 2009

    . .

    or using a reconfigurable load network...

    Gi H t C t

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    Dynamic oa mo u ation arc itecture

    PA load network

    Varactors typically used as tuneable elements

    Breakdown voltage > 100V ow ser es res s ance, arge un ng range

    Simple and efficient electronics can be used for the control No need for high power dc converters etc.

    152009-01-19 Power Amplifier Symposium 2009

    o en a y w e an mo u a on

    GigaHertz Centre

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    Static oa mo u ation measurements-

    load impedance

    ou t . in L

    ( ) ( ),, out in L inPA in L P P PPAE P =

    Similar type of characterization as the supply modulation case

    ,dc in L

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    Measure optimum oa impe ance ocus

    Load impedance points tested

    e L an in com na on a max m zes e c ency can edetermined for every given Pout At max output power, efficiency is maximized for 50

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    g er mpe ance s es re a re uce ou pu power

    GigaHertz Centre

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    LDMOS class D-1 PAin L

    Simulated results with W-CDMA input signal statistics

    Variable Pin and LVariable Pin and L = 0

    Optimized Pin and L

    D r i v e c ond i t i on

    PA %

    PAPR10 . 3 dB

    PAPR6. 6 dB

    Traditional (ZL = 50 ) 24% 36%

    Optimal drive

    Optimum Pin

    /L

    drive 43% 57%L =

    mu aneous in an L con ro can a so g ve a s gn canefficiency improvement even with an existing PA Design of tunable matching networks for high power applications is still a

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    Out ine

    PA efficiency for modulated signals

    Efficiency enhancement techniques

    General polar architectures

    Static polar characterization of LDMOS class D-1 PA

    Load modulation transmitter Load impedance tuning

    Static load modulation characterization of LDMOS class D-1 PA

    Optimum operation for maximized efficiency

    Summary and conclusions Summar of efficienc redictions with modulated si nal statistics

    Comparison between supply- and load modulation results

    Conclusions

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    GigaHertz Centre

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    characterization for LDMOS class D-1 PA

    Summary of efficiency predictions with WCDMA signal statistics

    PAPR = 10.3 dB PAPR = 6.6 dB

    y[%]

    PA peak efficiency

    y[%]

    PA peak efficiency

    erageeffic

    ien

    erageeffic

    ien

    A

    Traditional Supply mod. Load mod.

    A

    Traditional Supply mod. Load mod.

    Both supply voltage and load impedance modulation showhigh potential for efficiency enhancement with existing PAs

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    Conc usions

    - modulation transmitter architectures Static characterization used

    Both architectures show promising results with the PA tested Similar performance enhancement is observed with other transistor

    technolo ies and am lifier classes

    Modulator losses are not included Efficiency and bandwidth limitations in envelope modulators for supply

    modulation

    Varactor and network losses/limitations in load modulation architectures

    Careful co-control of two input signals needed for maximum

    efficiency performance New challenges in linearization and behavoural modelling

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    g

    an y ou o r y ou r a en on

    Acknowledgements ga er z cen re

    Swedish Governmental Agency of Innovation Systems (VINNOVA)

    ComHeat Microwave

    Infineon Technologies

    NXP Semiconductors

    Saab

    222009-01-19 Power Amplifier Symposium 2009