extended boost z source inverters

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2642 IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 25, NO. 10, OCTOBER 2010

Extended-Boost Z-Source InvertersChandana Jayampathi Gajanayake, Member, IEEE, Fang Lin Luo, Senior Member, IEEE,

Hoay Beng Gooi, Senior Member, IEEE, Ping Lam So, Senior Member, IEEE,and Lip Kian Siow, Member, IEEE

AbstractThe Z-source inverter has gained popularity asa single-stage buckboost inverter topology among many re-searchers. However, its boosting capability could be limited, andtherefore, it may not be suitable for some applications requiringvery high boost demand of cascading other dcdc boost convert-ers. This could lose the efficiency and demand more sensing forcontrolling the added new stages. This paper is proposing a newfamily of extended-boost quasi Z-source inverter (ZSI) to fill theresearch gap left in the development of ZSI. These new topolo-gies can be operated with same modulation methods that weredeveloped for original ZSI. Also, they have the same number ofactive switches as original ZSI preserving the single-stage natureof ZSI. Proposed topologies are analyzed in the steady state and

their performances are validated using simulated results obtainedin MATLAB/Simulink. Furthermore, they are experimentally val-idated with results obtained from a prototype developed in thelaboratory.

Index TermsDCAC power conversion, inverters, Z-sourceinverter (ZSI).

I. INTRODUCTION

OVER the recent years, many researchers have given their

focus in many directions to develop Z-source inverters(ZSI) to achieve different objectives [1][8]. Some have worked

on developing different kinds of topological variations, whileothers have worked on developing ZSI into different applica-

tions, where component sizing, modeling, analysis, controller

design, and modulation method are addressed [1][5]. Theo-

retically, ZSI can produce infinite gain, like many other dcdc

boost topologies; however, it is well known that this cannot be

achieved due to effects of parasitic components where the gain

tends to drop drastically [9]. Conversely, high boost could in-

crease power losses and instability. On the other hand, control

variables of ZSI shoot-through interval (DS) and modulationindex (M) are interdependent. This also imposes limitation on

Manuscript receivedNovember 11,2009; revisedFebruary3, 2010and March28, 2010; accepted May 5, 2010. Date of current version September 17, 2010.This work was supported by the Agency for Science, Technology, and Research(ASTAR) under Intelligent Energy Distribution Systems Project 072 133 0038.Recommended for publication by Associate Editor F. Z. Peng.

C. J. Gajanayake and L. K. Siow are with the Laboratory for Clean En-ergy Research, School of Electrical and Electronic Engineering, NanyangTechnological University, Singapore 639798 (e-mail: [email protected];[email protected]).

F. L. Luo, H. B. Gooi, P. L. So are with the Division of Power Engineer-ing, School of Electrical and Electronic Engineering, Nanyang TechnologicalUniversity, Singapore639798(e-mail: [email protected]; [email protected];[email protected]).

Color versions of one or more of the figures in this paper are available onlineat http://ieeexplore.ieee.org.

Digital Object Identifier 10.1109/TPEL.2010.2050908

variability, and thereby, the boosting of output voltage. In other

words, increase in boost factor would compromise the modula-

tion index and result in lower modulation index [2], [10]. Also,

the voltage and current stress on the switches would be high due

to pulsating nature of the output voltage and current where the

switches have to bear higher voltage in active states and high

current during the shoot-through.

Unlike the dcdc converters, researchers of ZSIs have not

given their focus to improve the gain of the converter so far. This

opens a significant research gap in the field of ZSI development,

particularly, in applications, like solar and fuel cells that may

require high voltage gain to match the voltage difference andalso to compensate the variations in output voltage. Need of high

boost is significant when such energy sources are connected

to 415-V three-phase systems. In the case of fuel and solar

cells, although it is possible to increase the number of cells

to increase the voltage, there are other influencing factors that

need to be taken into account. Sometimes the available number

of cells is limited or environmental factors could come into

play due to shading of light on some cells that could result in

poor overall energy catchments. In the case of fuel cells, some

manufactures produce them as lower voltage system to achieve

a faster response. Such factors could demand power converters

with larger boost ratio. This cannot be realized with a singleZSI. Hence, this paper focuses on developing new family of

ZSIs that would realize extended-boost capability.

II. INTRODUCTION TOZSI AND BASICTOPOLOGIES

The basic topology of ZSI is originally proposed in [1]. This

is a single-stage buckboost topology due to the presence of the

X-shaped impedance network, as shown in Fig. 1(a), which al-

lows the safe shoot-through of inverter arms avoiding the need

of dead time that was needed in traditional voltage-source in-

verters (VSIs). However, unlike VSI, the original ZSI does not

share the ground point of dc source with the converter and also

the current drawn from the source will be discontinuous, andthese would be a disadvantage in some applications; it may be

required to have a decoupling capacitor bank at the front end

to avoid current discontinuity and to protect the energy source.

Subsequently, the ZSI has been modified, as shown in Fig. 1(b)

and (c), where now a modified impedance network is placed

at the bottom or top arm of the inverter [4], [11]. These new

topologies are named as quasi-ZSIs (qZSIs). The advantage of

these topologies is that the voltage stress on the capacitor is

much lower, as compared to that of the traditional ZSI. The

topology shown in Fig. 1(b) has a common ground point for

the dc source and inverter. However, the current discontinu-

ity is still prevailed. An alternative continuous-current qZSI is

0885-8993/$26.00 2010 IEEE


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GAJANAYAKE et al.: EXTENDED-BOOSTZ-SOURCE INVERTERS 2643

Fig. 1. (a) Original ZSI. (b) Discontinuous-current qZSI with shared ground.(b) Discontinuous-current qZSI.

proposed in [4], but this continuous-current circuit is not con-

sidered in developing new converters. In terms of topology, theqZSI has no disadvantage over the traditional ZSI. In this paper,

a discontinuous-current qZSI inverter is used as the basic topol-

ogy to extend the boosting capability. In summary, the proposed

qZSIs and the original ZSI operate in the same manner and the

same modulation schemes can be applied.

III. EXTENDED-BOOSTZSI TOPOLOGIES

In this paper, four new converter topologies are proposed.

These topologies can be mainly categorized as diode-assisted

boost or capacitor-assisted boost and can be further divided into

continuous-current and discontinuous-current topologies. The

operation of these topologies is extensively described in the fol-lowing sections. All these topologies can be modulated using

the modulation methods proposed for the original ZSI. In this

context, the modulation method proposed in [5] is used. The

other main advantage of these proposed new topologies is their

expandability. This was not possible with the original ZSI, i.e.,

if one needs to increase the boosting rage, another stage can

be cascaded at the front end without increasing the number of

active switches. The only additions for each added new stage

would be one inductor, one capacitor, and two diodes for the

diode-assisted case and one inductor, two capacitors, and one

diode for the capacitor-assisted case. For each added new stage,

the boost factor can be increased by a factor of1/(1 DS)

Fig. 2. Diode-assisted extended-boost continuous-current qZSI. (a) First ex-tension. (b) Second extension.

in the case of the diode-assisted topology, whereDS =shoot-through duty ratio. In the case of capacitor-assisted topology,

the boost factor would change to 1/(1 3DS) compared to1/(1 2DS) in the traditional topology. Furthermore, hybridtype of topologies can be derived by combining capacitor- and

diode-assisted techniques, if the number of stages is larger than

two. However, similar to the other boost topologies, it is not

advisable to operate with very high or very low shoot-through

values. Also, as described in later part of the following section,

parasitic component could also lead to reduction in the possi-

ble maximum voltage gain due to conduction losses. Therefore,

a careful consideration is needed in selecting the boost-factormodulation index for suitable topologies to achieve high ef-

ficiencies. Careful consideration is also required in designing

inductor and capacitor values. Basic guideline on component

designing on ZSI can be found in [6] and [12]. The proposed

topologies would have the problem of higher current stress on

the switches similar to that of ZSI. This is a compromise that

has to be made to enjoy the advantages of single-stage nature

of ZSI. Higher current stress is resulted from the peak current

that appears during the shoot-through. Selecting a suitable mod-

ulation method that would distribute the shoot-through current

among the three arms of the inverter bridge can prevent this, but

switching loss could be a concern. However, these aspects need

further research and they will be addressed in a future paper.

A. Diode-Assisted Extended-Boost qZSI Topologies

Under this category, two new families of topologies are

proposed, namely, the continuous-current and discontinuous-

current diode-assisted extended-boost qZSI topologies. Fig. 2

shows the continuous-current topology and it can be extended

to have a very high boost by cascading more stages, as shown in

Fig. 2(b). This new extended topology comprises an additional

inductor, a capacitor, and two diodes to the first extension. The

operating principle of this additional impedance network is sim-

ilar to that found in the cascaded boost and Luo converters [13].


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Fig. 3. Simplified diagram of the diode-assisted extended-boost continuous-current qZSI. (a) Simplified circuit. (b) Nonshoot-through state. (c) Shoot-through state.

The added impedance network provides the boosting function

without disturbing the operation inverter.

First,consider the continuous-current topology and its steady-

state operation. This converter has three operating states sim-

ilar to those of the traditional ZSI topology. For simplicity,

it can be simplified into shoot-through and nonshoot-through

states. The inverters action is replaced by a current source

plus a single switch. First, consider the nonshoot-through state,

which is represented with an open switch. Also, diodes D1and D2 are conducting, and D3 is in blocking state; there-fore, the inductors discharge and the capacitors get charged.

Fig. 3(b) shows the equivalent-circuit diagram for nonshoot-

through state. By applying KVL, the following steady-staterelationships can be observed: Vdc + vL3 =VC3 , vL 1 =VC1 ,vL2 =VC2 , and vS =VC3 + VC2 + vL1 . Fig. 3(c) shows theequivalent-circuit diagram for the shoot-through state where it

is represented with the closed switch. D3 is conducting andD1 andD2 diodes are in blocking state. This would charge upall the inductors. Energy is transferred from the source to the

inductor or the capacitor to the inductor when the capacitors

are getting discharged. Similar relationships can be derived as

Vdc + vL3 = 0,VC3 + vL2 + VC1 = 0,VC3 + VC2 + vL 1 = 0,VS = 0, and VC3 + VC2 + vL 1 = 0. Considering the fact thatthe average voltage across the inductors is zero and by defining

the shoot-through duty ratio as DSand nonshoot-through duty

Fig. 4. Diode-assisted extended-boost discontinuous-current qZSI. (a) Firstextension. (b) Second extension.

ratio asDA whereDA + DS = 1, the following relationshipscan be derived:

VC3 = 1

1 DSVdc (1)

VC1 =VC2 = DS

1 2DSVC3 =

DS(1 2DS) (1 DS)

Vdc . (2)

From the aforementioned equations, the peak voltage across

the invertervsand the peak ac-output voltagevxcan be obtainedas follows:

vS = 1

(1 2DS) (1 DS)Vdc (3)

vx =MvS

2 . (4)

Let us defineB = 1/[(1 2DS)(1 DS)], the boost factorin the dc side, then the peak ac side can be written as follows:

vx =B

M

Vdc2

. (5)

Now, the boost factor has increased by a factor of1/(1 DS)compared to that of the original ZSI. Similarly, the steady-state

equations can be derived for the discontinuous-current diode-

assisted extended-boost qZSI. It is possible prove that this con-

verter also hasthe same boost factoras that of thecontinuous cur-

rent topology. Also, the voltage stress on the capacitors is simi-

lar, except that the voltage across capacitor 3, and can be shown

as VC3 =DS/(1 DS)Vdc . By studying these two topologies,it can be noted that with the discontinuous-current topology, the

capacitors are subjected to a small voltage stress and if there is

no boost, then the voltage across them is zero. Also, it is possible

to derive the boost factor for topologies shown in Figs. 2(b) and

4(b) asB = 1/[(1 2DS)(1 DS)(1 DS)].


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Fig. 5. Capacitor-assisted extended-boost qZSIs. (a) Continuous-current first

extension. (b) Discontinuous-current first extension. (c) Continuous-currentsec-ond extension. (d) Discontinuous-current second extension.

B. Capacitor-Assisted Extended-Boost qZSI Topologies

Similar to the previous family of extended-boost qZSIs, this

section is proposing another family of converters. The difference

is that a much higher boost is achieved with only a simple struc-

tural change to previous topology. Now, the D3 is replaced witha capacitor, as shown in Fig. 5. In this context, two topological

variations are derived as continuous-current or discontinuous-

current forms, as shown in Fig. 5(a)(d).

In the previous scenario, the steady-state relationships are

derived using the continuous-current topology. In this context,the discontinuous-current topology is considered. In this case,

the converters three operating states are simplified into shoot-

through and nonshoot-through states. The simplified circuit dia-

gram is shown in Fig. 6(a). First, consider the nonshoot-through

state shown in Fig. 6(b), which is represented with an open

switch. As diodes D1 and D2 are conducting, the inductorsdischarge when the capacitors get charged. Then, by applying

KVL, the following steady-state relationships can be observed.

Vdc + VC3 + VC2 + VC1 =VSand Vdc + VC3 + VC4 + VC1 =VS,VC1 =vL 1 ,VC2 =vL2 ,VC3 =vL3 ,Vdc + VC3 =Vd , andVC2 =VC4 . Fig. 6(c) shows the equivalent-circuit diagram for

the shoot-through state, where it is represented with the closed

Fig. 6. Simplified diagram of the diode-assisted extended-boost continuous-current qZSI. (a) Simplified circuit. (b) Nonshoot-through state. (c) Shoot-through state.

switch. Both diodes D1 and D2 are in blocking state, whereall the inductors get charged and energy is transferred from

the source to inductors or the capacitor to inductors whilecapacitors are getting discharged. Similar relationships can

be derived as Vdc + vL 3 + VC4 + VC1 = 0, Vdc + VC3 =Vd ,Vd + vL1 + VC2 = 0,Vd+ vL2 + VC1 = 0, andVS = 0. Con-sidering the fact that the average voltage across the inductors is

zero, the following relationships can be derived:

Vd = 1 2DS1 3DS

Vdc (6)

VC1 =VC2 =VC3 =VC4 = DS

1 2DSVd =

DS(1 3DS)

Vdc .

(7)

Then from the aforementioned equations, the peak voltage

across the invertervs can be obtained as follows:

vS = 1

(1 3DS)Vdc . (8)

Similar equations can be derived for the continuous-current

topology. Now, the difference would be the continuity of source

current and the difference in voltage across the capacitor C3 ,where it can be derived as VC3 =Vd . The voltage across thecapacitor is much larger than that with discontinuous-current

topology. However, this value is much smaller than conven-

tional ZSI. Similarly, it is possible to derive the boost factor for


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TABLE IVOLTAGESTRESS ONCAPACITORS ANDDIODES

Fig. 7. Voltage-boosting capability of different topologies.

topologies, shown in Fig. 5(c) and (d), as B = 1/[(1 4DS)].Table I summarize all voltage stress applied on different compo-

nents of the topology. To give a better representation of proposed

topologies in relation to voltage boosting and applied voltagestress on the devices, Figs. 7 and 8 are plotted similar to [14].

As expected, capacitor-assisted topologies would produce high

boost with smaller shoot-through, and it would apply lower volt-

age stress on devices, as shown in Fig. 8. Both the capacitor-

assisted and diode-assisted topologies shows better performance

in terms of dc-voltage utilization compared to traditional ZSI.

C. Hybrid Extended-Boost qZSI Topologies

As explained earlier, proposed two topologies families have

the expandability to achieve even higher boost by adding

more stages in front end. In the case of diode-assisted

Fig. 8. Voltage-stress comparison of different topologies.

Fig. 9. Hybrid extended-boost continuous-current qZSIs.

Fig. 10. Hybrid extended-boost discontinuous-current qZSIs.

topologies shown in Figs. 2(b) and 4(b), a boost of B =1/[(1 2DS) (1 DS) (1 DS)] is achieved. Then, in thecase of capacitor-assisted topologies shown in Fig. 5(c) and

(d), a voltage boost ofB = 1/[(1 4DS)] is achieved. Inthe case of hybrid extended-boost topologies, both the diode-

assisted and capacitor-assisted techniques are combined where

four such topologies are shown in Figs. 9 and 10. Operating


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principle of these four topologies is similar to that with the

diode-assisted and capacitor-assisted topologies; therefore, de-

tail analysis is not presented. All four topologies achieve a

boost ofB = 1/[(1 3DS) (1 DS)]. These hybrid topolo-gies would produce a boost higher than the same-order diode-

assisted topologies and lesser boost than the same-order

capacitor-assisted boost topologies. These topologies can fur-

ther be extended and possible to achieve different boosting

capabilities by selecting different combinations of diodes and

capacitors.

D. Parasitic Effects on the Voltage Gain

The proposed topologies are using additional inductors, ca-

pacitor, and diode compared to traditional ZISs. These in-

creased number of components could lead to reduction in ef-

fective voltage gain when the shoot-through or load current

is increased. The main contributor is from parasitic compo-

nents. However, the parasitic resistances of capacitors are small;

therefore, their effect can be neglected, but parasitic resis-

tances of inductions are not small, thus leading to conduc-

tion losses and voltage drop across them. In this section, par-

asitic resistance is considered and its effect is mathematically

modeled to assess the voltage drop. To simplify the model-

ing, same parasitic resistance value is assumed for the each

inductor. General representation of output voltage for a con-

verter can be written, as given in (9), where B is the ideal-case boost factor of the topology, as derived in Section III-A,

B = 1/[(1 2DS)(1 DS)] for diode-assisted topologies andB = 1/[(1 3DS)] for capacitor-assisted topologies. Then, thereduction in voltage can be derived in terms of average input cur-

rent and inductor resistance, as given in (10). Then, r is the resis-

tance of the inductor and Idc is the average dc current. To derivethe value ofK1 , each converter need to be considered individ-ually. Similar to previous section, KCL and KVL are applied to

the simplified circuits of Figs. 2(a), 4(a), and 5(a) and (b). It is

possible to rederive a voltage-gain equation subjected to para-

sitic losses, as given in (10). Capacitor-assisted topologiesK1 =3/[(1 3DS)], and then, for diode-assisted continuous-currenttopology K1 = (3 8DS+ 2D2S)/(1 2DS)(1 DS), andthen, for discontinuous-current topology, it can be proved that

K1 = (1 + 2DS 4D2S+ 2D

3S)/(1 2DS)(1 DS)

vS =BVdc K1rIdc (9)

vS =BVdc

K1rIdc . (10)To show the effect of parasitic resistance, Fig. 11 is plot-

ted where the variation of the output voltage in the dc link

against the dc current is shown. For all the considered cases,

input voltage is kept at 100 V dc, with a shoot-through value

of 0.36 is used for diode-assisted topologies and 0.27 is used

for capacitor-assisted topologies to comply with the simulation

and experimental results given in Section IV. It can be noted

that capacitor-assisted topologies have a higher tendency to be

effected by the increased current. Therefore, it is impotent to

give a close consideration on designing the inductors to keep

the parasitic resistance low, thereby keeping the boosted voltage

within acceptable level.

Fig. 11. Variation ofVSwith average input dc current.

IV. SIMULATIONRESULTS

Extensive simulation studies are performed on the open-loop

configuration of all proposed topologies in MATLAB/Simulink.

The obtained results validate the operation of diode-assisted and

capacitor-assisted topologies, as well as continuous-current and

discontinuous-current topologies. In all the topologies, the in-

put voltage is kept constant at 100 V and a three-phase load

of 130- resistor bank is used to keep the simulation resultsto comply with the experimental results. All dc-side capacitors

are 1000 F and inductors are 6.3 mH. The ac-side second-order filter of 10-uF capacitor and 6.3-mH inductor is used.

Figs. 12 and 13 show the simulation results corresponding to

topologies shown in Figs. 2(a) and 4(a), which are for diode-

assisted continuous-current and diode-assisted discontinuous-

current topologies, where they are operated with shoot-through

value of 0.36 and modulation index of 0.65 to achieve a line-to-

line output voltage of 220 V. Both the topologies produce same

voltage boost of 560 V peak at the dc link and equal voltages

across the capacitors C1 and C2 that is 200 V, which complywith the derived equations. Then, voltage across capacitor C3 isdifferent, as expected in the theoretical finding, i.e, in the case

of discontinuous-current topology, the voltage is 60 V and in the

case of continuous-current topology, it is 156 V. Figs. 14 and 15

show the simulation results, corresponding to capacitor-assisted

topologies shown in Fig. 5(a) and (b), which are for continuous-

current and discontinuous-current topologies, where they are

operated with shoot-through value of 0.27 and modulation in-

dex of 0.7 to achieve a line-to-line output voltage of 220 V. Both

the topologies produce same voltage boost of 526 V peak at

the dc link in the case of discontinuous-current topology and

equal voltage of 142 V across the capacitors C1 , C2 , C3 , andC4 . Whereas in the case of continuous-current topology, volt-age across the capacitorC3 is 240 V and is much higher thandiscontinuous-current topology. All simulation results comply

with the equations derived in Section III.

V. EXPERIMENTALRESULTS

Prototypes are built in the laboratory to validate the pro-

posed new extended-boost qZSIs. Reference signals are gen-

erated using dSPACE DS1103 based hardware environment

and modulation signals are derived based on the modulation

method proposed in [5]. The input voltage of the dc source is

kept at 100 V, and then, it is boosted to 560 V in the case of


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Fig. 12. Simulation results for diode-assisted extended-boost continuous-current qZSI.

Fig. 13. Simulation results for diode-assisted extended-boost discontinuous-

current qZSI.

Fig. 14. Simulation results for capacitor-assisted extended-boost continuous-current qZSI.

diode-assisted topologies and 526 V in the case of capacitor-

assisted topologies. With this dc-link voltage, the inverter pro-

duces line-to-line output of 220 V, which drive a resistive load of

130 per phase. The ac-side second-order filter is constructedusing 5F capacitors and 6.3 mH inductors, while all the dc-side capacitors are selected as 1000 F and inductors as 6.3 mH.Experiments are done to validate the open-loop configuration,

and four sets of experimental results are presented to validate

the performance of the proposed topologies.

A. Diode-Assisted Topologies

Figs. 16 and 17 show the experimental results for the diode-

assisted topologies shown in Figs. 2(a) and 4(a), where dc-

side voltages, dc-side currents, ac-side voltages, or ac-side cur-

rents are observed along with VS in the oscilloscope, wherethe triggered results are obtained and plotted. Fig. 16(a) shows

the dc-side response where the shoot-through is changing from

0.26 to 0.36. This will demonstrate the boosting capability of


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Fig. 15. Simulation results for capacitor-assisted extended-boostdiscontinuous-current qZSI.

the converter and its dynamics. From top to bottom, it shows

dc-input voltageVdc , voltage across capacitor 1VC1 and volt-age across capacitor 3VC3 . The dc-link voltage would changefrom VS =280 to 560 V, VC1 =73 to 200 V, and VC3 =135to 156 V, following the step at the steady-state ac side would

produce a 220-V line-to-line output when it is operated at mod-

ulation index of 0.65, as shown in Fig. 16(c). Fig. 16(b) shows

the expanded view of the dc parameters from top-to-bottom

Z-source inductor current, dc-input current, dc-link voltage, andcarrier signal that are used to generate the pulsewidth modula-

tion (PWM). It ispossible tonotethatdc linkgoesto zerovoltage

when the shoot-through happens and inductor current increasewhere as input dc current is kept at constant value, thus confirm-

ing the continuous-current operation. Fig. 17 shows the exper-

imental results for diode-assisted discontinuous-current topol-

ogy, similar to continuous-current topology when the topology

operate at shoot-through of 0.36 at steady-state dc-link voltage

VS =560 V, VC1 =200 V, and VC3 =47 V and steady-stateac side would produce a 220-V line-to-line output when it is

operated at modulation index of 0.65. In Fig. 17(b), input cur-

rent is at discontinuous peak during the shoot-through intervals,

whereas Z-source inductor current is kept continuous. FromFigs. 16 and 17, it can be noted that both results are similar, ex-

cept the voltage across capacitor 3. VC3 has a larger magnitude

Fig. 16. Experiment results for diode-assisted extended-boost continuous-current qZSI.(a) DC-side response. (b) DC-side currents. (c) AC-output voltage.(d) AC-output current.

in the case of continuous-current topology complying with the

finding in simulations.

B. Capacitor-Assisted Topologies

Figs. 18 and 19 show the experiment results for the capacitor-

assisted topology, where now the converters are operated with


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Fig. 17. Experiment results for diode-assisted extended-boost discontinuous-current qZSI. (a) DC-side voltages. (b) DC-side currents. (c) AC-output voltage.(d) AC-output current.

shoot-through of 0.27 to achieve boosted dc-link voltage to

526 V, which would generate an ac-output voltage of 220 V line

to line with modulation index of 0.7.

Similar to diode-assisted topologies, transient response is pre-

sented for one of the capacitor-assisted topologies. Fig. 18(a)

shows the dc-side response where the shoot-through is changed

from 0.17 to 0.27. This will demonstrate the boosting capa-

Fig. 18. Experiment results for capacitor-assisted extended-boost continuous-current qZSI.(a) DC-side response. (b) DC-side currents. (c) AC-output voltage.(d) AC-output current.

bility of the converter and its dynamics response. From top to

bottom, it shows dc-input voltageVdc , voltage across capacitor3 and voltage across capacitor 1 VC1 , and dc-link voltage VS.The dc-link voltage would change from VS= 204 to 525 V,VC1 = 34 to 142 V, and VC3 = 135 to 240 V, following thestep at the steady state. Fig. 18(c) and (d) shows the ac-side

response where it produces a 220-V line-to-line output when it


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Fig. 19. Experiment results for capacitor-assisted extended-boostdiscontinuous-current qZSI. (a) DC-side voltages. (b) DC-side currents.(c) AC-output voltage. (d) AC-output current.

is operated at modulation index of 0.7. Then, Fig. 18(b) shows

the expanded view of the dc parameters from top-to-bottom

Z-source inductor current, dc-input current, dc-link voltage,and triangle waveform that are used to generate the PWM. It

is possible to note that dc-link voltage have zero voltage when

the shoot-through happen and inductor current increase, where

as input dc current is kept at constant value, thus confirming

the continuous-current operation. Fig. 19 shows the experimen-

tal results for capacitor-assisted discontinuous-current topology,

similar to continuous-current topology when the topology op-

erate at shoot-through of 0.27 at steady-state dc-link voltage

VS =525 V,VC1 =142 V, and VC3 =142 V, and steady-stateac side would produce a 220-V line-to-line output when it is

operated at modulation index of 0.7. In Fig. 19(b), input cur-

rent is at discontinuous peak during the shoot-through intervals,

whereasZ-source inductor current is kept continuous. Similarto the diode-assisted topologies, this case shows different volt-

age value across capacitor 3 for different topologies. Other than

this, they show equal boost and similar performance.

VI. CONCLUSION

This paper has proposed four new families of extended-

boost ZSI topologies. The proposed topologies are catego-

rized as diode-assisted or capacitor-assisted based on the

operation and the discrete component used in designing thetopology. Also, they are further divided into continuous-current

or discontinuous-current topologies based on their nature of

current drawn from the supply. All the topologies show higher

boost and lower voltage stress across the capacitors compared

to those of traditional ZSI. The steady-state operation is per-

formed to analyze the boosting capability, and it is then vali-

dated with simulation results. The switching-circuit simulation

results show good compliance with the theoretical findings val-

idating the proper operation of the proposed topology. Further

operations of all proposed topologies are validated with results

obtained from the prototypes built in the laboratory.

REFERENCES

[1] F. Z. Peng, Z-source inverter, IEEE Trans. Ind. Appl., vol. 39, no. 2,pp. 504510, Mar./Apr. 2003.

[2] C. J. Gajanayake, D. M. Vilathgamuwa, and P. C. Loh, Development ofa comprehensive model and a multiloop controller for Z-source inverterDG systems, IEEE Trans. Ind. Electron., vol. 54, no. 4, pp. 23522359,Aug. 2007.

[3] F. Gao,P.C. Loh,F. Blaabjerg, andC. J. Gajanayake, Operational analysisand comparative evaluation of embedded Z-Source inverters, in Proc.

IEEE Power Electron. Spec. Conf. (PESC) , 2008, pp. 27572763.[4] J. Anderson and F. Z. Peng, Four quasi-Z-Source inverters, in Proc.

IEEE Power Electron. Spec. Conf. (PESC) , 2008, pp. 27432749.[5] P. C. Loh, D. M. Vilathgamuwa, Y. S. Lai, C. G. Tin, and Y. Li, Pulse-

width modulation of Z-source inverters, IEEE Trans. Power Electron.,vol. 20, no. 6, pp. 13461355, Nov. 2005.

[6] S. Rajakarunaand Y. R. L. Jayawickrama, Designing impedancenetworkof Z-source inverters, in Proc. 7th Int. Power Eng. Conf. (IPEC), 2005,vol. 2, pp. 962967.

[7] P. C. Loh, F. Gao, and F. Blaabjerg, Topological and modulation designof three-level Z-source inverters, IEEE Trans. Power Electron., vol. 23,no. 5, pp. 22682277, Sep. 2008.

[8] P. C. Loh, C. J. Gajanayake, D. M. Vilathgamuwa,and F. Blaabjerg, Eval-uation of resonant damping techniquesfor Z-source current-type inverter,

IEEE Trans. Power Electron., vol. 23, no. 4, pp. 20352043, Jul. 2008.[9] N. Mohan, T. M. Undeland, and W. P. Robbins,Power Electronics: Con-

verters, Application and Design. New York: Wiley, 2003.[10] P. C. Loh, D. M. Vilathgamuwa, C. J. Gajanayake, Y. R. Lim, and

C. W. Teo, Transient modeling and analysis of pulsewidth modulatedZ-source inverter, IEEE Trans. Power Electron., vol. 22, no. 2, pp. 498507, Mar. 2007.

[11] T. Yu, X. Shaojun, Z. Chaohua, and X. Zegang, Improved Z-source

inverter with reduced Z-source capacitor voltage stress and soft-start


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capability, IEEE Trans. Power Electron., vol. 24, no. 2, pp. 409415,Feb. 2009.

[12] L. Sack, B. Piepenbreier, and M. von Zimmermann, Dimensioning ofthe Z-source inverter for general purpose drives with three-phase standardmotors, inProc. IEEE Power Electron. Spec. Conf. (PESC), Jun. 1519,2008, pp. 18081813.

[13] F. L. Luo and H. Ye, Essential DC/DC Converters. Boca Raton, FL:Taylor & Francis Group LLC, Oct. 2005.

[14] S. Miaosen, W. Jin, A. Joseph, P. Fang Zheng, L. M. Tolbert, andD. J. Adams, Constant boost control of the Z-source inverter to mini-mize current ripple and voltage stress, IEEE Trans. Ind. Appl., vol. 42,no. 3, pp. 770778, May/Jun. 2006.

Chandana Jayampathi Gajanayake (S07M09)received the B.Sc. degree in electrical and elec-tronic engineering from the University of Peradeniya,Peradeniya, Sri Lanka, in 2003, and the Ph.D. de-gree from the School of Electrical and ElectronicEngineering, Nanyang Technological University,Singapore, in 2008.

In 2006, he was a Visiting Scholar at the Instituteof Energy Technology, Alborg University, Alborg,Denmark. He is currently a Research Fellow in theLaboratory for Clean Energy Research, School of

Electrical and Electronic Engineering, Nanyang Technological University. Hisresearch interests include power converters, power quality, and distributed gen-eration microgrid energy management.

Dr. Gajanayake is a member of the IEEE Power Electronics Society and thePower and Energy Society.

Fang Lin Luo (M84SM95) received the B.Sc.

(with First-class honors) degree from Sichuan Uni-versity, Chengdu, China, and the Ph.D. degree inelectrical engineering and computer science fromCambridge University, England, U.K., in 1986.

From 1968 to 1981, he was at Chinese Automa-tion Research Institute of Metallurgy, Beijing, China.From 1981 to 1982, he was with Entreprises SaunierDuval, Paris, France. From 1986 to 1995, he waswith British Companies. Since 1995, he has been inthe Divisionof Power Engineering, School of Electri-

cal and Electronic Engineering, Nanyang Technological University, Singapore.From 1998 to 2003, he was the Chief Editor of the international journal PowerSupply Technology and Applications. From 2003 to 2009, he was an Interna-tional Editor of theTransactions on EEE, Chinese Academy of Science. He hasauthored or coauthored ten teaching text books and more than 280 technical pa-pers in the IEEE TRANSACTIONS, the IEE/IET Proceedings, and other journals,

and various international conferences. His current research interests include thepower electronics and motor drives, ac/dc, ac/ac, and dc/dc converters and dc/acinverters, and digital power electronics.

Dr. Luo was the General Chairman of the third IEEE Conference on In-dustrial Electronics and Applications ( ICIEA2008) in Singapore. He was theGeneral Chairman of the first IEEE Conference on Industrial Electronics andApplications (ICIEA2006) in Singapore. He is currently an Associate Editorof the IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS and an AssociateEditor of the IEEE TRANSACTIONS ONPOWERELECTRONICS.

Hoay Beng Gooi (S80M82SM95) receivedthe B.Sc. degree from National Taiwan University,Taipei, Taiwan, the M.Sc. degree from the Universityof New Brunswick, Fredericton,NB, Canada, andthePh.D. degree from Ohio State University, Columbus,in 1978, 1980, and 1983, respectively.

From 1983 to 1985, he was an Assistant Pro-fessor in the Department of Electrical Engineer-ing, Lafayette College, Pennsylvania. From 1985 to1991, he was a Senior Engineer with Empros (nowSiemens),Minneapolis. In 1991, he joined the School

of Electrical and Electronic Engineering, Nanyang Technological University asa Senior Lecturer, where he has been an Associate Professor since 1999 and theDeputy Head of the Division of Power Engineering since September 2008. Hiscurrent research interests include microgrid energy management and networkand scheduling applications.

Ping Lam So (M98SM03) received the B.Eng.(with First-class honors) degree in electrical engi-

neering from the University of Warwick, Coventry,U.K., in 1993, and the Ph.D. degree in electricalpower systems from Imperial College, University ofLondon, London, U.K., in 1997.

For eleven years prior to his academic career, hewas a Second Engineer at China Light and PowerCompany Ltd., Hong Kong, where he was engagedin the field of power-system protection. He is cur-rently an AssociateProfessor in theDivision of Power

Engineering, School of Electrical and Electronic Engineering, Nanyang Tech-nological University, Singapore. His research interests include power-systemstability and control, power quality, power-line communications, clean and re-newable energy, microgrids, and smart grids.

Dr. So is the Chair of the IEEE Singapore Section. He is a member of theElectrical Testing Technical Committee, Singapore Accreditation Council anda member of the Working Group under the purview of the TelecommunicationsStandards Technical Committee, Infocomm Development Authority, Singapore.

Lip Kian Siow (M09) received the B.Eng. degreefrom the University Tenaga National, Malaysia, in2008.

Since September 2008, he has been a ResearchEngineer in the Laboratory for Clean Energy Re-search, School of Electrical and Electronic Engineer-ing, Nanyang Technological University, Singapore.His current research interests include power systemcommunication and microgrid energy-management

systems.

extended boost z source inverters

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