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    Combinational Circuits

    Dr. Bernard Chen Ph.D.

    University of Central Arkansas

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    OutlineBoolean AlgebraDecoderEncoderMUX

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    History: Computer and the

    RationalistModern research issues in AI are formed andevolve through a combination of historical,social and cultural pressures.The rationalist tradition had an earlyproponent in Plato, and was continued onthrough the writings of Pascal, Descates, andLiebnizFor the rationalist, the external world isreconstructed through the clear and distinctideas of a mathematics

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    History: Development of

    Formal LogicThe goal of creating a formal language forthought also appears in the work of George

    Boole, another 19th

    century mathematicianwhose work must be included in the roots of AIThe importance of Booles accomplishment isin the extraordinary power and simplicity ofthe system he devised: Three Operations

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    Three Operationsthree basic Boolean operations canbe defined arithmetically as follows.

    x y = xyx y = x + y xy x =1 x

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    Boolean function and logic

    diagram Boolean algebra : Deals with binary

    variables and logic operations operating

    on those variables.

    Logic diagram : Composed of graphicsymbols for logic gates. A simple circuitsketch that represents inputs andoutputs of Boolean functions.

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    Basic Identities of Boolean Algebra

    (1) x + 0 = x(2) x 0 = 0(3) x + 1 = 1(4) x 1 = 1(5) x + x = x

    (6) x x = x(7) x + x = x (8) x x = 0 (9) x + y = y + x(10) xy = yx(11) x + ( y + z ) = ( x + y ) + z(12) x (yz) = (xy) z(13) x ( y + z ) = xy + xz(14) x + yz = ( x + y )( x + z)(15) ( x + y ) = x y (16) ( xy ) = x + y (17) (x) = x

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    Gates Refer to the hardware to implement Booleanoperators.

    The most basic gates are

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    Boolean function and truth

    table

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    OutlineBoolean AlgebraDecoderEncoderMUX

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    Decoder Accepts a value and decodes it

    Output corresponds to value of n inputs

    Consists of:Inputs (n)Outputs (2 n , numbered from 0 2 n - 1)Selectors / Enable (active high or active low)

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    The truth table of 2-to-4

    Decoder

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    2-to-4 Decoder

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    The truth table of 3-to-8

    Decoder A2 A1 A0 D0 D1 D2 D3 D4 D5 D6 D7

    0 0 0 1

    0 0 1 10 1 0 1

    0 1 1 1

    1 0 0 1

    1 0 1 1

    1 1 0 1

    1 1 1 1

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    3-to-8 Decoder

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    3-to-8 Decoder with Enable

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    Decoder Expansion

    Decoder expansionCombine two or more small decoders with

    enable inputs to form a larger decoder

    3-to-8-line decoder constructed from two2-to-4-line decoders

    The MSB is connected to the enable inputsif A 2=0, upper is enabled; if A 2=1, lower isenabled.

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    Decoder Expansion

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    Combining two 2-4 decoders to formone 3-8 decoder using enable switch

    The highest bit is used for the enables

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    How about 4-16 decoder

    Use how many 3-8 decoder?Use how many 2-4 decoder?

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    Outline

    Boolean AlgebraDecoderEncoder Mux

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    Encoders

    Perform the inverse operation of adecoder

    2n (or less) input lines and n outputlines

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    Encoders with OR gates

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    Encoders

    Perform the inverse operation of a decoder2n (or less) input lines and n output lines

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    Accepts multiple values and encodes them

    Works when more than one input is activeConsists of:Inputs (2 n)Outputs

    when more than one output is active, setsoutput to correspond to highest input V (indicates whether any of the inputs areactive)

    Selectors / Enable (active high or active low)

    Priority Encoder

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    D3 D2 D1 D0 A1 A0 V

    0 0 0 0 x X 0

    0 0 0 1 0 0 1

    0 0 1 0 0 1 10 0 1 1 0 1 1

    0 1 0 0 1 0 1

    0 1 0 1 1 0 1

    0 1 1 0 1 0 1

    0 1 1 1 1 0 11 0 0 0 1 1 1

    1 0 0 1 1 1 1

    1 0 1 0 1 1 1

    1 0 1 1 1 1 1

    1 1 0 0 1 1 1

    1 1 0 1 1 1 1

    1 1 1 0 1 1 1

    1 1 1 1 1 1 1

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    Priority Encoder

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    Outline

    Boolean AlgebraDecoderEncoderMux

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    Multiplexer (MUX)

    A selector chooses a single data input andpasses it to the MUX outputIt has one output selected at a time.

    A multiplexer can use addressing bits to

    select one of several input bits to be theoutput.

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    Function table with enable

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    4 to 1 line multiplexer

    S1 S0 F

    0 0 I00 1 I1

    1 0 I2

    1 1 I3

    4 to 1 linemultiplexer

    2n MUX to 1

    n for this MUX is 2

    This means 2selection lines s 0

    and s 1

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    Multiplexer (MUX)Consists of:

    Inputs (multiple) = 2 n

    Output (single)Selectors (# depends on # of inputs) = nEnable (active high or active low)

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    Multiplexers versus decoders

    A Multiplexer uses n binary select bits to choose from amaximum of 2 n unique input lines.

    Decoders have 2^n number of output lines whilemultiplexers have only one output line.

    The output of the multiplexer is the data input whose index isspecified by the n bit code.

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    Multiplexer Versus Decoder

    S0

    S1

    I3

    I2

    I1

    I0

    X

    Note that the multiplexer has an extra OR gate. A1 and A0 are the two inputs

    in decoder. There are four inputs plus two selecs in multiplexer .

    4-to-1 Multiplexer 2-to-4 Decoder

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    Cascading multiplexers

    Using three 2-1 MUXto make one 4-1 MUX

    S1 S0 F0 0 I0

    0 1 I1

    1 0 I2

    1 1 I3

    F

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    F2-1

    MUX

    S E

    S2 E

    S2 S1 S0 F0 0 0 I 0

    0 0 1 I 1

    0 1 0 I 2

    0 1 1 I 3

    1 0 0 I 4

    1 0 1 I 5

    1 1 0 I 6

    1 1 1 I 7

    I0

    I1

    I2

    I3

    I4

    I5

    I6

    I7

    Example: Construct an8-to-1 multiplexer using2-to-1 multiplexers.

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    Example : Construct 8-to-1 multiplexer using one 2-to-1 multiplexer andtwo 4-to-1 multiplexers

    S2 S1 S0 X

    0 0 0 I 0

    0 0 1 I 1

    0 1 0 I 2

    0 1 1 I 3

    1 0 0 I 4

    1 0 1 I 51 1 0 I 6

    1 1 1 I 7

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