EMS PROJECT REPORTSpeed control of a DC motor through pulse width modulation

Submitted to: Miss Hadia

BY: Muhammad Anas L13-4402

Haider Ali L12-

PWM by NE555 ICThese devices are precision timing circuits capable of producing accurate time delays or oscillation. In the time-delay or monostable mode of operation, the timed interval is controlled by a single external resistor and capacitor network. In the astable mode of operation, the frequency and duty cycle can be controlled independently with two external resistors and a single external capacitor.The threshold and trigger levels normally are two-thirds and one-third, respectively, of VCC. These levels can be altered by use of the control-voltage terminal. When the trigger input falls below the trigger level, the flip-flop is set, and the output goes high. If the trigger input is above the trigger level and the threshold input is above the threshold level, the flip-flop is reset and the output is low. The reset (RESET) input can override all other inputs and can be used to initiate a new timing cycle. When RESET goes low, the flip-flop is reset, and the output goes low. When the output is low, a low-impedance path is provided between discharge (DISCH) and ground.The output circuit is capable of sinking or sourcing current up to 200 mA. Operation is specified for supplies of 5 V to 15 V. With a 5-V supply, output levels are compatible with TTL inputs.

Output Current Amplification by NPN transistor (TIP 122)The TIP 122 also known as the “Darlington transistor” is basically used for maximum current amplification.

Explanation:The Darlington transistor (often called a Darlington pair) is a compound structure consisting of two bipolar transistors (either integrated or separated devices) connected in such a way that the current amplified by the first transistor is amplified further by the second one.[1] This configuration gives a much higher common/emitter current gain than each transistor taken separately and, in the case of integrated devices, can take less space than two individual transistors because they can use a shared collector. Integrated Darlington pairs come packaged singly in transistor-like packages or as an array of devices (usually eight) in an integrated circuit.The Darlington configuration was invented by Bell Laboratories engineer Sidney Darlington in 1953. He patented the idea of having two or three transistors on a single chip sharing a collector.[2]

A similar configuration but with transistors of opposite type (one NPN and one PNP) is the Sziklai pair, sometimes called the "complementary”.

Technique Used to Control Speed: We have used a selector switch to increase or deacrease resistance to three different levels. These resistances are connected externally to the NE555 which uses these resistors and the externally connected capacitors to increase or decrease the duty cycle of the square wave provided at PIN 3 of the NE555.

USING the NE555 in MONO STABLE MODE:The width of the output pulse is determined by the time constant of an RC network, which consists of a capacitor (C) and a resistor (R). The output pulse ends when the voltage on the capacitor equals 2/3 of the supply voltage. The output pulse width can be lengthened or shortened to the need of the specific application by adjusting the values of R and C.[5]