EMBRACE receiverEMBRACE receiver

8th SKADS Board Meeting Château de Limelette, Belgium, 3 November 2009

DS5 EMBRACEDS5 EMBRACE

IRA&ASTRON DS5 Eng. GroupPresentation by Jader Monari

j.monari@ira.inaf.it

•RF 400-1600MHz•IF 100-200MHz•LO1 2600-1400MHz•LO2 2850MHz•Double Conversion•Input ports ESD protected with inductor•RF/IF1 equalizazion•RF High Selectivity Filter bank •TTL/OC/Dip Sw controls•Low Power for driving LO Typ 2dBm•No OL Phase Noise degradation•High Reliability•Substrate FR4, 1.6mm, 1Oz. Cu•Eurocard Standard Dimension (160x100)

Main FeatureMain Feature

3000/Bw100 150/Bw100

LO:2850

LO: 2600…1400

HighBand 1300/Bw600

MidBand 1000/Bw600

LowBand 700/Bw600

WideBand 1000/Bw1200

INPUT400…1600

OUTPUT150

Functional Block DiagramFunctional Block Diagram

R 2 1

U 6 E

7 4 L S 0 4

1 1 1 0

B *

C 3 1

C 2 9

C 1 2

R 1 7

J P 1

M O L E X 4 P 1 . 2 5

1234

L 7

A

U 6 B

7 4 L S 0 4

3 4

R 1 4

R 2

R 1

H M C 2 4 1 Q S 1 6

S W P 1

2

3

1

4

5 6

L 5

C 1 6

R 5

+1 2 V

M in ic irc u it L F C N -3 0 0 0

P B F 9

A *

C 3 4

L 8

D 4

XL L 4 4 4 8

R 9

M in ic irc u it A D C H -8 0 A

IN

OU

T

C 2 7

U 4

H M C 4 8 0 S T8 9

13

4 2 L 1 0

U 6 A

7 4 L S 0 4

1 2

C 5

C 1 7

C 2

C 1 3

J P 2

M O L E X 4 P 1 . 2 5

1234

J 3

S M A1

2

C 9

S J B P E 7 0 0 B 6 0 0 M S

P B F 3

M in ic irc u it A D C H -8 0 A

IN

OU

T

R 8

U 7

L 7 8 L 0 5 / S O

18O U TI N

C 2 3

C 2 2

C 3 0

U 6 C

7 4 L S 0 4

5 6

M in ic irc u it L F C N -1 5 2 5

P B F 7

C 1 9

M in ic irc u it L F C N -2 2 5

P B F 6

E R A S M 2

U 1

L 1 1

A *

C 2 8

M in ic irc u it L F C N -3 0 0 0

P B F 1 0

R 2 0

R 6

C 1 5

C 1 0

S J B P E 1 0 0 0 B 1 2 0 0 M S

P B F 1

U 8L 7 8 0 8 / D P A K

1

2

4V I N

GN

D

V O U T

C 1

B *

D 3

XL L 4 4 4 8

R 1 3

C 2 1F1c=1000MHz F1BW=1200MHz@3dBF2c=1300MHz F2BW=600MHz@3dB F3c=700MHz F3BW=600MHz@3dB F4c=1000MHz F4BW=600MHz@3dB

R 4

C 2 6

C 1 4

C 3 3

R 1 1

A

C 1 1

U 5

H M C 4 8 0 S T8 9

13

4 2

S J B P E 1 3 0 0 B 6 0 0 M S

P B F 2

DPSWITCH

J 2

S M A1

2

L 6

U 6 F

7 4 L S 0 4

1 3 1 2

J P 3

12

B

D 6D 5

XL L 4 4 4 8

E R A S M 5

U 2

M in ic irc u it L F C N -3 0 0 0

P B F 1 1

R 1 0

L 1

C 2 0

+8 V

B

C 1 0 1

+8 V

E R A S M 5

U 3

U 6 D

7 4 L S 0 4

9 8

L 2 L 3

D 7

R 1 9

C 3

+8 V

H M C 3 1 6 M S 8

M 2

R I

L

L 9

R 1 6

D 2

XL L 4 4 4 8

R 1 2

C 1 8

M in ic irc u it L F C N -2 2 5

P B F 5

C 6

J P 4

12

H M C 2 4 1 Q S 1 6

S W P 2

2

3

1

4

56

+8 V

R 1 8

C 8

R 7

L 4S J M 3 0 0 0 S 4 4 R 1 0 0 A

P B F 8

C 2 5

D 1

XL L 4 4 4 8

C 1 0 0

R 1 5

S J B P E 1 0 0 0 B 6 0 0 M S

P B F 4

R 3

C 7

M in ic irc u it A D E -4 2 M H

M 1

R I

L

+8 V

G E N E R A L S C H E M E 1 . 0

E M B R A C E R E C E I V E R 4 0 0 -1 6 0 0 M H z I R A -I N A F I TA L Y

A 2

1 1M o n d a y , J u n e 2 5 , 2 0 0 7

Tit le

S ize D o c u m e n t N u m b e r R e v

D a t e : S h e e t o f

J 4

S M A1

2

+8 V

C 3 2

C 4

+1 2 V

C 2 4

J 1S M A

1

2

Schematic DiagramSchematic Diagram

Parameters Units Minimum Typical Maximum

RF Frequency MHz 500-1500 400-1600Input noise density

dBm/Hz -151

RF Return Loss dB 11 15LO1 Frequencies MHz 1500-2500 2600-1400

LO1 Return loss dB 9 15LO1 Drive Power dBm 0 2 5LO2 Frequency MHz 2850LO2 Return Loss dB 14

LO2 Drive Power dBm 0 2 6

Parameters Units Minimum Typical MaximumVcc V 10 12 15I mA 370 450Ripple Rejection dB 59@50Hz

Vcc=10V to 15V75@50Hz

Vcc=10V to 15V

DC BiasDC Bias

Input/Output Port SpecificationsInput/Output Port Specifications

Parameters Units Minimum Typical MaximumGain dB 24 25 27Ripple dB ±1NF dB 8 < 9 10IIP3 dBm -1@550MHz

0@850MHz3@1450MHz

Output 1 dB Compression Point

dBm 16@550MHz17@850MHz

17.5@1450MHzImage Rejection dB >80dB

Central Frequency

Bandwidth@3dB Rejection Digital control Notes

RF1c=1000MHz RF1BW=1200MHz RF1c±750MHz=20dB(min) 00 Full Band

RF2c=1300MHz RF2BW=600MHz RF2c±400MHz=20dB(min) 01 High Band

RF3c=700MHz RF3BW=600MHz RF3c±400MHz=20dB(min) 10 Low Band

RF4c=1000MHz RF4BW=600MHz RF4c±400MHz=20dB(min) 11 Mid Band

Final Receiver General performances are:Final Receiver General performances are:

Characteristics of the Filter BankCharacteristics of the Filter Bank

Noise Figure vs selected filter Noise Figure vs selected filter

Gain Vs. selected filterGain Vs. selected filter

Comparision Gain Vs. selected filter (4 prototypes)Comparision Gain Vs. selected filter (4 prototypes)

Gain Vs. frequency (Fixed LO1, Swept RF)Gain Vs. frequency (Fixed LO1, Swept RF)

RF, IF, LO1 and LO2 Return LossRF, IF, LO1 and LO2 Return Loss

LayoutLayout

Shielded Box OutlineShielded Box Outline

Dwingeloo April 2007Dwingeloo April 2007Test for connectingTest for connectingthe Receiver to ADCthe Receiver to ADC

adc. sync 200MHz*3

Rx tuned at 600MHz

No Spurs with shielding

…tests shown that the GSM signals (1830MHz) can be received although out of band. In order to reject them an high selectivity filter after the tile combiner is suggested.

Final Control & Downconversion Unit

• Down

• conversion

48V DC Bias Control Filter

Conclusion

• All the specifications have been fulfilled

• All the tasks (i.e. LO noise phase measure and distribution chain design) and test have been accomplished

• Special efforts have been devoted to lower the costs.

• Final integration respects all the performances measured for the prototypes