embedded system unit1

8/3/2019 Embedded System Unit1

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1/7/20121/7/2012 UMESH DUTTAUMESH DUTTA 11

EMBEDDED SYSTEMEMBEDDED SYSTEM

An embedded system is defined as a control system or computer system designed to perform aAn embedded system is defined as a control system or computer system designed to perform a

specific task.specific task.

An embedded system is a combination of hardware and software.An embedded system is a combination of hardware and software.

An embedded system might have one of the following as processing unit:An embedded system might have one of the following as processing unit:--Microprocessor (p).Microprocessor (p).

Microcontroller (c).Microcontroller (c).

Digital signal processor (DSP).Digital signal processor (DSP).

System on chip (SOC).System on chip (SOC).

Application Specific Integrated chip (ASIC).Application Specific Integrated chip (ASIC).

Microcontrollers are most widely used for developing an embedded system product.Microcontrollers are most widely used for developing an embedded system product.

An embedded product uses a microprocessor or microcontroller to do one task and one task only.An embedded product uses a microprocessor or microcontroller to do one task and one task only.


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EXAMPLES OF ESEXAMPLES OF ES

HomeHome

Appliances, intercom, telephones, security systems, garage door openers answering machines,Appliances, intercom, telephones, security systems, garage door openers answering machines,fax machines, home computers, TVs, cable TV tuner, VCR, camcorder, remote controls, videofax machines, home computers, TVs, cable TV tuner, VCR, camcorder, remote controls, videogames, cellular phones, musical instruments, sewing machines, l ighting control, paging, camera,games, cellular phones, musical instruments, sewing machines, l ighting control, paging, camera,pinball machines, toys, exercise equipment.pinball machines, toys, exercise equipment.

OfficeOffice

Telephones, computers, security systems, fax machines, microwave, copier laser printer, colorTelephones, computers, security systems, fax machines, microwave, copier laser printer, colorprinter, paging.printer, paging.

AutoAuto

Trip computer, engine control, air bag, ABS, instrumentation, security system, transmissionTrip computer, engine control, air bag, ABS, instrumentation, security system, transmission

control, entertainment, climate control, cellular phone, keyless entry.control, entertainment, climate control, cellular phone, keyless entry.


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MICROCONTROLLERMICROCONTROLLER

A Microcontroller is a computer on a chip.A Microcontroller is a computer on a chip.

Microcontrollers are single chip microcomputers, more suited for control and automation machinesMicrocontrollers are single chip microcomputers, more suited for control and automation machinesand processors.and processors.

Microcontrollers haveMicrocontrollers have

central processing unit (CPU)central processing unit (CPU)

memorymemory

input/output ports (I/O)input/output ports (I/O)

timers and counterstimers and counters

analog to digital converters (ADC)analog to digital converters (ADC)

digital to analog converter (DAC)digital to analog converter (DAC)

serial portsserial ports

interrupt logicinterrupt logic

oscillator circuitryoscillator circuitry

and many more functional blocks on chip.and many more functional blocks on chip.


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BLOCK DIAGRAM OF MCBLOCK DIAGRAM OF MC


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Criteria for choosing MCCriteria for choosing MC

Meeting the computing needs of the task at hand efficiently and cost effectively.Meeting the computing needs of the task at hand efficiently and cost effectively.

We must see whether an 8We must see whether an 8--bit,16bit,16--bit or 32bit or 32--bit microcontroller can best handle thebit microcontroller can best handle thecomputing needs of the task most effectively.computing needs of the task most effectively.

SpeedSpeed

PackagingPackaging

Power consumptionPower consumption

The amount of ROM and RAM on chip.The amount of ROM and RAM on chip.

The number of I/O pins and the timer on the chip.The number of I/O pins and the timer on the chip.

How easy it is to upgrade to higher performance or lower power consumption versions.How easy it is to upgrade to higher performance or lower power consumption versions.

Cost per unit.Cost per unit.

AAvailability of software development tools such as compilers, assemblers, and debuggers.vailability of software development tools such as compilers, assemblers, and debuggers.

wide availability and reliable sources of the microcontroller.wide availability and reliable sources of the microcontroller.


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Microcontrollers can be classified into various groups on the basis ofMicrocontrollers can be classified into various groups on the basis of--

Processor architectureProcessor architecture

Harvard architectureHarvard architecture

Princeton architecturePrinceton architecture

Memory embedded or externalMemory embedded or external

Embedded memoryEmbedded memory

External memoryExternal memory

Type of Memory usedType of Memory used

NoneNone

PROMPROM

EPROMEPROM

EEPROMEEPROM

FlashFlash

Company producingCompany producing

IntelIntel

AtmelAtmelPhilips /SigneticsPhilips /Signetics

SiemensSiemens

Dallas SemiconductorsDallas Semiconductors

InstructionsInstructions

Complex Instruction Set Computer (CISC)Complex Instruction Set Computer (CISC)

Reduced Instruction Set Computer (RISC)Reduced Instruction Set Computer (RISC)


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EMBEDDED MICROCONTROLLERSEMBEDDED MICROCONTROLLERS

When all the hardware required to run the application is provided on the chip, it is referred toWhen all the hardware required to run the application is provided on the chip, it is referred toas an embedded microcontroller. All that is typically required to operate the device is power,as an embedded microcontroller. All that is typically required to operate the device is power,reset, and a clock.reset, and a clock.

This type of microcontroller is mainly used in switching ON/OFF applications (This type of microcontroller is mainly used in switching ON/OFF applications (DS87C520)DS87C520) ..


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EXTERNAL MEMORY MICROCONTROLLEREXTERNAL MEMORY MICROCONTROLLER

Sometimes the program memory (control store) is insufficient for an application or,Sometimes the program memory (control store) is insufficient for an application or,

during debug, a separate ROM (or even RAM) would make the work easier.during debug, a separate ROM (or even RAM) would make the work easier.

Some microcontrollers (including the 8051) allow the connection of external memory.Some microcontrollers (including the 8051) allow the connection of external memory.

Such microcontrollers which can address the external memory are calledSuch microcontrollers which can address the external memory are called

external memory microcontrollers.external memory microcontrollers.

The 8051 can work very effectively as an embedded device or with external memory.The 8051 can work very effectively as an embedded device or with external memory.

An external memory microcontroller seems to primarily differ from aAn external memory microcontroller seems to primarily differ from a

microprocessor in the areas of builtmicroprocessor in the areas of built--in peripheral features. These featuresin peripheral features. These features

include memory device selection (avoid the need for external addressinclude memory device selection (avoid the need for external address

decoder or DRAM address multiplexers), timers, interrupt controllers, DMA,decoder or DRAM address multiplexers), timers, interrupt controllers, DMA,

and I/O devices like serial ports.and I/O devices like serial ports.


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BLOCK DIAG.BLOCK DIAG.


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COMPUTER ARCHITECTURECOMPUTER ARCHITECTURE

There are two major classes of computer architectures:There are two major classes of computer architectures:--

1. Harvard Architecture.1. Harvard Architecture.

2. Princeton Architecture (VON NEUMANN architecture).2. Princeton Architecture (VON NEUMANN architecture).

HARVARD ARCHITECTURE:HARVARD ARCHITECTURE:

It uses separate memories for program and data with their independentIt uses separate memories for program and data with their independentaddress and data buses.address and data buses.

Since there are two different streams of data and address there is no needSince there are two different streams of data and address there is no needto have time division multiplexing of address and data buses.to have time division multiplexing of address and data buses.

Data bus may have different size than the address bus. This allows optimalData bus may have different size than the address bus. This allows optimalbus width of data and address buses for fast execution of instruction.bus width of data and address buses for fast execution of instruction.

MCSMCS--51 family of microcontrollers by INTEL has Harvard architecture.51 family of microcontrollers by INTEL has Harvard architecture.

PIC microcontrollers by MICROCHIP TECHNOLOGY use HarvardPIC microcontrollers by MICROCHIP TECHNOLOGY use Harvardarchitecture.architecture.


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BLOCK DIAG. OF HARVARD ARCHITECTUREBLOCK DIAG. OF HARVARD ARCHITECTURE


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Modified Harvard architectureModified Harvard architecture

It is a variation of the Harvard computer architecture that allows the contents ofIt is a variation of the Harvard computer architecture that allows the contents ofinstruction memory to be accessed as if it were data. Most modern computers thatinstruction memory to be accessed as if it were data. Most modern computers thatare documented as Harvard architecture are in fact, Modified Harvard Architecture.are documented as Harvard architecture are in fact, Modified Harvard Architecture.

Examples of modified Harvard architecture are Atmel Advanced Virtual RISC(AVR)Examples of modified Harvard architecture are Atmel Advanced Virtual RISC(AVR)microcontroller , ZiLOG Z8Encore!microcontrollers,Texas instruments TMS320 digitalmicrocontroller , ZiLOG Z8Encore!microcontrollers,Texas instruments TMS320 digitalsignal processors.signal processors.


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PRINCETON ARCHITECTUREPRINCETON ARCHITECTURE

It is a computer design model that uses a processing unit and a single separateIt is a computer design model that uses a processing unit and a single separatestorage structure to hold both instructions and data. It is named after mathematicianstorage structure to hold both instructions and data. It is named after mathematicianand early computer scientist John von Neumann.and early computer scientist John von Neumann.

This architecture allows modifying the program easily, however the code storage mayThis architecture allows modifying the program easily, however the code storage may

not be optimal and requires multiple fetches to form the instruction.not be optimal and requires multiple fetches to form the instruction.

Program and data fetches are done using TDM (time division multiplexing)whichProgram and data fetches are done using TDM (time division multiplexing)whichaffects the performance.affects the performance.


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BLOCK DIAG. OF PRINCETON ARCHITECTUREBLOCK DIAG. OF PRINCETON ARCHITECTURE


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HARVARD VS PRINCETONHARVARD VS PRINCETON

1.Harvard architecture design use separate memory1.Harvard architecture design use separate memorybanks for program storage, the processor stack, and thebanks for program storage, the processor stack, and thevariable RAM.variable RAM.

1. Princeton architecture design use a common memory1. Princeton architecture design use a common memoryfor storing the control program as well as variables andfor storing the control program as well as variables andother data structures.other data structures.

2. There is an address zero in the instruction space that2. There is an address zero in the instruction space thatrefers to an instruction storage location and address zerorefers to an instruction storage location and address zeroin data space that refers to distinct data storage location.in data space that refers to distinct data storage location.

2. It stores both the instructions and data in a single2. It stores both the instructions and data in a singleaddress space, so address zero refers to only one thingaddress space, so address zero refers to only one thingwhether the binary pattern in that location is interpretedwhether the binary pattern in that location is interpretedas an instruction or data is defined by the way howas an instruction or data is defined by the way how

program is written.program is written.

3. Harvard architecture executes instructions in fewer3. Harvard architecture executes instructions in fewerinstruction cycles than the Princeton architecture. This isinstruction cycles than the Princeton architecture. This isbecause a much greater amount of instruction parallelismbecause a much greater amount of instruction parallelismis possible in the Harvard architecture.is possible in the Harvard architecture.

3. It takes more instruction cycles to execute the3. It takes more instruction cycles to execute theinstructions.instructions.

4. The original Harvard machine, the Mark I, stored4. The original Harvard machine, the Mark I, stored

instructions on a punched paper tape and data ininstructions on a punched paper tape and data inelectromechanical relays.electromechanical relays.

4. Instructions are stored in read only technology and data4. Instructions are stored in read only technology and data

is stored in read/write memory.is stored in read/write memory.

5. Instruction and data memories have separate hardware5. Instruction and data memories have separate hardwarepathways to the central processing unit (CPU).pathways to the central processing unit (CPU).

5. Von Neumann machine with independent instruction5. Von Neumann machine with independent instructionand data caches also has a separate hardware pathwaysand data caches also has a separate hardware pathwaysto the CPU for the same purpose of increasing the speed.to the CPU for the same purpose of increasing the speed.


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NOTE:NOTE:--

Some processors are referred to as Harvard architecture even thoughSome processors are referred to as Harvard architecture even though

instructions and data occupy the same address space this is because theyinstructions and data occupy the same address space this is because theycache instructions and data separately and pass them to the CPU viacache instructions and data separately and pass them to the CPU via

separate hardware pathways. As a result this characteristic is no longerseparate hardware pathways. As a result this characteristic is no longer

unambiguous.unambiguous.


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RISC VS CISCRISC VS CISC

CISCCISC RISCRISC

1.CISC1.CISC stands for Complex Instruction Set Computerstands for Complex Instruction Set Computer 1.1.RISCRISC stands for Reduced Instruction Set Computer.stands for Reduced Instruction Set Computer.

2. It becomes easier for the programmer but it becomes2. It becomes easier for the programmer but it becomes

complex for the designer with large number of instructionscomplex for the designer with large number of instructionsi.e. CISC.i.e. CISC.

2. It becomes easier for the designer but it becomes2. It becomes easier for the designer but it becomes

complex for the programmer with small number ofcomplex for the programmer with small number ofinstructions i.e. RISC.instructions i.e. RISC.

3. Compiler design becomes easier because of availability3. Compiler design becomes easier because of availabilityof large number of instructions.of large number of instructions.

3. Complex compiler design because of small number of3. Complex compiler design because of small number ofinstructions.instructions.

4. Complex instruction format because of variable4. Complex instruction format because of variableaddressing modes.addressing modes.

4. Fixed instruction format because of very few addressing4. Fixed instruction format because of very few addressingmodes.modes.

5. Variable instruction length.5. Variable instruction length. 5. Fixed instruction length.5. Fixed instruction length.

6. Complex control unit design.6. Complex control unit design. 6. Control unit design easier because of fewer instructions6. Control unit design easier because of fewer instructions

and hardwired implementation.and hardwired implementation.

7. Control unit uses micro7. Control unit uses micro--programmed unit forprogrammed unit forimplementing large instruction set.implementing large instruction set. 7. Each instruction is executed by hardwired circuitry7. Each instruction is executed by hardwired circuitrybecause of fewer instructions.because of fewer instructions.

8. Slower execution because instructions are read from8. Slower execution because instructions are read frommemory locations and decoded by the decoding circuitrymemory locations and decoded by the decoding circuitrywhich consumes more time.which consumes more time.

8. Faster execution because of hardwired circuitry for8. Faster execution because of hardwired circuitry forexecution instead of accessing from control memory.execution instead of accessing from control memory.

9. Variable instruction cycle.9. Variable instruction cycle. 9. Fixed instruction cycle.9. Fixed instruction cycle.


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MICROCONTROLLER MEMORY TYPESMICROCONTROLLER MEMORY TYPES

Memory is the space/stores where our programs are stored and executed whenMemory is the space/stores where our programs are stored and executed when

the microcontroller is powered on.the microcontroller is powered on.

In case of microcontroller the programs are stored in program memory also calledIn case of microcontroller the programs are stored in program memory also called

control store because it controls the operation of microcontroller.control store because it controls the operation of microcontroller.

Intels 8051 microcontroller family memory can be of various types as appendedIntels 8051 microcontroller family memory can be of various types as appended

below:below:--

1.1.NoneNone ::

Microcontroller 8031 does not have any ROM fabricated inside it. So it usesMicrocontroller 8031 does not have any ROM fabricated inside it. So it uses

external ROM.external ROM.

These types of microcontrollers are featured with external memory through I/OThese types of microcontrollers are featured with external memory through I/O

ports. In case of this types of microcontrollers two ports are used in addressingports. In case of this types of microcontrollers two ports are used in addressingexternal memory and they are left with only two ports. These ports can be furtherexternal memory and they are left with only two ports. These ports can be further

expanded to meet the requirements by interfacing PPI (Programmable Peripheralexpanded to meet the requirements by interfacing PPI (Programmable Peripheral

Chip) chip 8255.Chip) chip 8255.


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MEMMORY TYPESMEMMORY TYPES

2.2. Mask ROMMask ROM::The program which is required to be put into the microcontroller is put into duringThe program which is required to be put into the microcontroller is put into during

the fabrication process at industry and the product is ready.the fabrication process at industry and the product is ready.

This is done for mass production. When program is entered into microcontroller itThis is done for mass production. When program is entered into microcontroller it

can not be altered, hence not much useful for the programmer at the laboratory.can not be altered, hence not much useful for the programmer at the laboratory.

3.3. PROMPROM:: Programmable read only memoryProgrammable read only memory

It consists of array of fusible links that could be burned out by application of highIt consists of array of fusible links that could be burned out by application of high

current during the process of programming.current during the process of programming.

This provides an option for the programmer for burning the fusible links andThis provides an option for the programmer for burning the fusible links and

loading the program at the laboratory.loading the program at the laboratory.

Once the links are burned it can not be altered or reprogrammed. Some systemOnce the links are burned it can not be altered or reprogrammed. Some systemdesigning needs permanent programs to be put into them, then the microcontrollerdesigning needs permanent programs to be put into them, then the microcontroller

which has PROM is used.which has PROM is used.


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4.4. EPROMEPROM: Erasable Program Read Only Memory: Erasable Program Read Only Memory

It isIt is provided in some of the microcontrollers. This provides liberty to programmer to program itprovided in some of the microcontrollers. This provides liberty to programmer to program itand erase it if required.and erase it if required.

EPROM has ultraviolet light erasable memory cell so program loaded into EPROM can beEPROM has ultraviolet light erasable memory cell so program loaded into EPROM can beerased and new program can be loaded if required.erased and new program can be loaded if required.

EPROM memory cell consist of MOSFETEPROM memory cell consist of MOSFET--like transistor with a floating gate surrounded bylike transistor with a floating gate surrounded bysilicon dioxide above the substrate of the device. Silicon dioxide is best known as glass and issilicon dioxide above the substrate of the device. Silicon dioxide is best known as glass and isa very good insulator.a very good insulator.


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To program a cellTo program a cell

Control gate is connected to high enough potential to breakdown insulating layer.Control gate is connected to high enough potential to breakdown insulating layer.

Silicon dioxide break down allows charge to pass to the floating gate.Silicon dioxide break down allows charge to pass to the floating gate.

With a charge in the floating gate, the transistor is turned on (is conducting) all theWith a charge in the floating gate, the transistor is turned on (is conducting) all the

time, until the charge escapes (which will take very long time that is measured in tenstime, until the charge escapes (which will take very long time that is measured in tens

of years).of years).

Before programming, all floating gates of all the cells are uncharged and the act ofBefore programming, all floating gates of all the cells are uncharged and the act of

programming the control store will load a charge into some of these cells. Byprogramming the control store will load a charge into some of these cells. By

convention, if an un programmed memory cell is read, a 1 will be returned. Afterconvention, if an un programmed memory cell is read, a 1 will be returned. After

the cell is programmed a 0 is returned.the cell is programmed a 0 is returned.

So to see if control gate is ready to be programmed, each byte is read out of it andSo to see if control gate is ready to be programmed, each byte is read out of it andcompared with 0FFh(all 8 bits set).compared with 0FFh(all 8 bits set).


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To Erase a cellTo Erase a cell

Gate is exposed to Ultraviolet ray through UV window.Gate is exposed to Ultraviolet ray through UV window.

UV light energies the trapped electrons in the floating gate to an energy level whereUV light energies the trapped electrons in the floating gate to an energy level where

they can escape thereby the MOSFET is turned off.they can escape thereby the MOSFET is turned off.

It takes about 20 minutes to erase a cell.It takes about 20 minutes to erase a cell.

NoteNote--

Microcontrollers with EPROM can be placed in two types of packages:Microcontrollers with EPROM can be placed in two types of packages:--

1.Ceramic packages with a small window built in for erasing the device.1.Ceramic packages with a small window built in for erasing the device.

2.No window for erasing and are known as one2.No window for erasing and are known as one--time programmable (OTP). Thistime programmable (OTP). This

type of microcontroller is produced by Philips.type of microcontroller is produced by Philips.


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EEPROMEEPROM: Electrically Erasable Programmable Read Only Memory.: Electrically Erasable Programmable Read Only Memory.

This nonvolatile memory is built with the same technology as EPROM, but floating gatesThis nonvolatile memory is built with the same technology as EPROM, but floating gatescharge can be removed by circuits on the chip and no UV light is required.charge can be removed by circuits on the chip and no UV light is required.

EEPROM allows each bit (and byte) in the control store array to be reprogrammed withoutEEPROM allows each bit (and byte) in the control store array to be reprogrammed withoutaffecting any other cells in the array.affecting any other cells in the array.

This type of memory first became available in the early1980s and found its way intoThis type of memory first became available in the early1980s and found its way intomicrocontrollers in the early 1990s. EEPROM has been very successful when implemented inmicrocontrollers in the early 1990s. EEPROM has been very successful when implemented insmall, easysmall, easy-- toto-- access packages.access packages.

FLASH:FLASH:

In the late 1980s, Intel introduced an improvement to EEPROM that was called Flash.In the late 1980s, Intel introduced an improvement to EEPROM that was called Flash.

The difference between Flash and EEPROM is that Flash uses a bussed circuit for erasingThe difference between Flash and EEPROM is that Flash uses a bussed circuit for erasingthe cells floating gates rather than making each cell independent. This reduces the cost of thethe cells floating gates rather than making each cell independent. This reduces the cost of theEEPROM memory and reduced the time required to program a device.EEPROM memory and reduced the time required to program a device.

Rather than having to erase each cell in the EEPROM individually, the Flash erase cycle,Rather than having to erase each cell in the EEPROM individually, the Flash erase cycle,

which takes as long for one byte , erase all the memory in the array.which takes as long for one byte , erase all the memory in the array.


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VARIABLE AREAVARIABLE AREA

In a microcontroller, there are four types of internal variable data storage:In a microcontroller, there are four types of internal variable data storage:

BitsBits

RegistersRegisters

Variable RAMVariable RAM

Program Counter StackProgram Counter Stack

All the variable storage in the 8051 is implemented as randomAll the variable storage in the 8051 is implemented as random--access memory (SRAM), which willaccess memory (SRAM), which will

retain the current contents as long as power is applied to it.retain the current contents as long as power is applied to it.

SRAM can be referred to as volatile memory.SRAM can be referred to as volatile memory.

Each bit in an SRAM memory array is made up of six transistor memory cell as shown in Fig.Each bit in an SRAM memory array is made up of six transistor memory cell as shown in Fig.


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SRAMSRAM


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SRAMSRAMWhat this circuit really is a pair of inverters feeding back to each other.What this circuit really is a pair of inverters feeding back to each other.Once a value has been set in the inverters feedback loop, it will stay there until changed. Reading data isOnce a value has been set in the inverters feedback loop, it will stay there until changed. Reading data isaccomplished by asserting the readaccomplished by asserting the read--enable line and inverting the value output (because the read side containsenable line and inverting the value output (because the read side containsthe inverted write sides data).the inverted write sides data).


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SRAMSRAM

This method of implementing a flip flop is well suited to a microcontroller because it uses a veryThis method of implementing a flip flop is well suited to a microcontroller because it uses a very

little power (current only flows when the state is changed) and is quite fast. It is not very efficient inlittle power (current only flows when the state is changed) and is quite fast. It is not very efficient in

terms of silicon space; the six transistors required for each memory cell actually take up a bit ofterms of silicon space; the six transistors required for each memory cell actually take up a bit of

surface area.surface area.


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PROGRAM COUNTER STACKPROGRAM COUNTER STACK

Processor stacks are simple and fast way of saving data during program execution.Processor stacks are simple and fast way of saving data during program execution.

A stack is known as last in first out (LIFO) memory.A stack is known as last in first out (LIFO) memory.

Data most recently put onto the stack (this is known as a push) is the first item pulled off theData most recently put onto the stack (this is known as a push) is the first item pulled off thestack (this is a pop).stack (this is a pop).

Along with the return addresses for the subroutine, stack can also store data.Along with the return addresses for the subroutine, stack can also store data.

The 8051 initializes the stack pointer (SP) register to start storing data at address 008h of theThe 8051 initializes the stack pointer (SP) register to start storing data at address 008h of thescratch pad RAM.scratch pad RAM.

Stack pointer is incremented when push operation is performed and it is decremented whenStack pointer is incremented when push operation is performed and it is decremented when

pop operation is performed.pop operation is performed.


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Microcontroller FeaturesMicrocontroller Features1.1. CLOCKINGCLOCKING::--

Most microcontrollers are capable of running from a clock that is not running at all to severalMost microcontrollers are capable of running from a clock that is not running at all to severaltens of MHZ.tens of MHZ.

On most of the microcontrollers, there is built in circuitry to allow a simple connection of aOn most of the microcontrollers, there is built in circuitry to allow a simple connection of acrystal or other hardware, such as ceramic resonators or an external clock source.crystal or other hardware, such as ceramic resonators or an external clock source.

Crystal oscillator provides stable frequency operation.Crystal oscillator provides stable frequency operation.

The microcontroller might also have an internal ring oscillator built in, allowing it to run withoutThe microcontroller might also have an internal ring oscillator built in, allowing it to run withoutany external components other than power.any external components other than power.

Microcontrollers clock is used to sequence the execution of instructions.Microcontrollers clock is used to sequence the execution of instructions.

For each instruction, a specific number of instruction cycles is required for each instruction toFor each instruction, a specific number of instruction cycles is required for each instruction toexecute.execute.

Each instruction cycle is made up of a number of clock cycles.Each instruction cycle is made up of a number of clock cycles.

In the true 8051, each instruction cycle takes 12 clock cycles to execute.In the true 8051, each instruction cycle takes 12 clock cycles to execute.


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FeaturesFeatures

Power consumption by the microcontroller is less at low clock speed. At low clock speed electrical noisePower consumption by the microcontroller is less at low clock speed. At low clock speed electrical noisegenerated is also very less.generated is also very less.


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FeaturesFeatures

2.2. INTERRUPTSINTERRUPTS::--

Interrupt is some event which interrupts the normal program execution.Interrupt is some event which interrupts the normal program execution.

Interrupts are defined as requests because they can be refused (or masked).Interrupts are defined as requests because they can be refused (or masked).

If they are not refused, then when an interrupt is acknowledged (either by you or a computer)If they are not refused, then when an interrupt is acknowledged (either by you or a computer),a special set of events or routines are followed to handle the interrupt. These special routines,a special set of events or routines are followed to handle the interrupt. These special routinesare known as interrupt handlers or interrupt service routines and are located in special locationare known as interrupt handlers or interrupt service routines and are located in special location

in memory.in memory.The main line code does not resume executing until the interrupt has finished being servicedThe main line code does not resume executing until the interrupt has finished being servicedand the processor indicates that the originally executing function can resume.and the processor indicates that the originally executing function can resume.

Interrupt vectorInterrupt vector

The group of memory locations set aside to hold the address of ISRs is called interrupt vectorThe group of memory locations set aside to hold the address of ISRs is called interrupt vectortable.table.

PollingPolling

In polling microcontroller continuously monitors the status of a given device; whenIn polling microcontroller continuously monitors the status of a given device; whenthe status condition is met, it performs the service after that it moves on to monitorthe status condition is met, it performs the service after that it moves on to monitorthe next device until each one is serviced.the next device until each one is serviced.


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What happens when an interrupt occurs?What happens when an interrupt occurs?

Save the context register information.Save the context register information.

Reset the hardware requesting the interrupt.Reset the hardware requesting the interrupt.

Reset the interrupt controller.Reset the interrupt controller.

Process the interrupt.Process the interrupt.

Restore the context information.Restore the context information.

Return to the previously executing code (the mainline).Return to the previously executing code (the mainline).


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InterruptInterrupt

Context registers are the registers used by the interrupt handler during the operation of the code.Context registers are the registers used by the interrupt handler during the operation of the code.

The context information is typically saved on the stack as a series of push instructions.The context information is typically saved on the stack as a series of push instructions.

In the 8051 and most other processors, different interrupt sources are given different priorities. AIn the 8051 and most other processors, different interrupt sources are given different priorities. A

high priority interrupt will be serviced before a low priority interrupt.high priority interrupt will be serviced before a low priority interrupt.

By keeping the interrupt handlers execution very short, the probability that repeating interrupts willBy keeping the interrupt handlers execution very short, the probability that repeating interrupts will

be missed or another interrupt not serviced in a timely manner is reduced.be missed or another interrupt not serviced in a timely manner is reduced.

Interrupt LatencyInterrupt Latency

The time from the moment an interrupt is activated to the moment CPU starts to execute the ISRThe time from the moment an interrupt is activated to the moment CPU starts to execute the ISRof the corresponding interrupt is called the interrupt latency.of the corresponding interrupt is called the interrupt latency.


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PeripheralsPeripheralsMicrocontrollers communicate with the outside world via peripherals, such asMicrocontrollers communicate with the outside world via peripherals, such as

Serial communication interfaces: RSSerial communication interfaces: RS--232, RS232, RS--422, RS422, RS--485 etc.485 etc.

Universal Serial Bus (USB)Universal Serial Bus (USB)

Timers: PLL(s), Capture/Compare and time processing unitsTimers: PLL(s), Capture/Compare and time processing units

Discrete I/O: aka General Purpose Input/Output (GPIO)Discrete I/O: aka General Purpose Input/Output (GPIO)

Analog to digital/Digital to Analog (ADC/DAC)Analog to digital/Digital to Analog (ADC/DAC)

Peripherals include interfaces to microcontroller network devices to simplify wiring applicationsPeripherals include interfaces to microcontroller network devices to simplify wiring applicationsand not depend on using an external memory interface. These interfaces allow a microcontrollerand not depend on using an external memory interface. These interfaces allow a microcontrollerto be simply wired to digital devicesto be simply wired to digital devices--such as EEPROM memory thermometers, ADCs, etc.such as EEPROM memory thermometers, ADCs, etc.--andandother microcontrollers.other microcontrollers.

many peripherals are built directly onto the chip. There are hundreds of different 8051 partmany peripherals are built directly onto the chip. There are hundreds of different 8051 partnumbers, each developed to provide different features for different applications.numbers, each developed to provide different features for different applications.


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TimersTimers

A basic computer timer consists of a counter that can be read from or written to by the processor and is driven byA basic computer timer consists of a counter that can be read from or written to by the processor and is driven bysome constant frequency.some constant frequency.

The counters clock source can be either the microcontrollers clock or an external source.The counters clock source can be either the microcontrollers clock or an external source.

When the counter overflows, an interrupt request is given to the processor.When the counter overflows, an interrupt request is given to the processor.

Counter it self is usually 8 or 16 bits wide.Counter it self is usually 8 or 16 bits wide.


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Application of timersApplication of timers

1.Timer can be used for measuring the pulse widths.1.Timer can be used for measuring the pulse widths.

2.It can be used to add a specific delay interrupt.2.It can be used to add a specific delay interrupt.

3.It can be used to generate a PWM signal.3.It can be used to generate a PWM signal.

1.1. Measuring the pulse widthMeasuring the pulse width

To measure pulse widths, an external control or gate input is used to mask the clock sourceTo measure pulse widths, an external control or gate input is used to mask the clock source

except when the pulse is active.except when the pulse is active.

When the gate becomes high (the pulse is active), the counters clock source is allowed toWhen the gate becomes high (the pulse is active), the counters clock source is allowed to

increment the counter.increment the counter.

When the pulse becomes inactive (low), the counters clock source is masked and an interruptWhen the pulse becomes inactive (low), the counters clock source is masked and an interrupt

is requested to allow the application to read the counter value that is proportional to the widthis requested to allow the application to read the counter value that is proportional to the width

of the pulse.of the pulse.

If the counter overflows during the active pulse, the processor is also notified via an interruptIf the counter overflows during the active pulse, the processor is also notified via an interrupt

request, and it can increment a word counter used for sensing the pulse width.request, and it can increment a word counter used for sensing the pulse width.


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Pulse width MeasurementPulse width Measurement


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Adding a specific delayAdding a specific delay

To add a specific delay interrupt, the contents of the counter are reloaded with a set valueTo add a specific delay interrupt, the contents of the counter are reloaded with a set valuewhen the counter overflows, rather than be reset back to zero.when the counter overflows, rather than be reset back to zero.

To determine the interval between overflows ( in which interrupt request is made and the timerTo determine the interval between overflows ( in which interrupt request is made and the timeris reloaded), the following formula is used:is reloaded), the following formula is used:

Interval = (CountMaxInterval = (CountMax--Reload)/ClockFreqReload)/ClockFreq

CountMax is overflow value of the counter (for an 8 bit, it would be 256, and for 16 bit counter,CountMax is overflow value of the counter (for an 8 bit, it would be 256, and for 16 bit counter,it would be 65,536).it would be 65,536).

ClockFreq is the frequency in which the counter is updated (in 8051 it is clock input to 8051ClockFreq is the frequency in which the counter is updated (in 8051 it is clock input to 8051divided by 12).divided by 12).

This circuit is often used for driving peripherals that need a constant clock. In the 8051, thisThis circuit is often used for driving peripherals that need a constant clock. In the 8051, thiscircuit is often used to drive the asynchronous serial ports data rates.circuit is often used to drive the asynchronous serial ports data rates.


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Adding a specific delayAdding a specific delay


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PWM signal generationPWM signal generation

A PWM signal consists of a repeating signal with a pulse of given duty cycle (the fraction of the cycle thatA PWM signal consists of a repeating signal with a pulse of given duty cycle (the fraction of the cycle thatthe pulse is active).the pulse is active).

This fraction can be anywhere from 0% to 100% of the cycle.This fraction can be anywhere from 0% to 100% of the cycle.

PWM controls are often used for controlling the speed of a DC motor.PWM controls are often used for controlling the speed of a DC motor.


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PWM generationPWM generation


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PWM generationPWM generation

When the timer is less than the set value (the duty cycle value), the comparator will output a highWhen the timer is less than the set value (the duty cycle value), the comparator will output a high

value.value.

When the counter is equal to or greater than this set value, a low value will be the output.When the counter is equal to or greater than this set value, a low value will be the output.

To program this counter, the PWM value must be greater than the reload value to ensure that anTo program this counter, the PWM value must be greater than the reload value to ensure that an

active signal will be output.active signal will be output.

NOTENOTE::--

The standard 8051s timers do not support the pulse input measuring or pulseThe standard 8051s timers do not support the pulse input measuring or pulse--widthwidth--modulatedmodulated

outputs, but does support a number of operating modes that will allow you to implement theseoutputs, but does support a number of operating modes that will allow you to implement these

features in your application very easily.features in your application very easily.


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I/O PINSI/O PINS

8051 has four input output ports each having 8 pins . all ports of 8051 are8051 has four input output ports each having 8 pins . all ports of 8051 are

bidirectional and have the following three components in their structures.bidirectional and have the following three components in their structures.

D latchD latch

Output driverOutput driver

input bufferinput buffer

We must write a high to a ports bit in order to make it an input port.We must write a high to a ports bit in order to make it an input port.

We must write a low to a port in order to make it an output port.We must write a low to a port in order to make it an output port.

Never directly connect Vcc to the port pins. Always use a 10K resistor on the Vcc toNever directly connect Vcc to the port pins. Always use a 10K resistor on the Vcc to

limit the current flow.limit the current flow.

For any other microcontroller the number of I/O pins depend upon the model numberFor any other microcontroller the number of I/O pins depend upon the model number

of the microcontroller.of the microcontroller.


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PORT1 StructurePORT1 Structure


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WRITING 1 TO THE PORTWRITING 1 TO THE PORT

A 1 written to the port bit is written in to the latch and the D latch has high on its Q.A 1 written to the port bit is written in to the latch and the D latch has high on its Q.

Qbar is zero and is connected to the transistor M1 gate, the M1 transistor is off.Qbar is zero and is connected to the transistor M1 gate, the M1 transistor is off.

When M1 transistor is off, it blocks any path to the ground for any signal connected to the input pin and theWhen M1 transistor is off, it blocks any path to the ground for any signal connected to the input pin and theinput signal is directed to the triinput signal is directed to the tri--state TB1.state TB1.


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WRITING 0 TO THE PORTWRITING 0 TO THE PORT

If we write 0 (low) to port bits, then Q=0 and Qbar=1.If we write 0 (low) to port bits, then Q=0 and Qbar=1.

If Qbar=1, then the transistor M1 is on. If M1 is on it provides the path to ground for both L1 and input pins.If Qbar=1, then the transistor M1 is on. If M1 is on it provides the path to ground for both L1 and input pins.So any attempt to read the input pin will always get the low ground signal regardless of the status of the inputSo any attempt to read the input pin will always get the low ground signal regardless of the status of the inputpin. This can also damage the port.pin. This can also damage the port.


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READIG THE INPUT PINREADIG THE INPUT PIN

In instruction MOV A,P1 the status of the external pin is brought into the CPUs internal bus. This instructionIn instruction MOV A,P1 the status of the external pin is brought into the CPUs internal bus. This instructionactivates the read pin of TB1 (triactivates the read pin of TB1 (tri--state buffer 1) and lets data at the pins flow into the CPUs internal bus.state buffer 1) and lets data at the pins flow into the CPUs internal bus.


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READING LATCHREADING LATCH

Instruction ANL P1,A is an example of an instruction that reads the latch instead of the input pin.Instruction ANL P1,A is an example of an instruction that reads the latch instead of the input pin.

The read latch activates the triThe read latch activates the tri--state buffer of TB2 and brings the data from Q latch into the CPU .state buffer of TB2 and brings the data from Q latch into the CPU .

The data is anded with the contents of register A.The data is anded with the contents of register A.

The data is rewritten to the latch.The data is rewritten to the latch.


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Contd.Contd.

So we conclude that the instruction that reads the latch normally reads a value,performs anSo we conclude that the instruction that reads the latch normally reads a value,performs an

operation (possibly changing the value), and rewrites the value to the latch. This is often calledoperation (possibly changing the value), and rewrites the value to the latch. This is often called

readread--modifymodify--write.write.


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P0 structureP0 structure

By writing a 1 to the bit latch, the M1 transistor is off and that causes the pin to float. That is the reason whyBy writing a 1 to the bit latch, the M1 transistor is off and that causes the pin to float. That is the reason whywhen P0 is used for simple data I/O we must connect it to external pullwhen P0 is used for simple data I/O we must connect it to external pull--up resistors.up resistors.

For a P0 bit to drive an input there must be a pullFor a P0 bit to drive an input there must be a pull--up resistor to source current.up resistor to source current.


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P0 STRUCTUREP0 STRUCTUREPort0 does not have internal pull up resistors. It has open drain structure.Port0 does not have internal pull up resistors. It has open drain structure.

Port0 require external pull up resistors.Port0 require external pull up resistors.

Open drain in MOS is same as open collector in TTL.Open drain in MOS is same as open collector in TTL.


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Our I/O SystemOur I/O System

We can design our own I/O using 374 (with its output control always enabled) controlling the output driver ofWe can design our own I/O using 374 (with its output control always enabled) controlling the output driver ofanother 374.another 374.

274 is used to read back the state of the pin.274 is used to read back the state of the pin.

This method of providing I/O is almost exactly how virtually all microcontrollers except the 8051 usuallyThis method of providing I/O is almost exactly how virtually all microcontrollers except the 8051 usuallyimplement I/O.implement I/O.

In 8051 parallel I/O each bits output driver enable is usually controlled by a single bit in the control register. InIn 8051 parallel I/O each bits output driver enable is usually controlled by a single bit in the control register. Inour implementation, only one bit in the control register controls the output driver of all eight bits.our implementation, only one bit in the control register controls the output driver of all eight bits.

embedded system unit1

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