electronics meeting - brookhaven national...
TRANSCRIPT
GEM TN-92-239
Electronics Meeting - Brookhaven National Laboratory
Session Chairs: M. Shaevitz, D. Marlow
November 5, 1992
Abstract:
Agenda and presentations of the GEM Electronics Subgroup Meeting held at Brookhaven National Laboratory on November 5, 1992.
rime
J:: .l..11:::J>..4'..'••• .. 4<;;.L•J .... ='_ ... __ - - - -· Collaboration Meeting at-BNL
Thursday, November 5, 1992
Topic
S:30 Introductory Remarks
antral Tracker
Speaker/ Discussion Leader
Harlow/Shaevitz
8:35 Si Vtx Electronic• 8:45 IPC Electronics: Status and Front-End Simulation Study
Mills* Muaaer O'Connor 9:15 IPC Preamp Statue
alorimeter Readout I
9:30 Update on Dynamic Ranqe and Zero•auppr•••ion ltudJ.•• 9:40 LKr Preamplifier/Cable Driver ltatua 9:55 LKr/LAr Timing 1'asult• 0:10 FEP-baaed Level 1 Tri99er Statue
(Coffee Break)
roint Session with Muon Oroup (propoaed)
.o: 30-12: 00 Comment• on Muon Triggering Electronics Coate Diacuaaion
L2:00 Lunch
;alorimeter Readout 11
1:00 Status of ADC Readout Work at Nevia 1:45 Cal FPGA Status
Readout Requireaente for KCAL
~on Electronics (Electronics Group only)
2:00 Muon Front-End work at BNL 2:15 CSC Readout Requirements ' Option•
System Integration
2:30 Early results on transformers in magnetic field• 2:45 Groundinq and Shielding in GBH
DAQ
3:00 Virtual Level 2 Triqqer/DAQ Scheme 3:30 Diacuaaion
Plan for TDR
3:45 Work Aaaiqnmenta ' Schedule for Drafts
Plan for Coat ' Schedule Work (Optional for some)
4:15 Overall Plan for GEM 4:30 Electronics Coat Estimating Plan ' Work Assignments
rrabya IWacia* Takai Croaatto
Shaevitz tbd
Sippach Gara tbd
O'Connor Wixted
. Freeman Lau*
Dorenboach
Marlow/Shaevitz
Fischer et al. Marlow · · ·
5:00 Adjourn (the meeting may run somewhat later than thia, but it will ... _ • .:_.:""-'·• ... ~ ... 4.h h .. , 41\•nn PM\.
1
Presentation by:
S. Hahn
3
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" Custom Bipolar Integrated Circuit Designs for the Front-End Electronics of the Silicon
Tracker Subsystem for SSC-GEM Detector
Sanakoo F. Hahl} and Mauroon M, Cafferty -I Loa Alamo1 National Laboratory, Loa Al1mo1, NM 87545
Abstract
Bxlnmtly hllh rlllilatlon IN!OklrDllllll (up to I ~ aver a 10 yNr llltllmt). a larp .number of ob111nt11 (3,2 ld), hl&h lpMd. low nola rtqul1'1"*111 (1;5o •INtrtRI l\?yfl), AlllllOW poww co-p111n (1 mW/obanMI), pr111nt a Alrm!l!IW• chllll8" fir ~ lltolrlnill of 1119 1!1141n ~ .-.,111111 Air lilt llC.cmM (Olmma, !ll~n, · Muon) ~. llmulatlllR f'9111111 fmll tbl \llpolflr ""~ fir 811 lllllllq l• .. p<ll ol~l 11 Pfllllll ~ .. lllJUl!l A'llm 4U!~ll llllp _ 4'tloien ani prueatld Ullnl A'PAT 1!1111 aimta llllllllllVr mo4ela.
I. INTRODUQTION
The decillon Wlll . nwt. •rller that a \llpelar to leehnolol)' wu 10 111 1iHd tor Iha prOl!lllllll ol tht ..... 1lpal1 llvm Ille ll"ltrlp dtteeton to 11!ff1 1119 nolll, 1J1-.c1 and poMr requlr1mtm1, Tb• m1ln lu~n of ll!t •"'1•r .IQ 11 10 llllllit 1111 llllllllllll\IOUI lop9 cMolalon of •lthtr 111! or nohit per miry b9am-oroulllf (with a perlocl of Iii ns) tor_,,. ~hannel bued on thl ~1- of obarp colleelecl llvm ·the strip dotKton, piat ID Iha ll)W CJC:CNP&ni:y of 1111 lhan 1 %, the dead-lime of the clroull operation betwoon minll oan be 11
10 the 90mpar1tor. Without the ratorallon, the drift of the D~ lfVtl WDllld pl'lllRI a NrlDlll oontrol pniblem lo the lirGUI\ 8f11J1\IDll (Plpl'I 2). . Thi IMMllplrlllllr clNlgn 11 RrtltJl!lferward wlt!i a illir,NAllll•palr lllpvt 111p followed by GUmnt•mlrror ampllft~ ftlr 1111mn1 euqnn (Ptaure l).
~lltOM lllMIHO
. .• 1, ';
Q~ Ill
IM
lltll Ill lltll UK IK IOO
· much 11 i'O RI. Tho dulgn featuru and the ml\lor simulation results aro deacrlbed. ,
Pia. l Prlllllnp .t: ln~nnedlate-lllgo amplifier
·,
. II. DBSIONFBATURBS I
The preamp U101 tho familiar cslCOdo conft111rallon tith an Input transistor 1eometry of three llmu Iha area of the minimum .,Ometry traneWiin tq rodl!G!I the not .. ffclm. the b8lo spread rul1ianc;t. 1'11!1 ~ rulstor Ind ~t9r 1et the 1haplftl time of 30 RI. The t'Mdblck rulllOI' I• made 11 larp 11 poulble for minimum noleo conlrlbuUon while nmahila1'lmlll •llOlllh to maintain ,_nably oonstant bias conclltlo111, which IN Hlllltive to transistor pin ~. ovtr the liletl11111 of tbl 1)'1tem. ,
1'111 lntetlllldla~ !llllPllllfr 11 a minimum ~mpoillnl 111119 which 11 very Nlllltlve to the bias l4V9I 11 the base of Q22. The rulllDn, JU and R6 11'1 acUUllld ft!r maximum ' poAlbla pin without 11111hln1 Q22 lnlD 1111n1lon. This maxlmlzu Iha 1lpal to nolte ratio from lhl1 lllA (Flpro 1),
The 1haperlbulllne rutoror u,. has a ciOMd 10\)P pi11 of about eJ1h1, lor the 1l1nal, with a 1111111 111'in1 of llboul 40 mV for a ~ 11tctron Input char... The blloline rcstoralloo cl~lt cs""' IOD19 nol11 dl1radatlon but has a crucial role of 1lablllzln1 Ibo DC blu lmil of the Input node
9
FRQM BIASING NElWORK
R21 2.2K
QI IX
Cl
~IP
R4
IAIELINE ~l!ITORER
Pl1. 2 ShapoMmplUlor
tf,IY
... ..
.. ...
Q
••
......
... .. °' • ••
ft•• = .. ..
,.,.IT ITAlll
ftll ...
._.... '' I,
... ... ...
' ' ' JIJ. 3 lehlma1l11 for Nllll~Om ll!)'Olll lllilizlna lltl AT.,. At.Al JO &llf ~
Ill. Sn.rut.AnONRBsULTI
A. AT&TTileArt'Q)'ALAJJO
Simul1tlo111 were ,,...rormtd uatn1 model• ft'om !ht AT.tT CBIC·V PfOll'I', A dtllp lrlJICI on the ALA! JO Ult array modtlt will. bf lllbmlta..i IO ATAT for 11mloQUllDJ11 fabricalion, and Ibo chip wl~I be teated wbon avallablo. The schemalio and lhe plnoub. aro thown In Plauro 3. Tho Ille array 11 for 1mall-tcalo 1pplloaU0111 and conlal111 minimum area geometry 1ra~lston of 32,5 x 47 .5 11m which aro IOo large for tho final design. The final design will be based on smsllor geometry lranslslon.
Slmulallon results ualng Mlcr0Slm'1 PSPICB were obtained for charge lnpula from . 6000 ol~ron1 to 48000 oleclro111. The c:urrenl 10urce 1lmul11lng Ibo waveform out of a 300 11m lhick PIN diode (lJ 111hown in Plauro 4.
1.a,. .--.... , .... ...--.-...---...... - ...... ___ _
1.0t;I --- __ ,____,
I ICICUln -.- ---+-·--- --....... . .U.::.--. -- ~ ·-
Plpn4
Simulation1 were run for llrip lengths ot 6 cm, I 2 cm, and 18 cm with nominal lranlislor current gaiDI for beginning of
lift ' 1114 lew ~ plfti '9r ..... Ind ., lit. Mf11111114M, 1'ht llrlP dltN!or. WU~ llllllf lumped ~ willl Q!ffl ll!'IPI and tiv.o ampllft~ In: pirall,I u lhown Ill Plpre ' 1a1 10 ~ ~illina elftlotl bolween • .i1....ft. !lblnnelJ, ' ' ' ·, . ...,,..,,...... ·''
_..__NMATIOM9 1111111 mW1n10 ... 1011i>litcaWAL1NT QllJCUlf l'Oft ~I OM 11C1D4 ~---llC'lNllllCll
1 ...
Piauro' I . ' , ' ..
•111111lallon ruul~ between U11n1AT&T111bclrcult modol1 for tho l'OllJton and oapacllon and u1tn1 Ideal nalltOn and oapaoiton won vlrtllally ldonUoal, but tho not• perlbnnanc:e w-- !, aliout I~ wont for -~ IUbalrqul\ Ulil&On and oapatjlOn· Ti1' 11mul1tlo!1 11- for . !'1rfl! lllllplillen 11Ulltln1 all '""°'roult lllOdol~ were l!IUCh lonpr lhan P~lllll, ~. Ideal. n1l11on aiid capaolton Mn lllld In all mbleqll!lnt re111lb. . . , . ~cal llanll• at tho Input ot tho r:ompuator to~ It c:m
llrip length, ... , end lqJocdon are lhown In Plsure 6 while the comparator oulpllb are 1~ In Pll!lf'O 7. Note !hit tho time-walk i1 lllCUllred at the filling edge of the comparalor output waveform to take advanlago of the plCUdo zerocroning lime pick-off elfecl.
10
... ·-·-· ---~-··--· ... _ .... __ ,._, . ...,-~·'1-i··-·-· ....... ~ .. -····--·- .... ~ .. , .............. .
Plprt 6
, Flgure7
· ~ 1lmulatlon l'Cllllli are 1Ummed up In Ta!>le l for · beglnnin• of lifetime •DC! ~11d of lifetime. Small llignal amplitude, ti'™! walk, and noll!l r,111111 •"!! 1hown for 6 Cm, 12 cm, •ncl 18 cm detector ~trip l•nJlhl. ~ amplltud' ~ -•ured for tho 60!>0 tloctron i11pu1. Tim, wal~ wu meuured for 6000 lo . 48000 electron inp111t .. with ~ comperalor lhrtlbol4 !mil llCI to 60% of ~ •mall 11Pal ...i.., for each ~r llrip l.uth. The 1111111 wa1 calculated at tho lnJllll to tho comparator. · ·
. .. B. Harris UHF
Slmulallo111 ware alto performed U1in1 mod•ll for Harrl1 UHP •mall pomatry ll'lllll1tor1 for J 2 om 1114 II om dotoctor 1trip lengtlla.
The nollf for the l2 cm fllr-end wa1 2''40 ellqlrona ~ 2210 eltctrou lor Ille near-end. TIM 1lma walk - 13.7 RI
· for Che tllr,.cnd and 10.2 na for Ille Dllr-cnd with tho threshold level equal to .5000 clectro111 (no 6000 electron • triqcr).
The noise for lhe 18 cm far-end wu 3550 electrons and 2710 ol~on• for the near-end. The time walk Wal 9.1 hi
for the fir.end (no 6000 or 12000 electron trlger) and 9.0 01
(no 6000 electron trigger) with the threshold level equal to 62'0 eleqron•.
i,•
Table I
IV. CONCLUSION .. A preliminary design for the front-end electronics for the ·
Silicon Tracker IUb.Y,.em for the SSC-GBM (Gamins, Blec;tron, Muon) Det19!or bu been 1lmulited and will be IUbmltted to ATAT for 19ml-cu1tom filbrlcatlon.
Tha reaulll 1how eiccollent beainnlng-of-life perfi>rmance and ac:eoptable end~ I~ performance (10 year lifetime, 5 MRad total dual) fbr required time walk (<16 na), with the given power (I mW) for a 12 cl!I dotector ltrlp length, but clearly d•gradtd performance at 18 cm lengtlui .
V. REf'BRBNCBS (IJ W.C. lallor, H . .J. Zlock, W.W. Klnnlaon, K. Holzcholter,
"It Modal for tho PerformaDOI 11f SlllOlln MicrOllrlp Dtllolon•, N"ol•• l"nru111•nl1 and Al•tllod1 In Pllyrlcs R•ntwh, A303 (111?1) pp. 285·2117 ·
(2] Iuy Klpnl• "An1la1 Pront•Bnd BlecitroniC. for tho SDC Sllioan Trac:ker", Warbhop on Pront•Bnd,B~niCI for Blllcon Detectors at Jluturt Hlah Lumlno1i1y Colllders Y •llow1toD1 National Partc, Wyomlna l'7 Stptembe; 1992 •
11
Presentation by:
Jim Musser
13
. t>-~··all r-o."~"u (j ,..,.,,.,.~ s !ft:~~ () t.a. Re.' .,.t ba ~ow..\~
-1'·:~
~e A~ t>~~ar\. r-e.\): .. ~ tJt\) io/fl.,.e t,, t>"o~ frol>L.fW\ tt.60/ueJ... . · ·
F~t:>c.: j.IA-'looP r .. ~t,,. o~-+-..A..l ~ u. .. ~. c,,.•. LI l ~ ..... , c."' e,,., ~c.r ooe .. olt#fl.
15
READ - WRITE ADDRESS GENERATOR
- FF register based status array
Indicates write protection of an address for readout
Two status bits read out per event clock
Status bits control skip logic to pass over protected write locations
- Parallel adders
Generate skip addresses
Status bits select proper adder output for next address
Write address latched for external analog memory and internally for reading out next status bits
Read address is delayed by the trigger calculation time and is latched upon receipt of a trigger signal
Read addresses are pushed into FIFOs for eventual readout
- Status of Read - Write generator
Schematic capture completed
Functional unit delay timing completed and passed
Optimized routing in Xilinx IC in progress to meet system level speed
Scheduled for completion by November 92
16
·'
Aolcl 1,4, o.ncl 7 .
;' ...... 21
Select 1,4, or7
;' "' 7 /
FF register ck ' / 7 / 7 / 7 ........_
/ I / / slice write tlMe
write sto. tus o.ololress FF row/coluMn clecooler
I/ v 16 / coluMn 8/ row
I QI +' d 2-8x8 FF write 16/ BO +' sto.tus o.rro.ys VI I /E s... +'
/ +' /
Bl SJ. 128 VI :J 8/ +' 0 ~c +' VI
I 1oclk
17
• 4.· •
\
AO l. '.
Al. 0
A2 0
A3 0
A4 0
AS l.
A6 l.
BO 0
Bl. 0
i-00
S/RS I 0
CLOCKS 0
MC LOCK 0
-0 l.
-l. 1
I WR2 1
-3 l.
-4 l.
-5 l.
-6 0
I ' I I I 3270.2 3154 3203.8 3253.6 3303.4 3353.2 3403
ns'
READOUT CONTROLLER IC
- Three functional blocks
Read - Write address generators
Timing And control
Data readout
- Prototype technology
Xilinx field programmable gate array - Static Ram based structure
Three chip solutlon -Two Xlllnx 3195-3 ICa & One SAAM
Xilinx 3195: 50 - 80 Mhz system level speed
Great~r than 9,000 nominal gates per 3195 IC
- End product technology
LSI Logic LRH20K radiation hardened series gate array
Guaranteed total dose specification 3E6 rad (si)
Silicon - gate 1.0 micron ( 0.7 micron effective) 2 - layer metal HCMOS
19
Timing & Control/Data Readout
- Timing & Control
Flip - Flop synchronous state machine
Synchronous with the event clock
Generates all 1ub-clock1 and control 1lgnal1
- Data readout
FIFO data buffered from the output of. eight Flash A·D converters
SAAM stored thresholds are magnitude compared with FIFO buffered data for zero suppression
Non-suppressed data are pushed Into a FIFO for data frame packing
Non~auppressed data, read address, bunch crossing ID, and frai:ne sync word are packed into serial data frames
Data transmission is synchronous, frame synched communication over' fiber optic link
- Status of Timing & Control/Data readout
Block diagram completed
Schematic capture In progress
Scheduled for completion by February 93
20
..
t\:) fo-6
BO
Bl
Aclcl 1,4, o.ncl 7
21
Select 1,4, or 7
7
FF register
7
write sto. tus FF row/colul'ln clecocler
16 J c:olUl'ln B1 row
I ' ..
+'
slle:e
d I I 2-8x8 FF write +'
" sto.tus o.rro.ys .L !.. +'
+' R
11201 " 18 ::1 +' d +' .. ---'
bc:lk . 8
4 I push sir oe o.srt pop c:htl
Aclcl L4, o.ncl 7
21
..---1--1 Select 1,4, or 7
7
FF register ck
Reo.cl/'Write Aclclress Gen. 11/2/92 Rev.3
7 1 , •push / 7 bit x 6 cleep FIFO
reo.cl status FF row/colurm clecocler
161 COIUl"ln 8/1 row
Li .. +' d I I 2-8x8 FF reo.d +' sto.tus o.rro.ys ..
IOI!. !.. .... .... .ii I 128 •
BU~ d .... .. ---'
bclk
pop
-~ 7
FF register
reo.d tlMe slice. sir I o.clclress • :>
subtro.c:t 1
1-+---------.1 reset
push set vs et
7 x 3 deep FIFO
subtro.ct 1
i---------_J set
esr
set esr vset bclk loo.cl c:k ep/s vo.llcl c:onvertl. trigger
shift/loo.cl TiMing 8c Control FADC
usn srd swr w-do.tci zero ID e vo.llOI vo.liOI vo.licl ~~n~
f' l
F' p
F"AD 1-8
ADC ush
-c /
I\:) N
d fpop ~ ---~ 0.
~ /
do.to
I do.to. VO.lid
rec.cl ti Me slice
sync word
c A>B=push
0
l'I
p.
EJ. /
reset
I bunch
push
ID /
counter /8
~ /
push
/
/5
pe3 8 / v do.to. OU
I t
dpop 3
8/ 128 x 8 do.to. - s srd
t / SRAM
FIFO w
0.
t 8/ swr e / g
I pe2 •
3 8/ V do.to. In zero VO.lid s
shlft/lond t
I 0.
ID t
Po.r. valid e
I / . to
To F'lber /8
3 serlo.l optic
c:lpop x-l"lltter bunch - s
ID t
I 0.
F"lf"D t p/sclk e
pel ' Do.to. 3 Reo.dout Bunch c:lpop
& --- s 11/2/92 't sync
0. Rev. 1 F'IFD t e
sync vo.llol peO
23
Will f ••'""''"' ~~
IPC Front End Simulation
• Use GARFIELD to simulate IPC
4 mm chamber thickness 2 mm wire spacing 20 micron wire diameter 50-50 CF 4 C02 2700 V operating voltage
• • .. • • u
E Field vs Position • u u u .. .. .. ..
Drift Time Contours . .
.• ... :.:~ .
\
•• ·----~---1 . . .
24
•• .._._.~~.......,..<.-~~
I I C t I I C C i I °C I cl
• .. • .. .. • " • " • u
• • .. ..
-~""'
c c rt 1 c c r 'cc ct ct c a tr t ti, - . .......
IPC Front End Simulation
• Drift Velocity vs E-Field based on IU measurements • Diffusion - based on pure C02 , CF 4
Drift Velocity vs E
Diffusion vs E
25
I ~ f: .. ~ ..
" ... u u w .. .. u -·
..
ltCtllCllCC : Lea C:4'J SEIP ., IJ't:lll llt"'>
'-'---~~~~~~
1111111111111111 .., 111/1'1 £11/1' •• •Ion: torr].
IPC Front End Simulation
• Simulate signals in IPC includes random trajectories
diffusion Landau fluctuations
-2.5
-5
-7.5 .
-10
-12.5 .
-15
- 17.5 -
-20 -
w............._,_._.._,_.._._._.._.__._.__.__,_W...W'-'-'-''-'-'--'-'-'-·l_._,'-'--'--'---'-'-'-~ 0 50 100 150 200 250 300 350 400
(ft•>
-·..!·· - '· •. -_ .:~ . : ": '.
26
IPC Front End Simulation
• Simulate signals in IPC includes random trajectories
diffusion Landau fluctuations
-2.5
-5
-7.5
-10
-12.5
-15
-17.5
-20 -
0 50 100 150 200 250 JOO J50 400
_:.:_ ..
27
IPC Front End Simulation • Apply transfer function from preamp/shaper
Based on measured response of prototype . , amps. Pole Zero has been added to eliminate ion tail.
Amp. Impulse Response. Function
I pC input 3000 r
2500
2000
1500
1' 1000
/ 500
D
-500 D 20
ll
~ ~
40
28
~------,.,../ _L
BO 100 120 1~0
amp response
160
IPC Front End Simulation
2400
Output pulses 2000
1600
1200
BOO
400
o_J I ' I , I I I , I I I I I I I I • I I I I •.....J...J......::r::=.,,.JJ
0 20 40 60 80 . 100 120 140 160
wire sinnol
800
700
600
500
400
300
200
100
0 0 20 40
29 . WIRE SIGNAL
IPC Front End Simulation
• Choose position on pad at random • Use position to make three pad signals according to
known induced signal distribution. • Sample three pad signals at 60 Mhz. • apply 3 types of 'smearing' to samples
noise - added to sample usina normal distribution time jitter on sampling points shaping time errors ·
30
IPC Front End Simulation • Electronics Noise
Look at three samples - (3rd, 4th, and 5th )
Approx Sample Loe.
2000 I~ 1600
1200 s .
800 -
' ... ,: _ _.:: ·. ,1. . : ·-:~ ·.·. .
31
a ~"°'L.lr. • ~"° ... 1c •• ,_. t".L~~ .,;4&f\e..\. · al:"'.
i':4 "'..,...,~ '·. s .. ,s, i• 1c_...." •ft.a...cul c.~ .... , .. al:.,\. "'· td )(.
~ .. -a.c·~· S', .. a.s "'"' · s, s .... ~ .. s-1
32
IPC Front End Simulation
4th sample x (fit) vs x( actual)
ID 1000000 " ENTRIES 965
O.OOOE+OO 0.000E+OO 0,QOQE+OO O.OOOE+OO 965. :Q,OQ.OE+OO
2 - O.OOOE+OO O.OOOE+OQ ;.p:OQOE+OO .....
~ . ~f~i~·~· ·. ~
....... ).:-·. >- t'·
.~ >- .1: ~ /' >- ·'i···
·~sf· >- It'
,,.f.I. ..•. " ,,.-r~
,:..;~'
~ -i~ f: .. ., .. ,.
>-_;j'f:' .. ..;~'i:·'
·.->-__ .,t/"i)y.·.
0
-1 - ·.,:ff' ... ,>;
:1! . .J.l.
w~:
>- .>~·:-:,_'1·· .. . ... . I ~· ~
.. •.• .. . , -2 ~ ·:;- ·.::--.-
" .. ..
->- . . • • I . . ' I . • • I • • • • I . . . . I . . . •
-2 -1 0 1 2
SXz4 VS XzlN
33
IPC Front End Simulation
4th sample x(mean) vs x(actual)
2
1 -
0 -
-1 -
-2
-2 -1 0 1 2
SWXz4 VS XzlN
34
IPC Front End Simulation
• resolution vs noise level
I ample 3 Rea olullon
3rd sample
(l.•t.•li) •IN•V
IO •
11: • •
• 0
0 1 2 3 "' NolH (mV)
Sample 4 R eaolullon
"'° •
4th sample
= -;-30 • i· Cl g 20 : • " '& 10 • I! -
0
( le<tS,•S,) I ¥81MV 0 1 2 3 4
Nol•• (mV)
Sample 4 R eaolullon
60
5th sample
( ··--·~· .,) : , .... ti
Ii •
1: • •
• 0
0 1 2 3 4 NolH (mV)
35
IPC Front End Simulation • Noise vs Resolution
Average 3/4/5
40 6 'Ci)' 30
·.;= c ·.: e 20 0 u U) ·s 10 ~-
Sample Ave. Resolution
• .. ,., -
• •
•
Q+--~-1-~~+-~-+-~---"
0 1 2 3 4
Noise (mV)
36
IPC Front End Simulation • Resolution vs Time Jitter
Average 3/4/5 No electronics noise
Pos. R esolutlon vs Time Jltt•
~ 60-g 50 ~ 40-'e 3o--, 20->-
• •
•
~ 10 • ~ Q-t-~~:f--~-+-:~~-+--;~---1;
0 0.5 1 1.5 2
T lme J ltter (ns)
37
. -..
•
IPC Front End Simulation • resolution vs shaping time errors
No electronics noise No time jitter
Pos. R esolutlon vs S haplng Error(%)
80 •
• -U) Ln._
• C UV
U) = Q) t3 40·
a:: ·- 20 E ,_ - o---·----~·---------1-:------~:
•
0 20 40 60
S hoping T lme Error (0/o)
Sample 3/4/5 average
38
IPC Front End Simulation • TO resolution
TO= (sl + 16*s2+32"'s3)/(sl+s2+s3)
TO res. vs noise
TO res. vs shaping . time error
TO R91olut.IM
I 1.04.,
1.03·• • '
• • • 1.02 . . . '
0 1 2 3
Noise (mV)
TOR esolutlon vs S hoping Error C°fo)
";'4 .s. 3 • ' ., 2 c! 1 • ~o •
0 20 40
S hoping T lme E nor (%)
39
•
. . 4
•
.
IPC Front End Simulation
• TO vs time of first electron at wire
ID 1000000 ~
ENTRIES 616 O.OOOE+OO O.OOOE+OO O.OOOE+OO O.OOOE+OO 616. O.OOOE+OO O.OOOE+OO O.OOOE+OO O.OOOE+OO
:
22 - '
" :
' .. i
'-- ! ' :
' I I '
20
i I ! ' I
' • I
" I I !
' i :
!
18 '- !
. ' ; ;
16 -. I . I . I . I . I . I . I I .
0 2 4 6 8 10 12 14
(S2z3+S2z4• 16+S2z5•32)/(S2z3 ..... S2z4+S2z5) VS Tz 1 PE
40
AO 1
A1 0
A2 0
A3 1
A4 1
AS 1
A6 0
BO 0
B1 0 . ~ j-iolS/J\B 0
CLOCl!CB 1
MCLOC:K 0
-0 1
-1 1
WR2 0
-3 0
-4 0
-s 0
! '-6 ' 0
I I I 6175.2 5992.6 6042.4 6142 6092.2 6191.B 6241.6 6291.4 ,.. ..
IPC Front End Simulation • TO resolution
TO= (sl + 16*s2+32•s3)/{sl +s2+s3)
TO res. vs noise
·TO res .. vs shaping time error
11.04··
11.03· lit
! 1.02 0
';;' 10 a .._ .. g 5 Ill
CD ~ 0
0
·' ·-' - .
42
TO R eaolutlon
• • •
1 2 3 Noise (mV)
TO R esolutlon vs S haplng Error (°/o)
• • •
10 20 30 "° S hoping T lme Error ('1.)
•
4
•
IPC Front End Simulation • resolution vs shaping time errors
No electronics noise No time jitter
POI. R•oluttoA VI Stt~g Error ('4)
200·· - • . ~ 150·• ~ g 100·" a: ·- 50 • •
!. 0+-~~--1---·~~~·f--~~~; •
0 20 40 60
S hoping T lme Error (°lo)
Sample 3/4/5 average
43
•
Presentation by:
Eric Prebys
45
Update on Zero Suppr~ and Dynaniic Range Studies for the GEM Liquid Argon
Calorimeter
Eric Pi:ebys, Princeton University
November 4, 1992
1
47
Zero Suppression Schemes • Scheme 1- The simplest zercrsuppression. Read out
only those channels which are above a certain threshold. For this sort of suppression, the thresholds must -be kept fairly low to reduce the losses in the low en-ergy tails.
• Scheme !- In this scheme, if a giwn c:b1nnel is above threshold, all neighboring d!annek (fnmt and back) are read out. ~erhaps difficult to implement in practice, particularly at the boundaries between readout modules.
• Scheme 9- This is a fairly simple scheme. ff any channel is above a given threshold, ell d9e dw>nels in its 5 x 5 readout n1odule are read opt, lront and
back. ••••• ••••• ••••• I Ill 11111
• Scle11te 4- 'Thi'5 is sxne•W Yr !k la t gbeme? except tJnat in addition to tAe ~ <d comtaining the aibove-thceshold chamnd, tlpie lpordsjog rows from t!e drrt • NJ! rad,.,
48
l•I.JrlU~L:..... D••••1;; n•••••"' u~:•-••n
KJ • • • • •n u•••••u rJ1r.r11na'llo
E ff~,~-.·"._·.\~~~ z.,,c
o-t Supp. F"oc.
1
-1 10
-2 10
., ··: .. · .. ' .. .. \, ..... :.~.· ... .. \ ..... ·,_ ' ·.. ... i. ···... ··e ~ ·. .. ' ·.. · .. ' ·. · ..
• Scheme 1
• Scheme 2
'f' Scheme 3
0 Scheme4
... ~... .... ..................... ·· .. .
\ .. ·,. • .. •. "'·,·,.·.. . . ... . . . ..
............
0 0.2
.......... · .. · ..
0.4
· .. ~
0.6
'········· ....
0.8 1 Threshold (Girl)
Figure 1: Zno suppression factor n. sero suppression threslaold for the varioGs ~ discu.ed.
• 49
•
•([)/[
0.2
0.175
0.1$
0.12$
0.1
0.075
0.00
0.02S
•
<([)/[
0.07
O.OI
.... 0.04
0.03
I a.02
.... • .....
<tQ.11 0.1 ,--~~~~~~~~~~~~~~-
1 Cev7
'
(o)
,.-·
i~
.., 2 ................
(c)
....
·-· ·-· ·-· o-•
·---·-
·-· ·-· ·-· o-•
-'
o(l)ll
0.04
..-... ------
• . ...
•
50 GeV7
.. ' --·-······
(If)
.. ..
. -· ·-· ·-· o-•
·-· ·-· ·-· ·-·
-F~ 3: Energy raolutioa vs. llel'O supprssioa factor for 'Ario. suppt"essio. KMmes with (a) 1 GeV; (b) 5 GeV; (c) 10 GeV; wl (4) 58 GeV pitotom.
10
50
·-
-
~12J.'.?ression Scheme 1
0
";, ______ N_o_N_o_i_se_o_r_P_ile---up _____ ___,(o...,.)--..
0..3
0.25
0.2
0.15
0.1
0.05
00
0.24
0.2
0.11
0.12
0.08 ..
0.04
00
_ NoZaroSupprrrr'or
----- Su~ 11fon Foc:llr •.0%1
•--··----5 10 15 20 25 lO
MiNi119 Et
---· . ' ' Standard Noite ond Pile-up (b)
'
~ ....... --' '---
._ --
10 15
.-- No Z.o S...W111lon
Suw111· cm Foc:Ur-.026
20
MiNing Et
Figure 6: Eft'ect of zero a.,pression on the total missing Er~ (a) without and (b) witla t'--al ucl pileup noise simulated. Tk ~of ~ 1 aero •ppz zwi.>a are ..._,.. by the superimpoeed lmeogrum.
13
51
r-------.
0.24
0.2
0.18
0.12
0.08
0.04
SueJ2ression Scheme 2
Ng Ngj• « fflle-ug.
~-- No Z.. 5uppr ••
5 10 15 20 30
(I>) Standard Noise and P"de-~ -
:.:.---1---L~ ... V No z.o ...,,, .. ,,. I r~~-------- Sup pc I ion f'actorw.GJS
• • ··'
00 10. 15 .. ..., ., ..... E'l
Figure 7: Elrect ol aero Aipt111 ·1a • ~ &o&al mming Er spectrum (~) witbo.at ucl (b) witla tMi awl -4 ; ii p llOi9e mnulated. The etrecta el .claeme 2 aero suppr 11 • • 1tt thowa ~ tile s.perimpoeed biatogram1.
}If
52
Zero Suppression Conclusions
Based on these studies, it is clear that one can achieve a reduction factor of greater than 10 with several zero suppression schemes without greatly sacrificing resolution or linearity. It also appears that the missing Ex resolutioo is not drastically con1pro1nised. Of the schemes studied, it appears that the ~ attractive js the most basic - narnely the scheme in which one simply reads out -channels satisfying a certain threshold. nm scheme al-lows one to achieve reduction factors of up to 50 without greatly impacting the quality of the data. At lower reduction factors. the simple scheme shows similar or superior behavior to the other sC"hemes.
53
Dynamic Range Studies
• Goal: To determine the dynamic range n~ed by both the electromagnetic and the hadronic calorimeters
• Low End of Dynamic Range: Total thermal and pileup noise /v'21
- ~ 25 Me V for the Electromagnetic Calorimeter
- ~ 140 ~1e \' for the Hadronic Calorimeter
54
High End of Dynamic Range for EM Calorimeter
Use decays of the form
Choose
M(Z') = 12 TeV
because, assuming "standard" couplings, this gives 10 events in one year at 1<>34s-1cm-2 luminosity.
55
0.045
0.04
0.035
0.03
0.025
0.02
0.015
0.01
0.005
00 2000 10000 ~
Figure 4: Highest energy in any electromagnetic tower for massive Z' -+ e+ e- decays.
a
56
High End of Dynamic Range for Hadronic Calorimeter
Use high-PT two jet events
Choose
PT> 8TeV
because the standard n1odel predicts roughly 100 events -in this range in one year at 1<>34s-1cm-2 luminosity --+
enough to detect discrepancies (eg. compositeness).
57
0.05
0.04 Two Jet Events, p,>STeV
0.03
0.02
0.01
0 0!:-"..1....1.1.L.....•2=0~0~0_.__._~40~0~0 ........... ......u~!!..,,.o.:U:.l.li:.l~LliL... .......... ~,_Joooo
0#/ll Mcndmum ,_en.,,
Figure 5: Highest energy in any hadrooic tower for bigh-Prtwo jet events.
58 t
Summary· of Dynamic Range Studies
Electromagnetic Calorimeter
range = ~= x : ~ 288000 ~ 18bits
L "•:>"'"°'.__ ---. .. .a.,J. •• ~ Hadronic Calorimeter
range=~ x: ~ 51400~16bits
59
Implementation of 18-bit Dynamic Range
• Nonlinear Preampsf
- Easy t9 build, but
- Might be tricky to build and calibrate to desired accuracy.
• Triple Range 1!!-bit ADC?
- Probably available technology,
- Allows 9 bit overlap, but
- Might he tricky to build.
• Dual Range 13-bit ADl"I
- Only two ranges needed, but
- Only 8 bit resolution at overlap.
- Might i1ot exist.
• Some Combination of the Above?
60
0.12
0.1.-
o.oe
o.oe
.. . ..... .
a.cu
0.01
• ' ' ' ' .
_,·
H~v- M(H)=160 GeV
------ End of Low Ronfe for 121111 ADC.
End of Low Ronfe for 13 bit ADC
~·.,I . : .~ ... ~ \" 0 o~_._...._.._2~0"""-0~ ...... .!:i::::::c400~l..c:::a__.__._eoo.J..,-....... _._...._li.L.D0...._ ........ __._1000J
G#I
Figure 6: Highest energy in any electromagnetic tower for H -o 11 decays.
11
61
Presentation by:
Sergio Rescia
-63
Sergio Rescia Instrumentation Division Brookhaven National LaboratC1r7
LKr/LAr CALORIMETER FRONT-END ELECTRONICS
GEM COLLABORATION MEETING BNL, 5 Nov. 1992
65
• -
I B I '
I w 8 I
i! I
66
AIM:
ENVIR( )NMENT
(10 years \\f operation)
Design of a charge sensitive preamplifier for Liquid Argon preamplifier for cryogenic ionization chamber calorimeters (Liquid Argon, Krypton) at hadron collider experiments (SSC, LHC).
T=90K
Neutron Flux: 1014 N/cm2
Dose: 30 Mrad
SPECIJ.'tCATIONS Low Noise (trigger sums)
Cn=100 pF-1 nF
tp=15-50 ns
TECH!\, )LOGY
High gm, grnf Ciss' gn/Inss
CnflO<Ciss<Cn/2
W=104 µm (1 cm)
Epitaxial channel JFETs meet all these requirements and are manufactured with a mature, well proven technology. Hybrid preamplifiers using discrete JFETs have been built and successfully operated up to three years. To achieve monolithic integration interdevice isolation must be obtained while preserving the characteristic of discrete JFETs.
67
BURIED LAYER TECHNOLOGY To achieve interdevice insulation a junction-insulated technology based on a diffused p+ -type buried layer which acts as a back gate has been developed. It uses an epi channel and diffused gate, source and drain to achieve an optimum noise performance.
• Psubs=<>.5 ncm • Pburied=0.002 Ocm • Pepi=<>.5-2 n cm • tepi=4-7 µm • isolation ring doping: >1018 cm-3 at the surface to
prevent surface inversion
N-SUBSTRATE
68
69
v SS
Im[~] [ v. [ nV] SW,
p FEATURES ld[mAJ SW _n_ sw, ../Hi. oew e ../Hi.. SW,
[MHz]
TEST PADS 1 ADDED 9.2 48.3 0.57 0.49 1.16 200
(ceramic carrier)
TEST PADS 2 ADDED 1.9 22 0.76 0.72 1.05 112
(ceramic carrier)
TEST PADS 3 ADDED 2 23 0.75 0.70 1.07 127
(ceramic carrier)
NOTESTPADS 3 26 4 (T0-78) @ 0.68 1.07 @
'
TEST PADS 5 ADDED 4 32 0.66 0.60 1.10 136
(ceramic carrier)
NOTESTPADS ~ ,,,,.- ._,,__
6 (T0-78) 5 31 :i 0.61 1.11 ; 200 / =-
70
too ,.-----,--,--T-~!-t .-..~~,----... . :
·········-~---·-······-r--- ······ ············r···········1··········· IO . . . : : :
:1.:t::l: ::: :t. a)
. . : : : . . ·····:·- -·····-20 .......... ; ............ ~·----------;--·--------·r--·---
l ~ i o io l1,----10~~:---10~4,----:-:1oj,--;-;10~6--;;10'1' --;.;no•
f[Hz]
b)
Fig. 2 - Characteristics of the preamplifier labelled 4 in Table I. (a) Open-loop gain-frequency dependence. (b) Spectral density of the noise voltage referred to the preamplifier input as a function of frequency.
71
JFET RADIATION EFFECTS ( 60Co)
NOISE SPECTRUM
[nV/;IHz] 100....------.,.~,.......,..~-,---,----,-~-,-----,--,--~-,--..,.-.,.-----.,,---.,.......,,__---.,..---,
: : ; : ; : ; ... .. . . . .. . ...... :·· .. . . ........ ···; ........ :-··· .. !·· .................. -~--- .. : .... ····· .... ~- .... ···: ..... :.... . . . . . . . . ...... :· .. . . . ........... ~-· ... .
... ........ ....... ; ..... ············~---··---~------~············· ·····--·~····-~·············+·······~-----~·-··········· ....... : ..... ···········-~·-····
. . . . · · ·· · · · ·· · ·· ~- · ··· · · · ~---· · ·= ·· ·· ··· ·· ··· · ·- · ·· ·· ·r .. · · · 1 .. · · ··· ·· ·· ··:· · ···· · -~ ··· · · r · ·-· · ·· · ·· · · · · · · · · ----·
. . . . . . .. .: ..... ·:· ... ................ -~-- ... ~-- ·- ··········;·· ..... ·:·. -· .. ~-- ·······.... . ·--·· ·:. .. .. . ........... -:- .... .
10
·-----------~------··r····r············r
1 . .
.. -~~ . . . . 'f""• ·t···~···········-~·····
0.5"'---=----=-"-'"-~-=---=--=--~=--=--=------'"---"-'"------"---' ......... ~6~"'--' 10 10 [Hz]
72
It'
.... ....... N
.-102 :c ....... ,.... N .. ::c 1 ...
er ~ .. .. .. ...... er > Ill
c .... ...... >
c: .50• II • 1 ..
~HORT lHANNtL J' FETs • NOi$£'
Noise Spectra Room Temperature
- ! !
" ' .. ' !i ' 'i i p '
It'
" ,.
ii!
Jij!ii EW
:1: ,j ' ;n ;;;
iii ;;; ;;;
' :p :
. .. - .• 'ttt'
ulo>
1o'
' -,f;! ! ,.
·,;;,,, .
' ' ... . . 4 .. ..;
' j:: ""' 'i 1H-H ' I:: ' I !Ii
--e- NJFET 2500/8
i ! i ij1 · · i' I
il1lli 'J:
. --Jl.JJff0-3500/20 .. • ; !Ji . ! . .,,,, IJJl• " ,. . ' .. H !:l IJ I I! ·:! . 11 ' ; ; · lf ii H
!-Hlf+i+HiHi .Jm'i+'-''-ll-.>-1.ii..liiilli ii rtt-NJFET 2500/20 ·- "'i .+- : , , , ~~---·- ,1; 11;
lo' Frequency
lo'
10' 10'
10'
·-- ·-- -- ·- -- .
74
.._ --.
> N
-• • 0 ,_ >
• . " ' ('>
C:ID ..., .. Q. •• C%1D :::ccn
N cncn Z...I C>:::I .....
• . " a: Q.
z 0 ::c
• ..., z • •
C> C> C> a: a: a: ,_ ,_ , ... .. ~ IN i :::c i :::c I i :::c I a:cn a:U> I a:cn 1' Q.1- Q.1- Q.1-::c :::i ::c => I ::c :::i • zo zcl!lzot,
111p1 rrr r m11111 1111rrrnin111111rrr111p 111rrrrrp·m11111 rrrrrpn' l' rrrrrmp 111 ( . . . . . .-·-
:z :_o
. . . . . . . . . : 0
• • • ;. • • .: •. • ;. • • •; • • .. : • • • ;. • • •: • • • .: • • • : .... : • • •.:. •• • : .. • .: • • •.:. • • • ;, • • .: • .. ; ... •: .. • .: • • • ••• .. ~ID . : : . : : : .. : : : : . :-. . . ·-·-:-
z C>
"' " Cll Ol -
••· ---r : z : P..~: :_c~ p . . . .;z . . . . . . . . . . . . . . . . . . . . -... ~-·· ·t .. --~· ... ~ ... ·t ... -~-- .. ;· .. ·;. --~- ···; ···-~- ... !••. ·:'? :· ... ~-. --~- ... ~- .. ·; ... -~-- .. ~- .. ·r-::::
: : : : ·~. : : .. ~:
. . ~ : 7:::::--- : . ~ : : . ~ .
v:
. P"" . . . ':?". •
===--~~ : .
.-
·-
:_z C> . . . . . . . . . . . . . . . . .
-: ... ~- ... ; .... : ... ~-· ··! • ... : .. -~-· .. : .... ; .... !··· .: ... .,:. .. ,;, ... ; ... ;,,,. ·=··· -~· .. !·· .. :_o • • • : ID . . .
·-:-
:-...::::: .-
..., lC -,_
z .- C>
"' . . . . . . . . . . . . . . . . . . . rill h 1111rrnin11I111rt.·rni1111I11 rf lm1l 1111 Ir rrrf·,·n1h111 lr1·n 1111 h rrrt ffflh 111 r r rrhn·rf111 rhiC:: ~
::c ::c ::c ::c ::c ::c ::c ::c ::c ::c ::c ::c ::c ::c ::c ::c lC ::c ::c lC ' 0 0 0 0 Cll 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Ln o Ln o Ln o Ln o ~ o Ln o LD N o ~ ~ N o ~ ~ N o ~ Ln N ~ ~ N N N N - - - -
75
LnCllLDOl.DOLn N Ll'I "'- e> N Ll'I " .... - .... -
SUMMARY A monolithic charge sensitive preamplifier has been realized featuring:
• GBW=200MHz • Pdis5=100 mW • Dynamic Range=+2 V • Integral non-linearity=0.2% • en=0.7 nV/-.JHz • No degradation after 100 Mrad (tp=40 ns, T-90 K)
Future Improvements:
• Study of neutron resistance • Realization of monolithic resistors (Si-Cr) • Development of a short channel version •~en- - ~wt ~spo')\..s~ 7~c., ex p~J, Wj~v ~~-
Acknowledments:
Larry A. Rehn, INTERFET Co.
76
Presentation by:
H. Takai
77
/
Precision Timing with Liquid Ionizatioi::i Calorimeters
O. Benacy9;·s, Cannon5 , W, Cleland71I. Ferguson2,.CJ, Finley5,
A. Gordeev6, H. Gordon3, E. Kistenev3, P. Kroon3, M. Leltchouk51
D. Lis~uer3 , H. Ma3, D. Makowiecki3, A. M:aslennikov4, S. McCorkle3, . •.. . • ·• .. • • . 6 . • 4 .. .,..... . '· 9 - . . ' 4 . 5 D. 'Onoprienko , A. Onuchin , Y. Oren , V. Pamn , J. Parsons ,
.· 7 3 ·. ··.3· 3·. ·3 J. Rabel , V. Radeka , L. Rogers 1 D. Rahm ; S. Resc1a , J. Rutherfoord2, M. Seman5; 1'1. Smith3, J, Sondericker III3, R. Steiner1
, .. '3 . '1 . . 3 . . . . . '3 . . 8
D. Stephani ; E. Stern , I: Stumer , H. Taka.i , H. Theinann , Y. Tikhonov4
L Adelphi Universit)'', Garden City, NY 11530 2. Uill\iersity of Arizona, Tucson, AZ 85721 3 . .B.roqkhaven .. National .Laboratory, Upton, NY 11973
~~ ·:---'""':::;!•--,~-:.::o ___ <.,,...:-.~.:. <ll+;! • • - ' -
-4.·~Budket.Institute for Nuclear Physics, Novosibirsk, Russia .·.-·.-=E.t~-P--~~"'-"".-..~:~: 0 ._ :-.. '.:o,:e..-·-·;.: . .'~ :.·.·_ ...... - .... _
· ·, ·, ~;f~IU:Jiib,ia Viiiv~rsicy,-Ne:\Y York; NY 15633 . · · . ; -;~,.--~-J- ~-~:'"-""t - - ·._ ...... - .•.. - . - - ~ - . .
. 6.-oit,1( Ridge National Laboratory, Oalc Ridge, TN 37831 · ·•L ;u(ilversity o(Pittsburgh, :PitulbtiI'gh; PA 15260
s;·suNY at Stony Brook, Stony Brook, NY 11194 9. Tel~Aviv University, Tel"Aviv,.israel
79 1
i ..
-
'Precision Ti min 9 wi~ n 1.!qui d Ion iiotion CaLor·1rneters.
• Good t'arncng from Calorimeters:
,.> "> unique assignment of an evel1t to a part\tulor bearn crossing. (bunch ~pacing ... 1sns:
• Conveni"1onql W isdol'V) !
....... _ .. '"~~ ~Scinl'~!~~tQrs ore fast; PMT have sharp ~igool~ ·"·" ·... --·- ~-·~.- · · · 'f.herEifore: "GOOD TlM0
INq" ·-·: . .' . .-.
··•.··HOWEVER'· liquid ioni~otion Calorimeters have.~
~'(" 'f ~u n' orm wave form • very \ow fluctua.t ions l~"\Oti e-/qe\J)
• good -\:im ing is 'Poc;si b le l
80
Princi P-le of OP-eration (Turko t Sm\\h)
/1 / : _gtt) RC in"\.egtal of flt) I !
I i
Ci' -to , when .f (t) - gt-l) ·15 independent of' amplltude.
Test Setu P-; • Accordion geome~""~ Liquid \<r~rion Calor1me,te.r
• +>beam= 5, 10. 15, 20 GeV
(5x5) TDC stop
• Total Ener9~ __. Flt)= l: a~ .:F tt-ti) 81 t;, chatanet time Offset..
~
~F .. .. " .. = 0 ....
• ( .. '
, D ~ ' ,., .. E = • .. • ... ' •
> "' +I
I• •
.. >
., "' ~ > +
~ ,., ' "' > "'
•
~
> • .
• •
e ' •
A . \J\I'•
• • •
" • •
~
... N • ..l a: •
------·-----
0 .. ' ... "' .. ~ ..
~
82
l . ··1· ........... . ..... ··1
.. ·-r-. * : : . . . . . .... i. . .. . . . . . . . . . ..
f
. . . . . . -.. . . . . . . . . . . . . . . ...... . .. -. . . . .. .
. . . . . . . . . . . . . . . . . . . . . . . . . . . ... . . . . . .
. . . . . . . . . . . . .....
·-· :~ : ... :O'"":···· ..
:W
. . . . . . . . . . . . ..... . -. . . . . . . . . . ... . . . . . .
C\I
:> --'tl ........ Ill c
0 in
:> ·-'tl ........ Ill c
0 0 -
83 ...... _ IQ--·---··-·--- ··-----c. . c.- ..... . E-- E--
r-:~--~l~-1;-:~:l~-:---------:::~,fl~:----------------------..-C\J
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-> -
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(su) v
84
DRIFT CHAMBER VETO COUNTER
Oo c:n S1
- - - - • .. - • • • -t •I .. - 1-t • - • • • •• - - • • • -[}l CERENKOV #2
CERENKOV #1
HODOSCOPE
51, 52 timed by CFDs
52. ~ Start Countey
82 MUON COUNTER
I - I I I I I
CU ABSORBER
CALORIMETER
' I I
)
On-line Pulse Shape LKr, 2mm stack, 1.5kV Beam Momentum= 20 GeV
Sum of approx. 150 channels
1!k Stopped: 11 o Acquisitions lT I .... '. .... : .... : .... : .... t .... ~ . . . : .... : .... ! ....
.,.
.;. .... : .... : .... : .... : .... + .... : .... : .... : .... : .... -~t :1··,: a :..._. "" ~ -::::.. ..
. . . . . . . . . . . . . . . . . . . I . ... ~ . . :-:::=- ................... . j t "!§:. . . J + . "'!Ii=.. . j. .;. • : == -.. . ~-·~···I:···· I····:····:······ ·.·r~~ ·
: ' '; c::.' ;:~: ! : ··· l · : ... [. : ;: . ; [ ; . ; :: ~ 4 . -¥. . I . :
Edge Slope
......... : .... ~t:.J.~ .... r ....................... . . J. i . t 1----. i. • . +
: a : . 1 · ' . t
a " : .... : .... : ... ~~ .1 .. : .... r .... : . -.. : .... : .... : .... i· 1 . + t i . + i{ .;.
.............. !' ... : .... ! ....................... . · · : . + M lOOns Cht J -260lllV SO.OmVQ · · t · · · ·
,,,,;, ... ~.--.~---.] .... t .... i .... ! .... i .... ~ ... . ,........ ......... __ .,....,....., Type
<Edgt>
source coupling 01 DC
lMJ & -2QJmV Holdoff
Multiple trace - variable persiste_nce ! !
86
LKr 1() 2 c:r-ri;-, ,,,.......,..T"'T'T""T....-.-rT-rrT"T.,..,...,.,..,...,r"TTT'"1~T""T'"T"T"T"TTT"TTT"T"""T"Tl=I . ·'
f /fir\/# rm5 ;: 1.0 ns ·
10 tt
1J I
. '
-5 -4 -3 -2 -1 0 1 2 3 4 5 Uncorrected timing (ns)
I·
87 'J
.j'4
10 >
1
780 800
t
820 S1-S2.
88
.......
•
1 1-111.D l.D11
O a I llE100 ·---1.10 ••:I: 1.111 ., .... :I: O.tzt7 4.541 :I: 0.1 ..
860
6The Correction''
• i. t con be shown that for Flt)· r a.if t-t-tiJ a timing sh\ft 0::. "Lo~~i wi II be lntrodu ced.
Iai
• Therefo~e ti co.nbe found offline by mtnimi1in9 events 2. 0 ,_
L €j = L. ( tJ - LOCij ti) jat
toJ. .fo measu"ed -ttme " event j
O(i = Qi , normaliie.d p.h. z:.cu
• This leads to:
/A-IRl =O IA= L. t~ o<lcJ and IR1d =?:. (o(ic.i oe1j)
J•I ./ial
• apply this to al\ runs~ \1rn\~in9 colorime.ter to 3x 3 "b>10er 9eo metr~ .
89
•
> a> (.!) LO 0
LO
I 4 I I j B b le I I
> > a> a> (.!) (.!) 0 .....- a ~~
v
> Cl>
(.!)
~<I
C\I
_.,! 141 11 ff \' I
I ~1 t4 I
B e 0 z 0 a> .....- c:
c: «I
.s::. (.)
0 ,... 0 ..... C\I (")
I I I
(su) 'l
90
-------- -
(/) c:
CX> 0
ui 10 -c: :::> 0 ()
1
--- - ------ -- - - --- - -- ---- - - ---- ---- -----~
+--- a=280± 30ps
-4 -3 -2 -1 0 1 2 3 4
Timing (ns)
91
- -- --~ -- --------- -- -- -- ---- -- --- "
Timing Energy Dependence
Prohm1nory
1.0
0.8
_...... ('/l 0.6 i::
'--"'
OD i:: -- 0.4 s ·-E-i
0.2 1--......--_ - - - - - - - - - - - - - -
0 . 0 L..-L.-1-L-L...J-'--l-Jc...L-1-J.......J-J.......J-J.......J:.....1......J:.....1......J:.....1......J'--'
0.00 0.05 0.10 0.15 0.20
1/E(GeV-1)
6t = (0.183 ± .020) ns ffi (4.16 ± 0.06) GeV · ns/ E
~lta_:.tl): (0./9 :t0-02) vz. 92
Conclusions
• Liquid Ionl iation Colorimeters have excellent t\ m\ n9 pro pert\ es.
• Energy dependence is cal cu lab le.
• the inherent timin9 re.solut\on _..,..,. o.a C:.eV.ns of one tower E
93
Presentation by:
Paul O'Connor
95
?a.u \ 0 \ Con no\
Mvo~ t;.o-.-\- tn J
E l.4...-\.o" 1'cl 't'J'lu_.J, ; .., ;j
97
OUTLINE
Front End ICs for Readout of Cathode Pad/Strip Chambers
P. O'Connor, BNL Instrumentation Division
"' • Performance Specifications ~
• Readout Function Blocks
• Circuit Design and Technology Choices
• BNL Test Chips & Results
• Plans for Future Work
BNUAW
PO'C 1 114/92 lhome2!pocllext.GEM/Nov4.lm
"' "'
WIAW
Specifications: /PC Central Tracker
• Pad Capacitance: 10-50 pf
• Most probable Ostrip: -30 fC
• Max. occupancy time: (2 - 4) x 16 nsec
• Desired position interpolation accuracy: 1°/o of pad pitch
• Desired time tagging: within 10 nsec from time of avalanche
PO'C 11/4192 lhome2/pocllext/GEM/Nov4.fm
2111
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BNLIAU/
Specifications: CSC Front End IC
Strip Capacitance: 8-120 pF
Most probable Qstrip: -30 fC
6 Hit rate per strip: ... 100 Hz (tracks), 50 Hz - 50 kHz (neutrons) r-
Desired position interpolation accuracy: 1°/o of strip pitch
Desired time tagging: within 10 nsec from time of avalanche
PO'C 1114192 /home2/pocl1ex11GEM/Nov4.tm
3/11
~ 0 N
Noise
For Gx Ix• .01, need aclO • .006
aa • (.006) (30 fC) • 0.17 fC • 1100 e·
F.or 1000 e·, Co• 40 pF, CFET +,C51ray .. 15 pF, tm • 25 ns (CR·RC4)
I en.< 0.46 nvfrz I . (Req< 150)
Input device Om> 52 ms (FET), 39 mS (BJT)
le > 1.0 mA (BJT) ... but need to consider parallel noise of ~ 1 o uA 18
Id x W/L > 27A (I) for MOSFET in strong inversion
PLUS
30% • 5091. from preamp other devices
noise of Rg, Rsub
2nd stage noise
BNL/AW •
<~<.1
c.• '1c.,~ "" • fOON .....
~ f" ' o.a-, ~" IJ .. ,, ("'"") stf'• ~~fl!\~ ( flT)
~· "'( c. 17..A
PO'C 11~111! AlnMA,lnfM'-.Jl•wt.r.FMJNov,..fm
1--" 0 c.:i
Noise
For ax /x = .01, need acfO = .006
a0 = (.006) (30 fC) = 0.17 fC = 11 oo e-
For 1000 e-, Co= 40 pF, CFET + Cstray = 15 pF, tm = 25 ns (CR-RC4)
I en < 0.46 nV/ Hz I (Req < 150)
Input device gm> 52 ms (FET), 39 mS (BJT)
le > 1.0 mA (BJT) ... but need to consider parallel noise of - 10 uA 18
Id x W/L > 27A (I) for MOSFET in strong inversion
PLUS
30% - 50% from preamp other devices
noise of Ag, Rsub
2nd stage noise
8NLIAW
po·c 1114192 lhoma2/pocllaxtiGEM/Nov4.fm
5/11
-1000
... 100 LM394, J: 2N4124 """ 0 I --.. - 10 2N6483 FET "' ~/2N4250 ... J: ..... > c -... 1 -
~ 250786
0.1 O.lµA lµA 10µA 100µA lmA 10mA
~ collector current 0 ..i:a
"' ... J: ..... > ..s • ..
A
100.0r 2N3954-8, 2N5196-9, 2N5452-4, 2N5045-7, 2N5545-7
::-,. _ 10kHz
1 t:::::::-=::::-z..:: .... .LWk HZ 2 N 551 5-24, ,~-----:::._--.!./'.'.2,!2N~6~483-5 1 OHz
1.0
1000
0
10
10µA
\2N5515-24, 2N6483-5 10kHz LM394 10kHz
100µA
lo
/(bipolar)
lmA 10mA
MOSFET I
-2N3954-B, 2N5196-9,
2N5452-4, 2N5484-6 lmA
LM394 /c = \ 2N5432-34 lmA J
1 mA (bipolar) , 2SK 14 7
2N6483-5, 2N5515-24 1mA 2SJ72 JmA
0.1 ~---~---~----'-------' 10Hz 100Hz lkHz
frequency lOkHz lOOkHz
• .:!. .(i:
,.... 0 CJ'1
INLJAUI
Charge Sensitive PteamP - Input D . IVtce Ttc/Jnoloqy Cho/Gt
Equivalent Input noise charge:
torBJT,
for MOS,
Conclusions (short tm):
' I I . .... c,.. .1 EN1.- • •1-+•1'•'• '·
1! • 41:T(r +R ... ) '·
.1 I I .-. • 29/1 +0T(i"'+-->
. I' R•i•
2r Kl I• OT(-+R,) +a,'•c: WL e,. l1. ••
I 1. = .UT(R)
I
(EO,)
!Nit ..
1m11
(EQ<I)
(Bii)
J=or BJT, achievable ENC is limited by Rtiti·. p, and fr. For MOS in strong lnwrsion, ENC is constrained by power and ..... allocated to the input ~vice. In practice secondary er.ets like excess noise sourc· es, ease of integration, and accuracy of modeling large input device must be ceNfully considered.
l'O'C-11!1111 ~1/fMIO/lewll()EM/Aufl!4.lfft
6116
•
•O<J+X
0
oooc 0001 0
........ :lN3
106
IPC Front End Electronics
1132
I 1~21: .,.,.m ......
I
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preamp_n ?/"'18/0'l ~ I .JL
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out
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Shaoer Design
• Noise (power and area tradeoff)
• Peaking time control
• Dynamic range
• DC and AC stability
BNLIAUI
PO'C 1114192 /home2/pocllext/GEM/Nov4.lm
'"""' 0
"'
iNUAUI
...
CMOS Lowpass Sectlqn tac $fmlq1uglan_Shfp«
~CL
Rr R1
'to• 2gm31C1 - (ibias)112
2 C1 P5 8m1R1 ~P5 C; R1 ·
Q • 8,,.3JJ) (R1 +R2)CL = 4JJ3JJ3CL (RI +R1) •>
• pe•klng time depend• only on (ibl••)
• •h•pe of pulM le d1termlned by component retlps, lftd9Dendent of (Ill•).
f'O'() 1123111! . "'91M1i,ecAelll!GEMIA .. 24.lm
9116
.... ,_.. 0
1991-2 Prototypina Actlvltv
• 9 MOSIS Tiny Chips submitted
• All 2um CMOS I BICMOS process (Orbit Semi.)
• Investigated: 1000012 NMOS, PMOS test transistors
Preamps:
Charge sensitive folded cascode (NMOS, PMOS input device)
45 kOhm transimpeclance (NMOS, bipolar npn input device)
Shapers:
20, 40 ·100, 500 ·1000 nsec unipolar CR·(RC)4
Output Drivers: source followers
Preamp-shaper, preamp-shaper-tracl</hold with output drivers
INUAW
• R~O·Ma~ r~" C MNlf.\~ A"'-~'"" •~_p•' ._ •~ '/~1
PO'C 1 T/4/f.:I 11..---""---•-·-·-.-··-·---" •-
I-" I-" I-"
Tests
• Components
R, C, MOS, BJT
1-V
noise vs. frequency, bias
ESD
radiation
• Circuits
Noise vs. tm, Cd, bias
Linearity, dynamic range
Peak time
frequency response
Loading effects
Crosstalk
BNL/AW
PO'C 1114192 lhome2/poc~ext/GEM/Nov4.fm
8111
C! -"' 0
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Presentation by:
D. Crosetto
127
Algorithms examples
Local maximum
I
I
I
c I
I C > Ii for
Threshold
i = 1, ... , 8. 8
I I I < ~ Ii + C. 1=1
EM~~ IF c >-
OR
---- ~o: EM~>- EM~
@:lil..---' c 1
(BAD) Threshold < c .. + 1 .. ; (EM) < Threshold
THEN "' x "' almpllflecl trigger tower
Check for ISOLATION
Threshold <
Jet finding
EM:> HAD~~~~
~ .. ~ c. + L; Di+ L; ~+ L; 01111t
1=1 1=1 1=1
18 18
Threshold < ~ EDft + 2; Eat 1=1 l=l
129
\ I ·. /
:S I
-- I'll s:: ' ~ Q) I
-i Q,) 'ti I ..., s:: I'll Gii I
' '
"""' ' Q) I
M Poi
t'
~I ~ •• ... 0 ~ -Gii
.
Algorithm flow-chart
Phase 1:
Phase 2:
Phase 3:
Corpus Christi 10/2/92
Calor1iwtry In HEP
aet code
no
aet code
no
aet code aet code
O'lltp1at oodo ~~~~~~~~~~.....__~~
1 two • -· - (aorth 1 z a) > tlarwbo14 a two ·-· nm (out 2 z 1) > u.n.ut• .. "had" r-· (north l z 2) < U..-b•l•
• ·1i..r r-· <out 2 z 1> < u.rouo1• 11 laolaUon aoblnocl
S2 p.-1110 Jot fo'lllld
e.1. A •np" may return a code = 37 (1+4+32) st.a.Uni:
a possible electron wu found, 13 0 - but it wu not isolated from the sorroundine ener17,
- and that cell may be part of a 4 x 4 jet.
V./ e si
3D~Flow Cell Architecture
Top ' 2
HAND SHAkE
131
2
,, .....
Bottom
East
Dario Cruullo
SeptemMr Z4, lff2
I , .. I I~ I I~
IJI
lo , .. l UJ
Jl
I ili Jl
I~ I ro
I~ 1 ..
---------- ...
"""" ~ N
--------·-·· -·--··--· -- . --- . --
EP assembler code of the four pipelined stages of the 15 steps algorithm
icec tep
0 1 I
• ' I • 7
• • 18
• • 10 u
common code to all stace•
.oell 0,1,2 loop&
aorUu
rl••-"rH rt•-t"rll r7•rl+a. .. ...... rt-ra+e, rlO•d+., du•r7-rll,
~· •ortla. du•rl-rll, ......... ltna-u ... ...,.... . ....... -.... ... ,._ ...
lO , __ ltn•-a. ........... u •• II u •• 11 ... •• II H ti u 11 ti H ..
--= ..... : -•1: ·-·= •-a~ ....
-••oe-rlO, ..... -... 'bn DOHD41, .... .... aop, lt•Oll .. ...., .......... .... .... ,. Prt,ltnloop .... aop, aop, .... ..............
Different code for different
Staie 4 I Staie 3 I Stace 2
(•} (A)
Its\ (le) Its\ (14)
lt•t (le) Its\ (14)
lt9\ (le)
••t (le) ltlO\ (14) ltlO\ (le) ... , (14)
ltlO\ (14)
(•) ('4)
(M) ('4)
.. t (14)
(M) ('4)
(la) (llt)
ltlO\ (•) ••t (41t) lt9\ (lo) lt-t (14)
.. , (lo)
ltat (lo) 118\ (14) ltm\ (lo) •• , (14)
118\ (U}
(le) (14)
(lo} (14)
ltm\ (U}
(lo} (14)
(la) (Ill)
ltlO\ (la) .. , (llt)
.... , <••) lt•t <••) lt"'t (lo) 11•\ (••) lt"'t (•II) 11..i (lo) II .. \ (14) 11•\ (lo) lt-t (14)
lt-t (14)
(lo) (18)
(le) (H)
lt•t (1•)
(lo} (Id)
staces
Staie 1
(la) (lit)
... , (la)
.... , (tit)
11•\ (la) lt-t (llt)
lt•t (le) a.ct (la.)
.. , (•) ltlO\ (•It}
118\ (•) 11•t (A)
(lo) (14)
lt•t ('II} (lo) (1•)
.,., (u) ltm\ (••>
(lo) (1•)
Comments
......... ·-· ...... ,.... ealorlm
........ "laal' 'lal•• tnm ealorlmeter aortll l z I ·-· -aortll l z I "laal' nm ..... , ......... eut I z 1 "laal' -oom,.... l z I ·-· nm to Tlanolaold
I oompue I z I ·-· nm to Tlanelaold
I ·-· • ,.,.._., ... (l s I) I "m • Tlanelael4 - "lael'
: "-· • Tlanelaol4 (I s l) ; ·-· ............. - .....
I .... o•t Wwv 14 .... oat 1 z a•.,.• ea.era I HD4 ••t tower 14
: -4 oat Z • 1 ·-· ••ra
I_. - a.U ftlee I -4 .. , a.U •alee
line code
1 I
• • I
• ., • • lO ll 11 ll H 11 ll 17 11 11 10 11 22 23 H 21 18 l'1 21 H 10 31 II
.l.~~~~.L-~~~-'-~~~__J~-a = inputted ·em· Talue -·---- ·-c • outputted tower id b ::s inputted •bad" Talue; d "" output\ecl •em" sum (either 1 x 2 or 2 x 1)
133
'{
··.•.· 11111111~ 1~!ll7::~a~
.. i.i l l l l l l l I\ ·.:.~:;,:'-\;_·,· ..
~~;.;,::;:.\f,::<~:(~:;l·'<~iit.;\:::,·:',~::~,~~,Y;-:· · ...... -.:·_ .. , . . : . '": -,, .:·:·:':·: .. ::-=:-:: .
..... "" Cit
'ta1e St
Pipelined Parallel Processing Architecture
/' u ft 1e 3/ •/'
Stage 2 Sta~e 1l'
....... , .. .............. ~~l•/I/ ..
--. • • • • • I • • • • • •
..... c;.,
""
Timing Diagram of Four FEP Stages of
- Et
a Pipelined Programmable Level 1 Trigger
- electrons - jets ~ -
Latency
!st ... •I Is.._. 11 lst•e• 2] lstae• 11 E Raw data . . l - .i. 0 ns +_l__L
Algorithm I ~~~/~=-~ execution i;;; time -----_,.
~ -
.........
•••
16 ns
32 ns
48 ns
64 ns
80 ns
96 ns
112 ns
128 ns
144 ns
160 ns l2 ,... nJQ II 1- I
~ IWll l+11Df176ns
..,.. ~ • " 11 •" I I . w 1 9 2 n s
I __ ___ . ·------- ___ _ _ ... _ T_1µi_e Corpus Christi 10/2/92 CQlorlMetry In HEP DQrlo Crosetto
Question asked at this point:
• how can you control the data-flow interruption in a thousand
processor array ???
Answer:
• watchdog circuitty at each 3D-Flow processor
137
1' j "" "1380 1' 3AU:°31A39U2 9U 1' ·----~~--- - - - - - -
One Channel of the'' :3D-Flow''
Pipelined Parallel Processing Architecture
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LATEST REVISION AT TIME OF PURCHANSE. . 5. ALL VIAS TO BE SOLID SUCH THAT VOIDING IN VJA
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TABLE 1. Estimated number of Gates required for a 60 MHz 3D-Flow chip assembly (32 cells)
30-Flow with 32 Functions/ Gates/3D-Flow Gates/ cells/chip.
Unit Logic Function Chip cell Unit Gates/Chip
30-Flow core Register File 32 3,072 11,422 98,304
ALU 20-bit 32 900 28,800
Program RAM '? ,,_ 6,400 G. equiv. 204,800
Prog. RAM control 32 250 8,000
Internal Host Interf. 32 800 25,600
Additional MAC 27-bit '? 4.500 4,500 1144,000 .)_
core
Interface to Look-up Table 4 6.144 G. equiv. 6,144 24,576 Calorimeter (256x 12-bit)
Host UART I 1,000 1,000
Interface
Output MUXOut 24 250x4 1,182 6,000
Direct Out 136 182xl 24,752
FIFOs Top 8xl2-bit 32 192 G. equiv (xl) 752 6,144
Control Top ,, ,,_ 80 2,560
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Control ... ~n;x 24 200x4 4,800
30-Flow w/o 13,356
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149
AM-TEST
L DllC 'l'/H - CHARGE SHAPER -24 llI'l'S . INJEC, AMP (ACU!.IN) _, I 'I' I I
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INPUTS
1 .
liCl.J( . HP82000 6
WADO '-- AM MEASURING 6
VECTOR RADO
GENERATOR 2 RD/RS'l' SYSTEM
.__ OUTPUTS
' 3 2 1
J. AH)/
' II HP-9000
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~ 5 MHZ OP•LNX DATA
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24 llI'l'S OIG•SCOPE ' ~
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TRIG
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' 151
PRELIMINARY RESULTS ON A NEVIS ANALOG ~ORY
GOAL: DEVELOP AN AM FOR HI PRECISION CALORIMETRY FOR GEM AT SSC.
a DIFFERENTIAL , 200 CELL CHANNJ::Ls. 60 MHZ SAMPLING , SIMULTANEOUS READ-WRITE FOR PIPE.LINING. 5 MHZ HUX READOUT TO ADC'S. 0.111 CALIBRATION , TWO 12BIT RANGES FOR 16 TO 17 SIT DYN. RANGE.
TEST'ClllPS: ( ORBIT l.2U J:)Ml)P N WELL PROCESS )
l 8 CELL 4 CHAWraL , INDEPENDENT R-W , NO DECODING - FINISHED
·2 48 CELL 4 CHANNEL·, INDEPENDENT R-W, FULL DECODING - FINISHl:!D
3 SAME AS 2 WITH OUTPUT MUX AND BUFFER OUTPUT TO ADC - DESIGNED
4 SAME AS 2 WITH PUSHPULL W-ADDRESS LOGIC TO STUDY NOISE.
PRELIMINARY RilSULTS FOR 4 CH 48 CELL ClilP: ( 12 FORSIGHT TINY CHIPS )
l DC LINEARITY ( MAX.DEV. ST LINE ) O.l %
2 DYNAMIC RANGE· > 3 VOLTS
3 TOTAL PEDWOTAL NOISB < l MV,
4 PATTERN NOISE DEPENDENCE: DC INPUT VOLTAGE INVARIE!lT WRITE FREQUENCY • ADDIU:SS PERMUTATION ?
-· 5 CHANNEL caoss-TALK ' - MOS'l'LY THRU PACK.
'-
6 INDUCED NOISE FROM READ TO WRITE PROCESS
7 • • • WRITE • READ •
8 DROOP
9 AC LINEARITY
. 10 6 V, POWER VDDA 5 V. • VDDD AT 60 MHZ
< l MV
> l MV OF BINARY NOISE
< lMV I 10 MSEC.
FUNCTION OF DV/DT
15 MW ll MW
ll ALL ClilPS WERE FUNCTIONAL , AND NONE HAVE BEEN DAMAGED DURING T~T.
SOME CONCLUSIONS. : · ---,l,-..,B.TIUU<i EDGE: CHANGES ARE INDUCED THROUGH INPUT PAD TO SUBSTRATE
Cl-..PACITANCE ,AND NOISE IS Al>DED BETWEEN THE SUBSTRATE AND EXT. CNJ:>,
OUR DIFFERENTIAL READOUT REJECTS COMMON MODE NOISE , BUT HAS TROUBLE WITH VERY FAST EDGES,
2 AG LINEARITY IS LIMITED BY THE WRITE SW RES. DEPENDENCE ON SIGNAL VOLTAGE TIMES DV/DT.
3 WE SEE SYSTEMATIC EFFECTS FROM SEQUENCE PERTURBATIONS. THESE STUJ:>IES :REPRESENT OUR MAZN TEST EFJi'ORT,
152
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COMPARISON OF AH AND HI SPEE]) ADC SOLUTIONS
ADVANTAGES OF AH .SOLUTION:
·.1, REl)UCES ADC SPEED FROM 60 MHZ TO 5 OR 10 MHZ,
2, ALLOWS HUX OF ADC FOR 8 CHANNELS,
3, ALL SAMPLES CAN BE CHOSEN FROM THE SAHE GAIN SCALE,
.4, LOWEST COST SOLUTION,
5, LOW POWER,
6 ~ . ACCE:SSABLE TECHNOLOGY - CMOS ~
ADVANTAGES OF HI SPEED ADC SOLUTION:
1, NO ADDRESS SEQUENCE PERMUTATION NOISE AS WITH THE AH.
2 , NO CELL NUMBER RELATED CALIBERATION CONSTANTS AS WI'l'H THE AM •
. 3, POTENTIALLY BETTER t.INEARI'l'Y FOR SAMPLES WITH LARGE dv/dt.
4 , NO CELL NUMBER DEPJi:Nl)ENCE OF SAMPLING TIME AS WITH THE AM,
5, NO LIMIT IMPOSED ON LBVEt.1 LATENCY,
6, NO LIMIT I~OSEl> ON LBVEt.l RATE.
7 , NO t.IMIT IMPOSED ON TIME WINDOW •.
8. PROVIDES DIG;tTAL INFORMATION i'OR LEVELl,
. .
162
2
COMPARISON OF AM AND HI SPEED ADC SOLUTIONS
DISADVANTAGES OF AM SOLUTION:
·1. SIMULTANEOUS READ AND WRITE REQUIRES ADDRESS SWAPPING.
2. REQUIRES A LARGE NUMBER OF CALIBRATION CONSTANTS:
CORRECTIONS FOR EACH OF 200 CELLS. CORRECTIONS FOR NON-LINEARITIES.
3. ADDRESS SEQUENCE PERMUTATIONS PRODUCE SYSTEMATIC NOISE THAT · CANNNOT BE REMOVED BY CALIBRATION.
4. LEVELl LATENCY IS LIMITED TO A FEW MICROSKCONDS.
5. LEVELl RATE IS LIMITED BY 'l'HE ADC TIME.
6. THE TIME WINDOW IS LIMITED TO ABOUT 5 SAMPLES.
7, INFORMATION FOR LEVELl·MUST BE PROCESSED SBPARATELY.
DISADVANTAGES OF HI SPEED ADC SOLUTION:
l. REQUIRES 60 MHZ 10 TO 12 BIT ADC.
2. REQUIRES DYNAMIC RANGE SPLITTING.
3 • NO SHARING OF INPUTS WITH 'l'HE ADC. .
4 • HIGHER COST.
5. HIGHER POWER.
6. DEPENDS ON LESS.ACCESSIBLE TECHNOLOGY (BIPOLAR OR BICMOS l•
163
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ENCODE
LA'l'CH
60 Hilz
SEIJlC'l' AMPLIFIER
PIPELINED RANGE SELECTION
172
ADC9
60 Miiz
SUMMARY
AMO DEVELOPMENT:
1. OUR FIRST GOAL IS TO FULLY UNDERSTAND THE SYSTEMATIC ERRORS RELATED TO ADDRESS SEQUENCE , ADDRESS SETUP TIME , AND COUPLING
. BETWEEN READ AND WRITE PROCESSES.
2. THIS REQUIRES BUILDING ADDITIONAL TEST CHIPS TO SEPERATE SUBSTRATE NOISE INDUCED BY CURRENTS THROUGH THE PACKAGE LEADS , AND NOISE INDUCED BY ON CHIP SWITCHING.·
3, WE ARE CURREN'l'LY DEVELOPING AN OUTPUT BUFFER AMP TO EASE THE PROBLEM OF IN'l'EaFACING TO THB EXTERNAL ADC.
4. WHEN THESE ISSUES ARE RESOLVED WE WILL BUILD THE FULL SIZE , 8 DIFFERENTIAL , 200 CELL PROTOTYPE CHIP THRO ORBIT FORESIGHT,
DIRECT DIGITIZATION AT 60 MHz:
1, WE ASSUME FOR NOW THAT INDUSTRY CAN SUPPLY 10 BIT 60 MHz ADC'S WITH AFFORDABLE COST AND POWER REQ.
2, WE WILL DEVELOP A RANGE SPLI'l"l'ER AS AN ALTERNATIVE TO THE AM , . BASED ON AN ACCilSSABLE ( TO US ) TECHNOLOGY,
3, WE ARE PURCHASING DESIGN TOOLS DOM TEKTRONIX FOR THEIR CUSTOM PROCESS.
4. THE ORBIT 2 BICMOS PROCESS ( USED AS A DEVELOPMENT TOOL BY FERMILAB FOR THEIR DIGITAL P.H. ) IS AVAILABLE TO US TJ;mU FORESIGHT. ·
TEST MODULE DEVELOPMENT:
WE WILL BUILD A MULTI-CHANNEL AMO - ADC TEST MODULE BY THE END OF '93 TO TEST THE SYSTEM FEATURES.THIS WILL INCLUDE CONTROL , DIGITAL BUFFERING , AND OUTPUT LINK.
173
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10.0 I
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u .... 0
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II
2490 2495 2500 ADC counts
2505 2510
I
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Cl II
0 (JI c..:i
em
Presentation by:
R. L. Wixted
175
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PROBABILITY DENSITY FUNCTION
I .
1· . \
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50 100 150 200 250 O ELECTRON/ION PAIRS
180
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181
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182
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183
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184
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Presentation by:
J. Dorenbosch
185
loo
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~
SUB-SYSTEM DA 1,A RA TES
DATA RATE SUB-SYSTEM CHANNELS EVENT SIZE @lOOKHz
TRIGGER RATE !' 1' '
CALORIMETER 82K SOKB 5 GB/s :c ~l-
IPC 446K 80KB 8GB/s Iv~
SILICON 3230K 20KB 2GB/s i~
MUON 518K 40KB 4GB/s ~ '1
TOTAL 4276K 190KB 19 GB/s 2c;*"
t7.tj6 ~- r;-7 71, ;:: l~b /~ /~!vvi ,.,._ ~I j !) ' ) lo/(!./.'''""
' '
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256x 256
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• modular 1- switch
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storage system 00 supervl•or supervisor
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•
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EVENT DATA COLLECTOR
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DMA
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IN
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16
17
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0 • . .
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240
241
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• I • 15 • 15 • i
2ss i "'I I "'I I ! .... iss ' I •---------------------------------------
TIME DIVISION MULTIPLEXED SWITCII (256 CHANNELS @ 1 Gbps) IMPLEMENTING 65,536
VIRTUAL CIIANNELS @ 4 Mbps
EVENT DATA DIS'fRIBUTOR
IGhpo flBER
(FROM DATA SWITCH) NXM
EVENT BUFFER (1'1118)
I
l>
PROCESSOR OMA
TO'FROM CON11lOL NETWORK
TRANSCEIVER
• • •
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D -FIFO /::). - TRANSMITTER/RF..CEIVER
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~
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193
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194
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195
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196
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197
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198
Minimum Execution Time Calorimeter Algorithm (500 MIPS)
o.oo ~ <~ . . ;:t; . . . I . . . . I . . . . I . . . . I 0.00 0.05 0.10 0.15 0.20 0.25 0.30 - Total
TRIGGER SUPERVISOR
N 0 0
processor requests event (processor id)
·•
send Lt id to processor
(+trigger type?)
remove Lt id from list
Lt Ace trigger pulse arrives
no
Inc Lt counter andaddLl id
to list
yes
throttle the Lt trigger
DATAFLOW OUTLINE
N Q .....
~------------------------i
• I • I LIA arrives from
I+-trigger supervisor
data read from front-end into
event data collector
•• event data collector
builds event fragment and stores Into output buffer
• I • ~------------------------·
EVENT DATA COLLECTOR
-----------------------------------------------------i process
requests event
trigger supervisor supplies the event id to the processor
processor requests data from the appropriate
event data collectors
event data collector transmits the data
to the processor via the data switch
processor sends message to the
remaining event data collectors to discard data for
that event
yes
L2/L3 processing
no
yes
request remaining data from event data collectors
processor begins to write data to tape via the
control switch
-----------------------------------------------------L2PROCESS
• I
Presentation by:
K. Freeman
203
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I
I 30-Flow Processor for a Calorimeter
Programmable Level-1 Trigger I
I D. Crosetto
October 1992
/ /
219
3D-Flow Processor for a Calorimeter Programmable Level-1 Trigger•
Dario Crosetto
Superconducting Super Collider Laboratoryt 2550 Beckleymeade Ave.
Dallas, TX 75237
October 1992
SSCL-Preprint-164
*Presen1ed at the 1992 Nuclear Science Symposium (NSS), Medical Imaging Conference (MIC), Ocl. 25-31, 1992, Orlando, Florida.
toperaled by the Universities Research Association, Inc., for the U.S. Departmenl of Energy under Contrac1 No. DE-AC35-89ER40486.
221
30::..Flow Processor for a Calorimeter Programmable Level-1 Trigger
D. Crosetto Superconducting Super Collider Laboratory*
2550 Beckleymeade Ave. Dallas, TX 75237
Abstract
The types of detectors and the physics involved in present experiments are reaching a level of cost and complexity so great that it is preferable to implement a programmable trigger solution at all levels rather than a system realized with cabled logic. Experience demonstrates that fine tuning on the trigger is often achieved only after running an experiment and analyzing the first data acquired. A Level-I trigger is required to identify objects (particles such as electron, jets, etc.) with programmable algorithms at 60 million frames-per-second. These requirements have led to the design of a special "3D-Flow" processor that, together with a special pipelined parallel-processing architecture, allows a sustained data rate of 60 million framesper-second. The 3D-Flow is a data-flow processor that can be used in one-, two-. or three-dimension array for high-speed signal-processing applications such as identifying objects in a matrix in a programmable form. Feasibility studies demonstrate that with present technology a 3D-Flow chip consuming 8 W, and accommodating 32 processors at 60 MHz can be built today, and that the same chip can be built one year from now at a 120-MHz clock rate.
I. lr-."TRODUCTION
The Superconducting Super Collider (SSC) is being built to study high-energy physics. Every 16 ns, proton beams will collide and the panicles produced by the collision must be identified and studied. Many detectors will be used to detect and identify the panicles. The calorimeter is one of the sub-detectors used at the SSC. Two proton beams will collide in the center of the calorimeter. sending particles to the calorimeter towers in the barrel and end caps. The amount of energy released in the collision is detected and then transferred through channels to digital processors, where the identification of particles is begun in Level-I triggering. The triggering mechanism must be able to rapidly reduce the amount of data by discarding unimponant data. The calorimeter will provide Level- I trigger information regarding electrons, photons, jets, and missing Et (such as neu-
"Operated by the Universities Research Association, Inc., for the U.S. Department of Energy under Contract No. DE-AC35-89ER40486.
trinos). 1 The starting point is the off-line algorithms that require milliseconds (ms) for execution. The challenge is to find a given "system architecture," "processor architecture," and its "instruction set" that provide the best and most suitable (to the component) conversion of the off-line trigger algorithms to a fast and simple "real-time" algorithm that will still have high particle-identifying efficiency.2,3
II. PHYSIC REQUIREMENTS
With a programmable solution, it is possible to use the same electronic (commonality) chain for several experiments. For this reason, and because all physicists do not accept a specific type of trigger algorithm, a programmable solution is highly desirable. As an example of programmability, many trigger algorithms have been implemented. Among these are finding a local maximum, calculating cluster and transverse energy, comparing cluster and partial sums to different threshold, determining whether an electromagnetic cluster is isolated from nearby energy deposition, and determining whether a 4 x 4 matrix is a possible jet. There are many conditions to test when making the Level-I decision. As an example of a programmable system, a few methods that will verify these conditions will be implemented using the 3D-Flow parallel-processing system array. Figure 1 shows how to check some of these conditions.
In order to distinguish electrons and photons, the "em" trigger tower energy must be greater than a threshold, the "had" to "em" ratio must be very small, and if isolation is to be achieved in Level l, the surrounding towers must contain only small amounts of energy. For jet identification, the sum of a tower matrix must be tested against a threshold. To distinguish neutrinos, the E, sum must be compared with a threshold (see Figure 1). An isolated electron should be recognized by a large amount of energy deposited in a small area (about 1 tower wide) while a jet's energy should be spread out covering a large matrix of calorimeter towers. Figure 2 show the flow-chart of the algorithm that executes two "em" sum + front-to-back+ isolation + jet finding.
223
Local maximum
Jet ~ finding EEEB
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FIGURE I. Trigger algorithms examples.
Ill. 30-FLOW PROCESSOR ARCHITECTURE
The architecture of the 3D-Flow processor is shown in Figure 3. The 3D-Flow operates on a data-driven principle. Program execution is controlled by the presence of the data at the five pons (North, East, West, South, and Top) according to the instructions being executed. A clock running at a frequency of 60 (or 120) MHz synchronizes the operation of the cells.4
IV. 30-FLOW PIPELINED PARALLEL-PROCESSING
ARCHITECTURE
Figure 4 shows the 3D-Flow processor in a pipelined parallel-processing architecture.s The program execution at stage I must not only route the new incoming data from the calorimeter to the next stage in the pipeline staging (stage 2), but must also execute its trigger algorithm. A graphical representation of the input and output results and the data flow in the pipelined architecture are shown in the timing diagram of Figure 5.
224
Phase 1:
Phase 2:
Phase 3:
no
set code
no
set code no
no
set code set code
output code
1 two "em" sum !north 1 x 2) > threshold 2 two •em• sum east 2 x 1) > threshold 4 "had" "em" l"°rth 1 x 2) < threshold 8 "had" "em" east 2 x 1) <threshold
16 Isolation achieved 32 possible jet found
FIGURE 2. Algorithms flow-chart. For example, a 3D-Flow may return a code 37 (1+4+32) stating that a possible electron was found, but it was not isolated from the surrounding energy, and that cell may be part of a 4 x 4 jet.
FIGURE 3. 3D-Flow cell architecture.
Stage ll /' /' Stage 3 )'
Stage 2 Stage
V. 30-FLOW CHIP ASSEMBLY AND BOARD
ASSEMBLY
Preferably the assembly of the chip should be in a good thermoconducting package with good power and ground distribution, such as the 447 Ceramic Pin Grid Array with 96 pins of Vee and Gnd. Feasibility studies demonstrate that with present technology a 30-Flow chip consuming 8 W, and accommodating 32 processors at 60 MHz can be built today, and that the same chip can be built one year from now at a 120-MHz clock rate. Figure 6 shows an assembly of 8 x 30-Flow chips on a single board, thus making it possible to analyze calorimeter channels relative to a 0.4 x 0.4.
- E, - elect,..ons
~ - Jet ~do.to.
OM optlco.I FIMr For ••ch T r ..... •
FIGURE 4. General scheme of the pipelined parallel-processing architecture using the 30-Flow.
l~I II Raw data Sta2!!: 4 Sta e 3 Staa!!:2 staae 1
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I had -· ·- 16 I Algorithm - had
ncy execUtlon time - -· I
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I ". I --I i I 48
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ns
ns
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ns
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ns
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Time FIGURE 5. Timing diagram of four stages of pipelined programmable Level-I trigger.
FIGURE 6. Board of the programmable Level-I trigger with 30-Flow array.
I.
2 .
3.
4.
5.
225
REFERENCES
N.Ellis,"EagleTrigger/DAQ/FEGroup,"CERNDAQ-TR-109 20/2192
D. Crosetto, "A fast cluster finding system for future HEP experiments", Nuclear Instruments and Methods in Physics Research, A311, (1992), 49-56.
D. Crosetto and L. Love, "Fully Pipelined and Programmable Level I Trigger," SSCL-576, 1uly 1992.
D. Crosetto, "30-Flow Processor Technical Specifications" SSCL-594, September 1992.
D. Crosetto, "3D-Flow Processor for a Programmable Level-I Trigger (Feasibility Study)" SSCL-601, October I 992.