1. Find Vout and then use a .op(operating point) analysis to verify your hand calculations.

Hand Calculations:

Netlist: Spice simulation:

netlist1Vin n1 0 dc 2R1 n1 n2 1k R2 n2 Vout 2kR3 Vout 0 1k

.op

.end

2. Repeat problem 1 if the input changes from 1 to 1V (so the output will change as well). Verify your hand calculations using a .dc sweep.

Problem 2 (continued)

Netlist (using 0.5v increments for clarity):

netlist1Vin n1 0 dc 2R1 n1 n2 1kR2 n2 Vout 2kR3 Vout 0 1k

.dc Vin -1 1 0.5

.end

Spice waveform (I(Vin), V(n1, n2, Vout)):

3. For the following circuit calculate Vout. Sketch Vout and Vin on the same plot against time ensuring that each sinusoid's magnitude and the phase shift between sinusoids is clear. Verify hand calculations using a .tran LT Spice analysis.

Plot (Note: I utilized some of the information gathered from #4 to calculate delay):

Problem 3 (continued)

Spice Netlist:

SimulationQ3Vin Vin 0 sin 0 1 159R1 Vin Vout 1kC1 Vout 0 1u

.tran 24m

.end

Spice Waveform:

4. Determine the magnitude and phase responses of the circuit in problem 3. Verify

using the .ac analysis.

Spice Netlist:

SimulationQ4Vin Vin 0 AC 1R1 Vin Vout 1kC1 Vout 0 1u

.ac dec 1 1 159

.end