electronic engineering lab manual

8/10/2019 Electronic Engineering Lab manual

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Department of

Electronics & CommunicationEngineering

Manual and Observation Book

Electronic Engineering Lab-1


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K.Sridhar Raju www.engglabs.blogspot.com

2


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Department of

Electronics & Communication Engineering

Electronic Engineering Lab !

Name of te student ! """""""""""""""""""""""""""""""""""""""""""

Class ! """"""""""""""""""""""""""""""""""""""""""""

#oll No! ! """"""""""""""""""""""""""""""""""""""""""""

$emester ! """"""""""""""""""""""""""""""""""""""""""""

%cad ear ! """"""""""""""""""""""""""""""""""""""""""""

"


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#


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L'$( O) E*+E#'MEN($

1, Comparison of $emiconductor diodes .e/ $i & 0ener

2, $tatic Caracteristics of B3( CE

4, $tatic Caracteristics of B3( CB

5, $tatic Caracteristics of )E( C$

6, Design of 7alf 8ave and )ull 8ave rectifier 8itout filters

9, Design of 7alf 8ave and )ull 8ave rectifier 8it filters L/ C/ L section/

: $ection

;, $tatic Caracteristics of $C#

, Measurement of +ase/ )re?uenc@ and $ensitivit@ using C#O

1A, Biasing of B3( and )E(

11, )re?uenc@ response of #C coupled %mplifier using B3(

12, )re?uenc@ response of #C coupled %mplifier using )E(

14, Emitter )ollo8er

$


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%


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Department of

Electronics & Communication Engineering

Electronic Engineering Lab !ame of the student'

Class (.E'

Roll o' )cad *ear'

'NDE*$l

No

Name of te Eperiment Date

Conducted

'nitials of staff

+


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,


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Eperiment! 1 Date!

C7%#%C(E#'$('C$ O) $EM'COND=C(O#

D'ODE$ .e/ & $i,%ND 0ENE# D'ODE

1, %'M! a- o obtain forward and re/erse characteristics of the 0 junction diode 1e and Si-.

2, %++%#%(=$!

Sl o. ame of the de/ice Range3 o 4t5.

!. e Diode DR2$ 6!os2. Si Diode 7 #66+ 6!os". D.C.)mmeter 16$6 m)- 6!os#. D.C )mmeter 16!66 )- 6!os$. D.C 0ower Suppl5 16"68- 6!os

%. Connecting wires !6os+. Resistor !K 6!os ,. D.C 8olt meter 16 9 2$8 - 6!os

4,(7EO#!

D'ODE $+EC')'C%('ON$!

DR 2$ )llo5 junction suitable for low /oltage: low power rectifier applications such as batter5eliminator etc.

8RR;2$ 8 ma 6.2/. =or Si: 8> 6.%/.

(- RE8ERSE (7)S CBD77B' a 0 diode with re/erse bias condition i.e.: with positi/eterminal of the batter5 8rconnected to the nside and negati/e terminal connected to the pside. his re/erse bias causes both holes in the pregion and electrons in the nregion to mo/eawa5 from the junction. Jence the region of negati/e charge densit5 on the pside and regionof positi/e charge densit5 on the nside become wider i.e.: the width of the depletion regionincreases. =urther the height of the potential energ5 barrier increases with increase in 8 r: theapplied /oltage. his increased barrier height ser/es to reduce the flow of majorit5 carriers tothe other side i.e: holes from pside to nside and electrons from nside to pside. Jowe/erthe flow of minorit5 carriers remains uninfluenced b5 the increased barrier height. Sincethese minorit5 carriers fall down the potential energ5 barrier: nominall5 Hero current flowsunder re/erse bias condition as there are a few number of minorit5 carriers. Jowe/er a smallcurrent does flow in the re/erse direction i.e.: from nregion to pregion across the junction.his e


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5, C'#C='( D'%.#%M' =BRA)RD (7)S

RE8ERSE (7)S

6, +#OCED=#E !

=BRA)RD CJ)R)CER7S7CS'

!. Connect the circuit as shown in the corresponding circuit diagram.2. 7ncrease the suppl5 /oltage from Hero /olts. Bbser/e the corresponding /alue of current.". =or e/er5 /alue of forward /oltage across the diode: obser/e the /alue of current and record

it.

NO(E!he graph should be drawn showing that the /oltage 8fis an7ndependent parameter hence the suppl5 /oltage must be /aried andcorresponding /alue of current must be noted.

#. Bbser/e the /oltage across the diode where current 7fjust starts flowing through the diode.ow record the /alues of /oltage and current.

$. he cutin /oltage should be clearl5 obser/ed and noted.%. 7ncrease the diode /oltage in suitable steps without e


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,. 0lot the graphs and obtain the d5namic and static resistance from the 87 characteristics.Compare them with the e


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1b- =or Re/erse (iased Condition'

Sl.o 8s 8d18- 7d1)-

!"


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;, OB$E#%('ON$ ' =or Si. Diode

1a- =or =orward (iased Condition '

Sl.o 8s 8d 18- 7d1m)-

!#


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1b- =or Re/erse (iased Condition'

Sl.o 8s 8d18- 7d1)-


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>, #E$=L(!-

1A, '% =E$('ON$!

!. Ahat do 5ou understand b5 a junction diode

2. 7s the 0 junction diode a passi/e element or an acti/e element

". Ahat is the importance of the t5pe number gi/en to the /arious diodes

#. Ahat is meant b5 potential barrier across a 0 junction

$. Ahat is the significance of a diode as a de/ice

%. Ahat is cut in /oltage Ahat is the /alue of cutin /oltage for eand Si diodes. Ahat is the reason for the difference in cutin/oltage of e and Si.

+. E


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1, %'M! b- o obtain the /oltampere characteristics of Hener diode

2, %++%#%(=$!

S.o. 7tem Range3Specification 4t5! Oener diode ESO $.2 !

2 DC )mmeter 6$6 m) !" DC 8oltmeter 626 8 2# Resistor 2.2 NJalf Aatt !$ Regulated 0ower Suppl5 6"6 8 !% Decade Resistance (o< ! !6 ; !+ 0atch cords 3 Connecting wires

4, (7EO#!

(ecause of the e


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5, C'#C='( D'%.#%M$!

=or Re/erse (ias'

=or =orward (ias'

6. +#OCED=#E!

1=or Re/erse (ias-!- Connect the circuit as per th" circuit diagram. Keep the /oltage of the power suppl5 at

minimum and switch it on.2- Starting from Hero: increase the suppl5 /oltage in small steps. Each time: note the

corresponding /ales of the Oener /oltage 8H1as indicated b5 the /oltmeter- and the current1as indicated b5 the ammeter-.

"- abulate all readings and plot i /ersus 8H.

1=or =orward (ias-!- Connect the circuit as per the circuit diagram. Ensure powersuppl5 /oltage Nnobs are in the

minimum position and switch it on.

2- 8ar5 the suppl5 /oltage in small con/enient steps. ote down the corresponding /ales offorward /oltage 1as indicated b5 the /oltmeter- and the current 1as indicated b5 the ammeter-.

"- abulate all readings. 0lot i /ersus 8f.

!,


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9, E*+EC(ED .#%+7!

;, (%B=L%# COL=MN$!

=orward Characteristics '

S.B 8O 18olts- 7O 1m)-

!?


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Eperiment 2: Date!

C7%#%C(E#'$('C$ O) B3( (#%N$'$(O# CE

1, %'M!b- o obtain the input & output characteristics of (M in common emitter configuration.

2, %++%#%(=$!

S.o. ame Range3Specification 4t5! 0 (M (C!6+ !2 Resistor !., NQ !" Resistor ,% NQ !# 8oltmeter 6!6 8 !$ ;icroammeter 6266 ) !% ;illiammeter 6!6 m) !+ Dual Channel

Regulated0ower Suppl5

6"68 !

4, C'#C='( D'%.#%M!

8CE

.

5, (7EO#!

2!

!.,K


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here are two sets of characteristics that can be drawn for a (M in common emitterconfiguration. he5 are the input and the output characteristics. he input characteristicsare obtained from the following relation.

8(E>f18CE:7(- Ahere 8(Eis the base to emitter /oltage: 8CE is collector to emitter /oltage and 7(stands for

abase current.

he output characteristics are obtained from the following relation'7C>f18CE:7(- where 7C is the collector current

'nput caracteristics'=or 8CE> 68 the collector is effecti/el5 shorted to the emitter. he resulting structure is

nothing but a diode 1pn junction-. he characteristic cur/e obtained 18 (E8ersus 7(- ifessentiall5 that of a junction diode.

7n the case of input characteristics for 8 CE> 68: 7f 8(E> 6: the base current 7(>6m) sinceboth the emitter and collector junctions are shorted.

=or an5 nonHero /alue of a 8CEthe base current for 8(E>68 is not Hero. 7ts /alue is

/er5 small to be obser/ed. 7n general for constant 8(Eas 8CEincreases the base width increasesas per the Earl5 effect 1base width modulation- and this results in decreased recombination basecurrent.

Output caracteristics!- he output characteristics can be di/ided into three parts . he5 are'1i- )cti/e region 1ii- cut off region 1iii- saturation region.

%ctive region!- 7n the acti/e region the emitter base junction 1ME- is forward biased andcollector base junction1MC- is re/erse biased. 7n the acti/e region collector current respondsmore readil5 to an5 input signal. he operation of the common emitter stage is used as anamplif5ing stage onl5. Due to Earl5 EffectF: the current gain increases with increase in 8CE.he large slope of the characteristic cur/e of the CE transistor signifies that the incremental

output impedance of the (M in CE is lower that that in C( configurationCutoff region!- he transistor is said to be in cut off when emitter current is Hero. =or achie/ingthis condition: it is not enough to ha/e the base current 7 (> 6: because e/en with 7(>6: thecollector current 7C>1!@-7C6. So: in order to achie/e cutoff condition: it is necessar5 to slightl5re/ersebias the emitter base junction: which can be achie/ed b5 appl5ing 6.! /olt forermanium and 68 for silicon. his will ensure the reIuired conditions for cutoff i.e.

7E> 6: 7C> 7C6: 7(> 7C> 7C6$aturation region!-7n saturation region both the junctions ME and MC are forward biased b5 atleast the cut in /oltage. he /oltage 8(E 18(C- across forward biased emitter 1collector-junction has magnitude of just a few tenths of a /olt. Jence the saturation region lies e


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70T CJ)R)CER7S7CS!

!. ;aNe the connections as per the circuit diagram.2. Ensure the /oltage Nnobs of the power supplies are in the minimum position before switching

them on.". Choose a /alue for 8CE. =i< the power suppl5 Nnow 8CCto get the desired /alue of 8CE.#. 8ar5 the /oltage 8(( in small steps. Each time: note down the /alue of 8(E and the

corresponding /alue of 7(.$. Choose another /alue for 8CEand repeat the abo/e steps.%. abulate all readings and plot 7(/ersus 8(E.

BT0T CJ)R)CER7S7CS'

!. Tse the same circuit as abo/e for obtaining the output characteristics.2. ow maintain 7(at some constant /alue. 8ar5 8CCand obser/e the changes in 7Cdue to

the changes in 8CE.". 7nitiall5 Neep 7(>6 ). 8ar5 8CCfrom Hero /olts and note down the readings of 7C& 8CE.#. Repeat the abo/e procedure for a few other /alues of 7(such as !66 ). abulate all the

readings as per the tabular form.

9, (%B=L%# COL=MN$!

7nput Characteristics'

8CE>68 8CE>28 8CE>%8

7(1)- 8(E18- 7(1)- 8(E18- 7(1)- 8(E18-

2"


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Butput characteristics!

;, Epected

.raps!

BT0T

CJ)R)CER7S7CS'

7(>6 ) 7(>!$ ) 7(>2$ )

8CE18- 7C1m)- 8CE18- 7C1m)- 8CE18- 7C1m)-

2#


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70T CJ)R)CER7S7CS '

8CE> 28 7( 1)-

8CE>68 8CE>%8

8(E18olts-


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>, '% OCE!

!- Ahat is a transistor Ahat is the difference between an 0 and a 00 ransistor2- Draw the s5mbolic representations of 0 and 00 transistors."- E 28.!#- i/e the /alues of 8CE Sat: 8CE Cutoffand 8CE )cti/efor the transistor (C!6+.!$- Ahat are the other applications of the common emitter configuration 1other than as an

amplifier-

2%


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;8SR E7EER7 CBLLEE:J*DER)()D.

Eperiment 4: Date!

C7%#%C(E#'$('C$ O) B3( (#%N$'$(O# CB

1, %'M! a- o obtain input and output characteristics of a commonbase transistor.

2, %++%#%(=$!

Sl.o.ame of the de/ice

Range 3o 4t5.

!. )mmeters 6 9!6 m) 62

2. Resistor 2.2K 6!

". ransistor (C !6+ 6!

#. ;ulti meter38oltmeter 6!

4,C'#C='( D'%.#%M!

5,(7EO#!

he circuit shown in the figure abo/e: is referred to as Common (ase or C( configuration:since the base is common to both input and output circuits. =or an 0 ransistor: thelargest current components are due to the electrons. he emitterbase junction is alwa5sforward biased 1the /oltage being 8E(-and the collectorbase junction is re/erse biased 1the/oltage being 8C(-.

he /arious currents are related b5 the eIuation 7E>7(@7C

2+


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=rom the eIuation: we see that output current 7Cis completel5 determined b5 input current 7 Eandthe output /oltage 8C(>8C. he output relation ma5 be written in implicit form as

7C>f18C(:7E-

Similarl5: in implicit form: the input characteristic is gi/en b58E(>f18C(:7E-

he output characteristic is a plot of 7C/ersus 8C(with emitter current 7Eas a parameter.he input characteristic is a plot of 7E/ersus 8E(with 8C(as a parameter.

Eplanation of caracteristics!

7n commonbase configuration: the emitterbase junction acts liNe a forward biased junction.herefore: the input characteristics are nothing but the /oltampere characteristics of this junctiondiode. )s in a semiconductor diode: these characteristics also ha/e a cutin /oltage. )n increasein the magnitude of 8C(causes the magnitude of 7E to increase with 8E( held constant. hisincrease is attributed to a phenomenon called basewidthmodulation or Earl5 Effect. herefore:

the cur/es shift leftwards with increasing 8C(.7n: the output characteristics: we can identif5 three regions. he5 are )cti/e Region: SaturationRegion and Cutoff Region.7n the acti/e region: the collector junction is re/erse biased and the emitter junction is forwardbiased. 7n the saturation region: both emitter and collector junctions are forward biased. )nd inthe cutoff region: both emitter and collector junctions are re/erse biased.he characteristics are shown in the e


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%. 0lot 7C/ersus 8C(.

9,OB$E#%('ON$!

70T CJ)R)CER7S7CS'

S. o 8C( > 28 8C( > #8

8E(18- 7E1m)- 8E(18- 7E1m)-

2?


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BT0T CJ)R)CER7S7CS'

;, E*+EC(ED.#%+7$!

BT 0T CJ)R)CER7S7CS

7C1m)-7E> %m)

S.o 7E> 2m) 7E> #m)

8C(18- 7C1m)- 8C(18- 7C1m)-

"6


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7E> # m)

7E> 2m)

8C(18olts-

70T CJ)R)CER7S7CS

8C(> #8 7E1m)-

8C(> 2 8C(>%8

8E(18olts-

, '% OCE!

!- Ahat do 5ou understand b5 the term (ipolar Munction ransistor

2- Ahat are the /arious t5pes of ransistors a/ailable. )re there an5 preferred t5pes if so wh5

"- Ahat do 5ou understand b5 input and output characteristics

"!


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#- Distinguish between acti/e: saturation: cutoff regions and internal operations of a (M

$- Discuss the /arious doping le/els in the emitter: base and collector regions%- E


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2,%++%#%(=$!

S.o. 7tem Range3Specification 4t5! nchannel M=E (=A!6 !2 DC )mmeter 6!6 m) !" DC 8oltmeter 626 8 2# Resistor #.+ NJalf Aatt !$ Dual Channel Regulated 0ower

Suppl56"6 8 !

4, C'#C='( D'%.#%M!

5, (7EO#!

he common source drain characteristics for a t5pical nchannel =E are obtained b5plotting the drain current against 8DS1the drain to source /oltage- with 8S1the gate to source

/oltage- as a parameter. he gate forms a 0 junction with the channel. Ahen a re/erse bias isapplied to this junction: a spacecharge region is formed. Since the gate is relati/el5 hea/il5doped: the spacecharge region e 68. ow with 8S>6/ there is no re/erse bias at thegate and hence the channel between the gate junction is completel5 open. Tnder this conditionwhen 8DS>68 there is no electric field applied across the drain and source. herefore majorit5carriers 1i.e. electrons in the case of an nchannel =E- do not conduct and the drain current 7 D>6with the application of a small /oltage 8DS at drain. he nt5pe semiconductor beha/es liNe asingle resistor following Bhms law and definite drain current flows. his drain current 7 D/aries

linearl5 with 8DS. herefore: ohmic /oltage drop taNes place across the bar. his /oltage drop1which is nonuniforml5 distributed within the length of the bar- re/erse biases the gate junctionresulting in narrowing of the channel. he depletion region is not uniforml5 distributed. 7t is moretowards the drain end rather than at the source end. )s the magnitude of the drain /oltage 8DSisincreased progressi/el5: a critical /alue of 8DS is reached at which the channel gets almostconstricted i.e.: more or less blocNed. Ahen 8DSis further increased the drain current 7Dbecomesconstant. he /alue of 8DSfor which the drain current reaches almost a constant /alue is calledthe pinch off /oltage 8p: he region of the characteristic cur/e for which 8DSG8pis called theconstant current region or the pinchoff region. Ahen a regulati/e /oltage is applied at the gate:

""


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the re/erse bias at the pn junction is greater and pinch off occurs for smaller /alues of 8 DS. )lsothe ma68.

6, +#OCED=#E!

DR)7 CJ)R)CER7S7CS'

!- Connect the circuit as per the circuit diagram.2- 7nitiall5: choose 8S>6. ;aNe 8>6 so that 8Sbecomes 6."- 8ar5 the drain suppl5 8DD starting from 68. ote the /oltage 8DS and the corresponding

drain current 7d.#- abulate all readings.$- Repeat steps " and # b5 taNing different /ales of 8S1sa5 8S>!8: "8 etc-.%- 0lot 7d /ersus 8DSin each case.

R)S=ER CJ)RECER7S7CS'

!- Connect the circuit as per the circuit diagram.2- Choose a /alue for 8DS: sa5: #8."- 8ar5 the drain power suppl5 8DD to get 8D as the chosen /oltage. his is Nept unaltered

through the rest of the steps.#- ow: /ar5 8Sfrom 68 onwards in small con/enient steps. ote the corresponding /alue of

7D.$- Bbser/e that 7Dis ma6 and 7Dbecomes Hero for some /alue of 8S.%- abulate all readings.+- Chose another /alue of 8DSand repeat the abo/e procedure.0lot 7D/ersus 8Sin each case

9, Epected .rap!

"#


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DR)7 CJ)R)CER7S7CS

;, (%B=L%# COL=MN$!

DR)7 CJ)R)CER7S7CS'

8S> 6.$ 8olts 8S> 6.! 8olts

8DS 18- 7D 1m)- 8DS 18- 7D 1m)-

"$


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R)S=ER CJ)R)CER7S7CS'

8DS > 2 8olts 8DS > % 8olts

8S 18- 7D 1m)- 8S 18- 7D 1m)-


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>, '% OCE!

!- Ahat are the differences between a (M and a M=E

2- Ahat is meant b5 a unipolar de/ice Ah5 is a M=E Nnown as a Tnipolar De/ice

"- Ahat are the t5pical applications of a M=E

#- Ahat are the parameters of a =E Ahat are the relations between them

$- Ahat are nchannel and pchannel M=Es Jow are the5 different from one another

%- i/e the names3numbers of a few commerciall5 a/ailable M=E de/ices.

+- Ahat are the /arious possible configurations in which a M=E can be connected Ahat

are the t5pical applications of each

,- Ahat is a ;BS=E Ahat are the possible t5pes in a ;BS=E

"+


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Eperiment 6: Date!

",


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#EC(')'E#$ '(7O=( )'L(E#$

1, %'M! o obtain ripple factor and regulation of a half wa/e and full wa/e rectifier withoutfilters.

2, %++%#%(=$'S.o. ame of the de/ice Range3o 4uantit5

!. Diodes ! #66+ 2 o.

2. ;illi ammeter 6 2$m )mp. ! o.

". CRB 26 ;hH ! o.

#. Center taped ransformer %6% 8 ! o.

$. 0atch cords

%. 8oltmeter 626 8 ! o.

+. Decade Resistance (o< !Q 9 !6 ; Q ! o.

4, (7EO#!Rectifiers perform the tasN of con/erting ).C. to D.C. Commonl5 used rectifiers are JalfAa/e Rectifier and =ullwa/e Rectifier.

7alf 8ave rectifier!

he basic rectif5ing element is a diode. his de/ice has essentiall5 an infinite resistance1when itis re/erse biased- to current flow in one direction and a /er5 small resistance 1when it is forwardbiased- for the current flow in the opposite direction.Ahen the diode is forward biased: currentflows through the load resistance: leading to the de/elopment of a uni directional output across it.Ahen it is re/erse biased: current is appro


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)=LL %E #EC(')'E#

6, +#OCED=#E !-1 Connect the circuit as per the circuit diagram.2 Choose an appropriate /alue for the load resistor: sa5: !6 N Q.

4 Bbser/e the input and output wa/eforms on the CRB and /erif5 whether the5 are as can bee


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;, )O#M=L%E!J)L= A)8E REC7=7ER'7m> 8m3 1Rf @ RL@ R-

7dc> 7m32

7rms> 7m3U

V > W17dc37rms-29 !X!32

Regulation > 18no load9 8full load-38full load=TLL A)8E REC7=7ER'7m> 8m3 1Rf @ RL@ R-

7dc> 7m3!.#!#

7rms> 27m3U

V > W17dc37rms-29 !X!32

, '% OCE!

!- Ahat is the ad/antage of using a full wa/e rectifier o/er a half wa/e rectifier

2- Ahat is a bridge rectifier Ahat is the ad/antage of using it o/er a full wa/e rectifier

"- Ahat is the 0eaN 7n/erse 8oltage in the case of full wa/e and half wa/e rectifiers

#- Define regulation and ripple factor. Ahat are the ideal /alues for these Iuantities Ahat arethe practical /alues

$- Jow do we remo/e ripple from a rectifier output

%- Ahat is a filter Ahat is its use

#!


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Eperiment 9: Date!

#EC(')'E#$ '(7 )'L(E#$

!. %'M! o obtain ripple factor of a full wa/e rectifier with filters.

2. %++%#%(=$!S.o. ame of the

de/iceRange3 o 4t5

! Si diode 7#66+ 2

2 D ; ; 2" ).C power

suppl52"68:$6JH !

# Connectingwires

$ Resistor !K !% C R B !

". (7EO#!) full wa/e rectifier con/erts a Hero a/erage /alue signal into a signal which is

unidirectional with some a/erage /alue. he two diodes in the circuit are connected in sucha wa5 that the conduction for one half c5cle 1@/e- taNes place through one diode 1sa5 D-and the diode D2is not conducting. 7n the ne


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A7J LSEC7B =7LER'

A7J 07SEC7B =7LER'

##


45/78


#. +#OCED=#E!

0)R 9 ) 1Tsing an inductor filter-!- Connect the full wa/e rectifier circuit with an inductor filter

of /alue L > !6J and RL> !6K.he step down /oltage output of the transformer is applied as

input to the =AR circuit.2- ;easure the dc current flowing the circuit"- Bbser/e the output wa/eforms on the CRB.#- ;easure the peaN /alue of the input and output /oltage using a CRB. )lso measure the

ripple /oltage.$- Calculate the regulation and ripple factor using the appropriate relations.%- 8erif5 the results using theoretical calculations.

0)R 9 ( 1Tsing a capacitor filter-!- Connect a capacitor filter to the full wa/e rectifier circuit.2- Bbser/e the input and the output wa/eforms on the oscilloscope."- ;easure the DC current through the load.

#- ;easure the ripple /oltage and the peaN /oltage of the output wa/eform from theoscilloscope.

$- Calculate the ripple and regulation using the appropriate relations%- 8erif5 the results using theoretical calculations.

0)R 9 C 1Tsing L 9 Section =ilter-!- ;aNe the connections as per the circuit diagram.2- Connect an LSection filter as shown."- Bbser/e the input and the output wa/eforms on the Bscilloscope#- ;easure the dc current flowing the circuit using the DC )mmeter.$- ;easure the peaN /oltage and the ripple /oltage of the output wa/eform.%- ;easure the series resistance of the choNe: 1Rc- resistance of the

transformer winding 1Rs- and the diode forward resistance 1Rf-+- Calculate regulation and ripple factor using appropriate relations,- 8erif5 the results using theoretical calculations.

0)R 9 D 1Tsing a Section filter-!- ;aNe the connections b5 connecting all the capacitors and

inductors in the circuit.2- Bbser/e the output wa/e form on the Bscilloscope."- ;easure the dc current 17dc- flowing through the circuit.#- ;easure the peaN /oltage and the ripple /oltage on the oscilloscope.$- E/aluate the ripple factor and regulation using the appropriate relations.%- E/aluate the results theoreticall5 and /erif5.

#$


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6, )O#M=L%E!

'ND=C(O# )'L(E#!

#ipple )actor!

V > W2 3 1" Y2- XW! 3 Y1! @ #Z2L23 RL2-X7f #Z2L23 RL2GG !V > RL3W"Y2. ZLX#egulation !8dc o Load> 28m3 8dc =ull Load> 28m3 7dcR 1"-R 9 is the total resistance of the circuit eRf@RC@RS where Rfis the forward resistance of diode: RCis the choNe resistance and RSisthe resistance of the secondar5 winding.

C%+%C'(O# )'L(E#!

8dc no load> 8m8dc full load> 8m9 18r3 2- Ahere 8ris the total capacitor discharge /oltage or the ripple /oltatge.

#ipple )actor!

V > 8rms3 8dc> ! 3 1# Y" fcRL-V > 18r32-318m 98r32-L F $EC('ON )'L(E#'#egulation!

8 dc no load> 28m3 8dc full load> 2 8m3 7dc.1Rf@RC@RS-L-section filter!

#ipple )actor!

r > 8rms3 8dc> 2 < c 3 " < L > 1Y2- 3 1!2Z2LC-

- $EC('ON )'L(E#!

#egulation!

8dc no load> 8m8dc full load> 8m9 8r3 2#ipple )actor!

R.=> !31% Y2 Z2LC -

9, OB$E#%('ON$!

7DC 7)C 8DC 8)C Ripplefactor

7nductorfilter

CapacitorfilterL Section=ilter[ filter

#%


47/78


;, #E$=L(!

'% - OCE

!. Ah5 is the ripple freIuenc5 double the /alue of the suppl5=reIuenc5 in the case of a full wa/e rectifier.

2. E


48/78


Eperiment ;: Date!

$(%('C C7%#%C(E#'$('C$ O) $C#

#,


49/78


1, %'M! o obtain the /oltampere characteristics of SCR

2, %++%#%(=$!

a- SCR e


50/78


6, +#OCED=#E!

(asic Characteristics of SCR'a- Connect the circuit as shown. )djust some DC /alue and connect an )mmeter and

8oltmeter.b- ow short the gate terminal to the anode terminal.c- hen SCR fires and is indicated b5 the flowing of anode current. 8oltage across anode to

cathode falls.d- ow: open the gate terminal and obser/e whether the SCR is B or B==.

e- 7f the SCR is in the B state: then the anode current is enough to Neep the SCR in the Bposition. 7f SCR is B==: the increase the DC /oltage to some more /alue and repeat theabo/e procedure.

f- =ind out the appro


51/78


;, E*+EC(ED .#%+7!

, '% =E$('ON$!

a- E


52/78


Eperiment


53/78


$(%('C C7%#%C(E#'$('C$ O) =3(

!. %'M! o obtain the /oltampere characteristics of TM

2, %++%#%(=$!

e- TM e


54/78


5, C'#C='( D'%.#%M$!

6, +#OCED=#E!!. Connect the circuit diagram as shown in the =igure.2. ;aNe sure that the potentiometer is in its minimum position 1anti clocN wise direction- ..". )djust the potentiometer in clocN wise direction and noted down the /alues of the

/oltmeter and milli ammeter.#. abulate these /alues and draw graph between emitter /oltage 8Eand current 7E.

9, (%B=L%# COL=MN!

S.o Emitter 8oltage 18- Emitter current1m)-

$#


55/78


;, E*+EC(ED .#%+7!

, '% =E$('ON$!

d- E


56/78


Eperiment >: Date!

$%


57/78


$(=D O) C#O %++L'C%('ON$

!. %'M! o use a CRB 1Cathode Ra5 Bscilloscope- for freIuenc5 and phasemeasurement.

2, %++%#%(=$!

Sl.o ame of the de/ice Range 3o 4t5.

!. .eneral purpose C#O $;hH 6! o

2. %,), generators 62 o

". #) signal generators 6! o

#. 7ig pass circuit 6! o

)s scopes we ha/e operate at !6;hH and some up to "6 ;hH we should includemeasurement of freIuencies of the order of $ to !$ ;hH also.1=or )= onl5 Lissojoes figure-.

CRO APPLICATIONS

4, (7EO#!-

(5 appl5ing suitable alternating /oltage to the two sets of deflection plates:/arious figures is the form of straight line or one or more closed loops ma5 be obtained on thescreen.

Let 8


58/78


Ae obtain closed figures with multiple loops.

a- A 2A5b- 2A A5c- A "A5d- "A< > A5

7n general n


59/78


2. o the other set of deflection plates 15- appl5 the unNnown alternating signal.". ow adjust the freIuenc5 of the signal to such a /alue such that the figure obser/ed on the

screen is a single loop.#. ow read the freIuenc5 of the signal gi/en to the < plates from the oscillation. he freIuenc5

of the unNnown signal is eIual to the Nnown signal freIuenc5.$. ) looped Lissajo5s figure ma5 be obtained when the freIuenc5 of the unNnown signal bears

some relation to the freIuenc5 of the Nnown signal.%. he freIuenc5 of the unNnown signal ma5 be found from the eIuation gi/en below. = points of tangencies to a /ertical line 3 points of

tangencies to a horiHontal line.i.e. n


60/78


$. )(TL)R CBLT;S.o ime period =reIuenc5

9, #esult!

;, '% O'CE !-

!. List the structured details of a CRB.

2. Ahat is the function of accelerating anode in a CR

". Ahat is the amount of potential to be applied at the final anode and state the reasons forappl5ing that /oltage

#. Ahat is the nature of the signal applied to the horiHontal and /ertical deflection plates.

$. Ahat are the /arious screen colours a/ailable. Ahat is the chemical used for each of thecolour.

%. List the /arious applications of a CRB.

+. Ahat are Lissajous figures. Jow are the5 formed

,. Jow can 5ou obtain an ellipse on a CRB screen

%6


61/78


Eperiment 1A: Date!

B3( - B'%$'N.1, %'M! a- o design a selfbias circuit for a (ipolar Munction ransistor and to /erif5 its

worNing.

2, %++%#%(=$!

S.o. 7tem Range3Specification 4t5! pn transistor (C!6+ !2 Resistors #.+ N: ".2N: !6K& !N ! each" D.C. )mmeter or multimeter 6 to 26m) !# D.C. 8oltmeter or multimeter 6 to 268 !$ Dual Channel Regulated power

suppl56"68 !

4, (7EO#!

(iasing is used to obtain a stable operating point against de/ice /ariation. he operatingpoint depends upon transistor parameters and the5 in turn depend on temperature.he transistor parameters liNe change from one transistor to another: although the5 are of

similar t5pe. i.e. the /alue of the parameters might be different for different de/icesbelonging to the same t5pe.

E/en with the state of the art in Semiconductor De/ice echnolog5: transistors of a particulart5pe still come with a wide spread /ariation in the /alues of some parameters.hermal

instabilit5 causes great changes in re/erse current 7C6. 7t doubles for e/er5 !6C rise intemperature. 7t in turn causes the collector junction temperature to rise: which in turnincreases the /alue of 7C6further. )s a result: the /alue of 7C6increases and there occurs ashift in the 4point of the transistor,

he Emitter biased or the Selfbiased circuit worNs in the following manner. 7f there is anincrease in the collector current 7C: then: the /oltage drop across the resistor Reincreases.(ecause of this increase: the base current actuall5 decreases. (ecause of this: the effect of the

increase in the collector current is decreased.Jowe/er: there is bound to be loss of )C signal gain due to the same reason.o a/oid the loss of )C signal gain because of this: a capacitor is used to b5pass the emitterresistor Re.

%!


62/78


5, C'#C='( D'%.#%M!

6, +#OCED=#E!

!. Design the reIuired circuit as per the reIuirements.2. )fter connecting the circuit as per the design: measure 8 CE: 8(E: 8e: 7C: 7(and 8C

using multimeters. Calculate the stabilit5 factor and the operation point. 8erif5theoreticall5.

9, OB$E#%('ON$ %ND C%LC=L%('ON$!

8CC >8C >8E >RC >8( >8CE >7C >

$ G

>8CC > 7CRC@ 8CE which implies7C > 18CC 8CE-3RCR(3RE > 1!@-1S!-3 !@9 S

8 > 7(R(@ 8E@ 8(EAhere 8 is the /oltage of the he/enins eIui/alent /oltage source.

8 > 17C3-R(@ 8E@ 8(Ehen:

%2


63/78


R!> R(18CC38-

R2> R!8 318CC8-

=rom the circuit: the current through R!is gi/en b5'7!>8CC31R!@ R2-

herefore: the 8oltage 82 de/eloped across R2is gi/en b5 8oltage Di/ision 82>8CCR231R!@ R2-B@ appl@ing HL to te base circuit

82 > 8(E @ 8E> 8(E @ 7ERE.

>G 7E > 1829 8(E- 3 RE.ow: appl5ing K8L to the collector side circuit: we get

8CC > 7CRC@ 8CE @ 7E RE> 7C1RC@ RE- @ 8CE 1since 7E 7C-

>G 8CE > 8CC 7C 1RC@ RE-

;, #E$=L(!


64/78


%#


65/78


)E( B'%$'N.!

1,%'M! o design a source selfbias circuit and /erif5 its operation.

2,%++%#%(=$!

S.o. 'tem Specification 3 range o. ! nM=E (=A!6 ! 2 Resistors #.+N: 22N: #+6 ! " D.C. ammeter 16!66 ma- ! # D.C. /oltmeter 1626 8- ! $ Connecting wires

4,(7EO#!

)s in all amplifiers consideration must be gi/en to biasing the =E to place its operatingpoint within the linear portion of its acti/e region. he factors go/erning selection of operatingpoint for a =E are similar to that for (M.

TnliNe a (M a re/erse bias /oltage is to be applied across the gate to source junction in a=E. =or a specified drain current: the corresponding 8gscan be obtained. Since the gate currentis negligible: the reIuired source resistance can be determined as ratio of 8gsto 7d.

) capacitor Csha/ing /er5 large /alue is used to b5pass the resistor RSso as to a/oid thedegenerati/e feedbacN for a.c. signals. he problem of biasing further is simplified b5 the factthat there e


66/78


6,C'#C='( D'%.#%M!

9,#E$=L(!

;, '% OCE!

!- Ahat is the ad/antage of a =E biasing circuit abo/e (M biasing

2- Ahat is the need for the capacitor CS

"- Ah5 are the coupling capacitors reIuired

#- Ahat is meant b5 thermal stabiliHation

$- i/e e


67/78


Eperiment 11: Date!

COMMON EM'((E# B3( %M+L')'E#

!. )7;'o determine the freIuenc5 response of a CommonEmitter (M amplifier.

2. )00)R)TS'S.o. ame Range3Specification 4t5! 0 (M (C!6+ !2 Resistors $2K:!$K:#.+K:!66 BJ; ! each" Capacitors 6.6!f:6.66!f # Regulated 0ower

Suppl56"68 !

$ Cathode Ra5Bscilloscope

Dual race 1626 ;JH- !

% )= Signal enerator 6!666 NJH !+ Connecting

wires3probes

". JEBR*'7n a single stage CE amplifier: the weaN time/ar5ing signal is applied to the base of thetransistor. Due to this: a small base current 1which itself is time /ar5ing- starts flowing. Due tothe action of the transistor: a much larger current flows through the collector load. his current isactuall5 about times the base current. herefore: a weaN signal applied at the base appears in anamplified form at the output of the transistor circuit. 7t is in this fashion that the Common Emitteramplifier acts as an amplifier.

Jowe/er: for the transistor to act as a good amplifier: there are certain reIuirements that must

be met. 0articularl5: we need to stud5 the circuitr5 that is associated with a practical amplifier.he following are the /arious circuit elements that are reIuired.i- he biasing circuit' he resistors R !: R2 and Re form the biasing circuit for thetransistor. his arrangement is necessar5 to establish a proper operating point. 7f the transistor isnot properl5 biased: it ma5 go into saturation for the positi/e half c5cle or it ma5 go into cutoff inthe negati/e half c5cle.ii- 7nput Capacitor Cin' )ll practical signal sources ha/e some output resistance. 7fnecessar5 steps are not taNen: this resistance comes in parallel with R2of the biasing circuit:disturbing the operating point. 7f a capacitor Cinis used in series with the source as shown: itallows onl5 the ac component to pass through but isolates the signal source from R2. enerall5:an electrol5tic capacitor or appropriate capacit5 is used as C in.

iii- Emitter (5pass Capacitor Ce' he presence of the emitter resistor Re in the biasingcircuit has the effect of reducing the gain of the amplifier. his happens because the currentflowing through the Recauses the emitter /oltage to rise. o impro/e the gain of the amplifier:the resistor Reis b5passed b5 a capacitor Ce. his capacitor pro/ides a lowimpedance path forthe ac component: thereb5 impro/ing gain.i/- Coupling Capacitor Cc' he coupling capacitor is connected between the output of onestage to the input of the second. 7n its absence: the Rcof the first stage comes in parallel to R!ofthe second stage: disturbing the operating point of the second stage. )lso: the capacitor ser/es toisolate the dc between the two stages.

%+


68/78


ain' he ratio of the output electrical Iuantit5 to the input of the amplifier is called its gain. 7fthe output and the input Iuantities are /oltages: the gain is called the 8oltage ain of theamplifier.=reIuenc5 Response' he /oltage gain of an amplifier /aries with signal freIuenc5. hishappens because the reactance of the capacitors in the circuit changes with signal freIuenc5. )plot between the /oltage gain and the signal freIuenc5 of an amplifier is called the freIuenc5

response of the amplifier.(andwidth' he range of freIuenc5 o/er which the gain is eIual to or greater than about+6.+ 1!3Y2 times- of the ma


69/78


$- abulate all readings. )t each input freIuenc5: calculate the gain as )/ > 8o 3 8 i. )lsofind the /alue of the gain in decibel as 26 log )/.

%- 0lot a graph between the input freIuenc5 1f- and the gain1in decibel- on a semilog graphpaper.

+- Bn the graph: identif5 the "d( points. he freIuenc5 range between the "d( points isnothing but the bandwidth of the gi/en amplifier.

%. )(TL)R CBLT;'

'nput oltage inG 6Am

$,No, 'nput )re?uenc@ Output oltage

out

oltage .ain

%vG outIin

oltage .ain in

db G2Alog%v

%?


70/78


+. E\0ECED R)0J'

,. RESTL'

878) 8BCE'

!- Ahat is the significance of theemitterb5pass capacitor and the

coupling capacitor in the CE amplifier circuit

2- E


71/78


S.No. Name Range/Specification Qty

1 n-channel JFET BFW10 12 Reito! "#$ %$ '.(#$ 2.2# 1 each

) *apacito! 0.01 +F )' Reg,late oe!

S,pply0-)0 1

% *athoe Raycillocope

,al T!ace 30-20 4567 1

& 8F Signal9ene!ato!

0-1000 :56 1

( *onnectingi!e/p!o;e

4, (7EO#!

he weaN signal is applied between the gate and the source of the =E. he output isobtained between the drain and the source terminals. =or proper operation: the gate mustbe negati/e with respect to the source: ie.: the input circuit should alwa5s be re/ersebiased. his is achie/ed b5 the biasing arrangement.

) small change in the re/erse bias on the gate produces a large change in drain current. hisfact maNes =E capable of raising the strength of a weaN signal. During the positi/e half ofthe signal: the re/erse bias on the gate decreases. his increases the channel width andhence the drain current. During the negati/e halfc5cle of the signal: the re/erse /oltage onthe gate increases. ConseIuentl5: the drain current decreases. he result is the smallchange in /oltage at the gate produces a large change in drain current. hese large/ariations in drain current produce large output across the load RL. herefore: a =E actsas an amplifier.

ain' he ratio of the output electrical Iuantit5 to the input of the amplifier is called its gain. 7fthe output and the input Iuantities are /oltages: the gain is called the 8oltage ain of theamplifier.=reIuenc5 Response' he /oltage gain of an amplifier /aries with signal freIuenc5. hishappens because the reactance of the capacitors in the circuit changes with signal freIuenc5. )plot between the /oltage gain and the signal freIuenc5 of an amplifier is called the freIuenc5response of the amplifier.(andwidth' he range of freIuenc5 o/er which the gain is eIual to or greater than about+6.+ 1!3Y2 times- of the ma


72/78


6, +#OCED=#E!

!- Connect the circuit as per the circuit diagram. Keep the signal generator in the sinusoidalmode.

2- choose a /alue for the amplitude of the input signal: sa5: $6 m8 0eaNto0eaN."- )ppl5 a signal of freIuenc5 26 JH to the circuit. Bbser/e the output wa/eform on the

CRB. ote the amplitude of the output sinusoid.

#- 7ncrement the freIuenc5 of the applied signal in small con/enient steps. Each time:adjust the input amplitude to the chosen /alue 1$6m8-. ote the output amplitude.Repeat this step till a freIuenc5 of !;JH.

$- abulate all readings. )t each input freIuenc5: calculate the gain as )/ > 8o 3 8 i. )lsofind the /alue of the gain in decibel as 26 log )/.

%- 0lot a graph between the input freIuenc5 1f- and the gain1in decibel- on a semilog graphpaper.

+- Bn the graph: identif5 the "d( points. he freIuenc5 range between the "d( points isnothing but the bandwidth of the gi/en amplifier.

9, )(TL)R CBLT;'

7nput 8oltage 18in> $6m8-

? N

$% N

#.+ N

+2


73/78


S.o. =reIuenc5 Butput 8oltage18out-

8oltage ain18out38in-

8oltage ain1d(-

E*+EC(ED .#%+7!

;, #E$=L(!

+"


74/78



75/78


76/78


(andwidth' he range of freIuenc5 o/er which the gain is eIual to or greater than about+6.+ 1!3Y2 times- of the ma


77/78


!6- Calculation of Butput impedance' )ppl5 ! KJH: $6m8 signal at the input node. Connect aDR( with all switches at min position. )cross the output terminals and increase theresistance such that 8o > 8i32.

he /alue of resistance in the DR( is eIual to the output resistance of the )mplifier.

%. )(TL)R CBLT;'

7nput 8oltage 18in> $6m8-S.o. 7nput =reIuenc5 Butput 8oltage

18out-8oltage ain)/> 8out38in-

8oltage ain indb >26log1)/-

++


78/78


+. E\0ECED R)0J'

,. RESTL'

878) 8BCE'

!- Ahat is the significance of thecoupling capacitor in the CCamplifier circuit

2- E

electronic engineering lab manual

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