electromagnetic noise reduction techniques part 1
TRANSCRIPT
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Purpose:
This course discusses techniques that can be applied to reduceproblems in embedded control systems caused by electromagneticnoise
Objectives:
Gain a basic knowledge about noise that affects embeddedsystems
Learn approaches and design methods for minimizing the noise
generated by microcontroller based embedded systems Get details about techniques chip designers use to decrease the
amount of noise a microcontroller produces
Obtain basic insights for handling noise problems during the systemdesign and development cycle
Content:19 pages3 questions
Learning Time:30 minutes
Course Introduction
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Noise = Unwanted electrical signals that produce undesirableeffects in the circuits of control systems in which they occur.
Two types of noise:
Noise Can Cause Big Problems
Electromagnetic Compatibility (EMC) issues encompass bothtypes
Noise reduction approaches:
- Techniques for reducing EMI (Electromagnetic Interference)
Cutting the noise emitted by a specific system, circuit or devicethat causes other devices/circuits to operate incorrectly
- Techniques for decreasing EMS (Electromagnetic Susceptibility) minimizing the effect that external noise has on the operation ofa system, circuit or device
Noise reduction: a goal common to both microcontroller (MCU)designers and the system engineers who apply those devices
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Many significant Ls and Cs arehidden impedances in the circuit
Noise is the undesirable result of
unintentional interaction due tostray capacitances andinductances
Parallel signal paths allow morecoupling and interaction, more
noise- Capacitance is proportional to the areaofelectrodes and inversely proportional to
the
distance between the electrodes- Inductance exists even in straight wires,
and mutual inductance between adjacentsignal lines causes electromagneticcoupling
Signal
A
SignalB
Hidden C and L
Effect of Hidden Impedances
Parts mountingsurface
Soldering surfaceHidden C and L
Cross-section ofPCB
Wiring on PCB
Printed Circuit Board
MCU Other
Device
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Signal interconnections on a circuit board haveresistance
Example: Impedance of a copper-foil trace 35m thick and0.5mm wide is about 0.01/cm at DC
Microcontrollers can have fast clock speeds and
signalsthat contain very high frequency components
- The frequencies in the spectrum of a digital signalincrease
rapidly as rise and fall times became shorter
Example: As the rise time decreases from10nsec/5V to 2 to 5nsec/5V, a signal willcontain frequency components >100MHz
Interconnection resistance increases assignal frequency components rise
Example: Impedance at 100MHz for the tracedescribed above is
Design PCBs to handle high frequencies
- Shorten the wiring traces that connect
bypass capacitors to Vcc and groundand make the traces wider, etc.
Impedance of Interconnects
Z 6/cm [~600 times larger than at DC!]~~
Vcc x 0.8
Vcc x 0.2GND
Vcc
10nsec
Vcc x 0.8
Vcc x 0.2
GND
Vcc2 to 5nsec
Spectrum hasfrequencycomponentsat 100MHz
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Ideal capacitor:
Example: Impedance of 10pF capacitor at 100MHz is
Frequency characteristics of
actual capacitors vary by type
and capacitance value
- Choices for bypass capacitors:
Z =C1
2 x 100 x 106 x 10 x 10-12Z =
1170~~
10pF 170
Impedance(I
I)
4.7FTantalum
Electrolytic
100FAluminumElectrolytic
0.05FCeramic
0.1FMylar
0.05FFeed-through
Ideal0.05F
Capacitor
Bypass capacitor working area
1k0.01
Frequency (Hz)
5mmWire
0.1
1
10
100
1000
10k 100k 1M 10M 100M 1G
Application Typical Design
Choice
Small capacity Ceramic capacitor(0.01 - 0.1F); install Small capacitance, but
between Vcc/GND of IC good frequencyresponse
High capacity Tantalum capacitor(0.1 - 10F); install Smaller capacitancethanbetween Vcc/GND aluminum electrolytic,butof PCB better frequency
response
Extra high capacity Aluminumelectrolytic(1 - 100F); install Poor frequency
Impedance of Capacitors
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Is the following statement true or false? Click Done when you are finished.
A ceramic capacitor is a good choice for a small-capacity bypass
capacitor because it has good frequency response.
True
False
Done
Question
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Typical Causes of Noise
Signal A
Signal B
Signalinterference
Signal A Signal A Signal A
Waveform distortion during signal
transmission
Vcc
GND
Sudden change of powercurrent
GND
Narrow ground
line
Electromagneticinduction(from power line, powerdevices)Signal A
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Review values of componentsin the clock oscillator circuit
Optimize C1, C2 and R2 toprevent unwanted emission and
allow circuit to oscillate atoptimum amplitude
Techniques for Reducing EMI - 1
Internal Memory
Adjust C1,C2, and R2
Vcc
GND
Vcc
GND
C1
R1R2
C2
Xtal
Change device package typefrom a DIP to a QFP
Adopt a package with shorterlead lengths to decreaseunwanted emissions fromantenna effect
Use a single-chip solutioninstead of a MCU and externalmemory
Choose an MCU with on-chipmemory to prevent unwantedemissions caused by driving anexternal bus line
MCU
Memory
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Typical: Bus-mode
Activates bus line whenaccessing peripheral IC andMCU (with on-chip memory + I/O).
Better: Port-mode
Activates bus line onlywhen MCU isaccessing peripheralIC.
Peripheral IC
Use port mode, not bus mode
Depending on the type of MCU,the signal on a general-purposeport may change voltage much
less frequently than the signal onthe bus. If this isthe case, use the port to reducethe amount of noise generated
Peripheral IC
Techniques for Reducing EMI - 2
Use serial damping resistorsInsert a damping resistor (100 to150 Ohms) in signal lines toreduce emissions caused bysignal reflection. A resistance ofabout 5k is OK if some signaldegradation is acceptable
Peripheral IC
MCU
MCU MCU
Vcc=5V
Vcc=3.3V
Reduce power supplyvoltage
If possible, reduce Vcc from5V to 3.3V to reduce the noiselevel
Damping
Resistors
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Techniques for Reducing EMI - 3
Revise system timing, if possible
Try to stagger significant signal-driving events, even just slightly, todiffuse the noise generated byswitching
Insert L-C filters on each power andground line
The filters help prevent switching noisefrom entering the Vcc and GND lines,from which they might otherwise beradiated
Ferrite beads
Vcc
GND
MCU
Use a multi-layer circuit board andapply best-practice layout methods
Develop effective sheet patterns forthe Vcc and GND planes; makeinterconnect wiring as short aspossible; interleave noisy signal lineswith GND and Vcc layers to shield the
line; etc.
Through hole
Vcc
GND
EventA
EventB
EventC Time
Event A
Event B
Event C
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Good designPoor designGeneratedelectro-magneticfield
Techniques for Reducing EMI - 4
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+
+
+
+
+
+
+
Vcc
GND
Use a half-area pattern onthe circuit board whenwhole-area pattern cannotbe used
To the greatest extentpossible, make symmetricalpatterns for Vcc and GND onthe facing layers of a double-sided PCB
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+
+
+
+
+
+
+
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VccGND
Select a microcontroller thatproduces low levels of EMI
Consider the MCUs in the M16Cseries, devices that were designedfrom the outset to minimize noiseproblems in embedded systems
Man
yothe
r
type
sof
MC
Us
Noisy!
M16C
seriesMCUs
Quiet!
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Which statements about reducing EMI in embedded systems arecorrect? Select all that apply and then click Done.
Choose a microcontroller with on-chip memory to preventunwanted emissions caused by driving an external bus line.
To reduce emissions caused by signal reflections, insert a serialmatching resistor of 100 to 150 Ohms in signal lines.
Use bus mode, not port mode, to reduce the number of voltagechanges and, therefore, to reduce the unwanted noise.
If you have a two-sided circuit board, always try to make
symmetrical patterns for Vcc and GND on the facing layers.
Done
Question
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Change the drivingcapability of the clockoscillation circuit
Use high-drive mode to get
oscillator started reliably; low-drive mode to sustainoscillation
Synchronizedswitching
Time-sharedswitching
Outputterm
inal
Designing Low-EMI MCUs - 1
Use an optimum output bufferconversion speed (through rate)
Dont set the speed any higherthan necessary
Startoscillation(Highdrive)
Steady-stateoscillation(Low drive)
Vcc
GND
t1 t2t1
Change the timing of the
output buffersEliminate the simultaneousswitching of all channels,if possible
L
HA
B
B
A
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Use an innovative layout,enhanced with added internalcapacitance
Add capacitance to reduce the total
impedance of the power supplydistribution system thats internal tothe microcontroller
Designing Low-EMI MCUs - 3
GNDN+ P+ N+P+ N+ P+
P-
PN
IN OUTVcc
Vcc
GND
IN OUT
Vcc
GND
IN OUT
Vcc
GND
IN OUT
Noisepropagatio
nto outside
IC chip
Vcc
GND
Noiseabsorption ascommon mode
Parasitic capacitorWiring inductance
Pin layoutsimplifiesputting bypasscapacitor atbest position
Vcc
GND
Arrange terminals for easymounting of bypass capacitorsacross Vcc and GND terminals
Also, use parallel arrangement ofsignal lines inside package andon the chip to achieve extrafiltering
Optimize the driving capability ofthe internal buffer transistors
Design very small transistors withlarge drive capability; adjust buswiring, too
IN OUT
Vcc
GND
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MCUs in the M16C familyhave an innovative pinlayout
Arrangement of pins eases
the design of Vcc and GNDwiring on the circuit board andaids the placement of bypasscapacitors
Pattern for Vcc, GND, Oscillator
AVSS
VREF
AVCC
BYTE
CNVSS
XCIN
XCOUT
/RESET
XOUT
VSS
XIN
VCC
/NMI
VCC
VSS
Reset
IC
GND VCC
Oscillation capacitors(symetrically placed)
Bypasscapacitor(~0.01F)
Tantalum capacitor
Capacitor for RESET(1000pF)
Oscillation capacitors(symetrically placed)
Sheet pattern of GND
Sheet pattern of VCC
Bypass capacitor
(~0.01F)
M16CMicrocontroller
Bypass capacitor(~0.01F)
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Its very important toimplement noise measures
at initial stage of designwork
If a problem is discovered in thelater stages of the system
development process, the noisemeasures
required to solve the problemwill end up being far more costly
than expected
Basic Design Insights on Noise
Investigations of noiseproblems take time and
are costly
Because its difficult to simulatea noise-oriented malfunction, alot of work will be necessary to
identifythe root cause of the problem
Noise problemssometimes require a
fundamental solution,such as a re-design
Unless noise measures are taken atthe initial design stage, a
malfunction that occurs later mightbe extremely difficult to eliminate
using superficial correctionmethods; a re-design
may be necessary to correct
the problem
Attempts to eliminateall possible EMI/EMS
problems typically lead tounnecessarily high costs
The optimum design approachis to take pinpoint measures inkey areas that require solutions
Noise
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Match each item to the most appropriate MCU design advice by
dragging the letters on the left to the correct locations on the right. Click
Done when you are finished.
Through rate
Pass-through currentB A
Done ResetShow
Solution
A Adjust locations to make it easyto install a bypass capacitorD
C Signal from buffer
Set no higher than necessary
CReduce amplitude and slow downthe rise time
D Vcc and GND terminals B
Eliminate by changing the timing of
the N- and P-channel transistors
Questions
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Noise problems
EMI and EMS
System-level EMI reduction measures
Techniques for reducing EMI from microcontrollers
Design insights
Course Summary