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Electrical, Electronic and Digital Principles (EEDP) Lecture 1 Introduction د. حلوانى ممدوح ال باسم

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Electrical, Electronic and Digital Principles (EEDP)

Lecture 1

Introduction

باسم ممدوح الحلوانى . د

EEDP - Basem ElHalawany 2

Course Info Course Info

Title Title Electrical, Electronic and Digital Principles (EEDP)

Code Code T/601/1395

Lecturer: Lecturer: Dr. Basem ElHalawany

References References Multiple references will be used

Software Packages Software Packages Proteus Design Suite

http://www.bu.edu.eg/staff/basem.mamdoh

http://www.bu.edu.eg/staff/basem.mamdoh-courses/12138 Course Webpage Course Webpage

Lecturer Webpage: Lecturer Webpage:

Lecturer Email: Lecturer Email: [email protected] / [email protected]

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Course Aims Course Aims

This unit aims to develop learners’ understanding of :

• The electrical,

• Electronic and

• Digital principles

needed for further study of electro-mechanical systems.

EEDP - Basem ElHalawany

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Course Contents Course Contents

1. Apply complex notation in the analysis of single phase circuits 1. Apply complex notation in the analysis of single phase circuits

EEDP - Basem ElHalawany

Series and parallel LCR circuits: Circuit performance

• Voltage, current and power with sine wave signals;

• Conditions for resonance

• Tolerancing (effect of changes in component values)

2. Apply circuit theory to the solution of circuit problems 2. Apply circuit theory to the solution of circuit problems

Circuit theorems: Circuit analysis:

• Norton - Kirchhoff - Thevenin's • Superposition - maximum power

• Mesh - nodal • Impedance matching

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Course Contents Course Contents

EEDP - Basem ElHalawany

Design, test and evaluate a single-stage amplifier to a given specification

• compare measured (Implemented or simulated ) and theoretical results

4. Be able to design and test digital electronic circuits 4. Be able to design and test digital electronic circuits

Digital electronic devices

Combinational circuits

Design and test: circuit designed should be bread-boarded or simulated using an appropriate computer software package

3. Understand the operation of electronic amplifier circuits 3. Understand the operation of electronic amplifier circuits

Single- and two-stage transistor amplifiers:

• Class of operation (A, B, AB and C) - analysis of bias - DC conditions • AC conditions – coupling- input impedance - output impedance

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Prepare yourself for Assignment soon

EEDP - Basem ElHalawany

Learning outcomes 1 (LO1) Learning outcomes 2 (LO2)

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Part 3 Part 3

A transistor must be properly biased in order to operate as an amplifier.

DC biasing is used to establish fixed dc values for the transistor currents and voltages - called the dc operating point or quiescent point (Q-point).

A transistor must be properly biased in order to operate as an amplifier.

DC biasing is used to establish fixed dc values for the transistor currents and voltages - called the dc operating point or quiescent point (Q-point).

In this lecture, several types of bias circuits are discussed. This part lays the groundwork for the study of amplifiers, and

other circuits that require proper biasing.

In this lecture, several types of bias circuits are discussed. This part lays the groundwork for the study of amplifiers, and

other circuits that require proper biasing.

3. Understand the operation of electronic amplifier circuits 3. Understand the operation of electronic amplifier circuits

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ELECTRONIC DEVICES 9th Edition

Thomas L. Floyd

ELECTRONIC DEVICES 9th Edition

Thomas L. Floyd

EEDP - Basem ElHalawany

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A transistor must be properly biased with a dc voltage in order to operate as a linear amplifier.

A dc operating point must be set so that signal variations at the input terminal are amplified and accurately reproduced at the output terminal.

A transistor must be properly biased with a dc voltage in order to operate as a linear amplifier.

A dc operating point must be set so that signal variations at the input terminal are amplified and accurately reproduced at the output terminal.

EEDP - Basem ElHalawany

10 EEDP - Basem ElHalawany

If an amplifier is not biased with correct dc voltages , it can go into saturation or cutoff when an input signal is applied.

If an amplifier is not biased with correct dc voltages , it can go into saturation or cutoff when an input signal is applied.

limiting of the positive portion of the output voltage as a result of a Q-point (dc operating point) being too close to cutoff.

limiting of the negative portion of the output voltage as a result of a dc operating point being too close to saturation.

limiting of the positive portion of the output voltage as a result of a Q-point (dc operating point) being too close to cutoff.

limiting of the negative portion of the output voltage as a result of a dc operating point being too close to saturation.

Improper biasing can cause distortion in the output signal by: Improper biasing can cause distortion in the output signal by:

11 EEDP - Basem ElHalawany

Explain graphically the effects of dc bias Explain graphically the effects of dc bias

Graphical Analysis & DC Load Line Graphical Analysis & DC Load Line

The transistor in Fig. is biased with VCC and VBB to obtain certain values of IB, IC, IE, and VCE.

VBB is adjusted to obtain different values of IB

The transistor in Fig. is biased with VCC and VBB to obtain certain values of IB, IC, IE, and VCE.

VBB is adjusted to obtain different values of IB

Changing VBB will cause changes in all voltages and current (See Next Slide)

Changing VBB will cause changes in all voltages and current (See Next Slide)

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Graphical Analysis & DC Load Line Graphical Analysis & DC Load Line

This is a straight line drawn on the characteristic curves from the saturation value of IC on the y-axis to the cutoff value of VCE on the x-axis,

This is a straight line drawn on the characteristic curves from the saturation value of IC on the y-axis to the cutoff value of VCE on the x-axis,

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Graphical Analysis & DC Load Line Graphical Analysis & DC Load Line

When VCE saturates (VCE(sat) near 0): When VCE saturates (VCE(sat) near 0):

For Ideal Case , let VCE(sat) = 0 For Ideal Case , let VCE(sat) = 0

DC Load Line Equation DC Load Line Equation

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Linear Operation Linear Operation

The region along the load line including all points between saturation and cutoff is generally known as the linear region of the transistor’s operation.

As long as the transistor is operated in this region, the output voltage is ideally a linear reproduction of the input.

The region along the load line including all points between saturation and cutoff is generally known as the linear region of the transistor’s operation.

As long as the transistor is operated in this region, the output voltage is ideally a linear reproduction of the input.

Ac quantities Ib & Vce Ac quantities Ib & Vce

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Waveform Distortion Waveform Distortion

Under certain input signal conditions the location of the Q-point on the load line can cause one peak of the Vce waveform to be limited or clipped

Under certain input signal conditions the location of the Q-point on the load line can cause one peak of the Vce waveform to be limited or clipped

In each case the input signal is too large for the Q-point location and is driving the transistor into cutoff or saturation during a portion of the input cycle. In each case the input signal is too large for the Q-point location and is driving the transistor into cutoff or saturation during a portion of the input cycle.

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Waveform Distortion Waveform Distortion

17 Example 5-1 Example 5-1

Solution Solution

Before saturation is reached, IC can increase an amount ideally equal to: Before saturation is reached, IC can increase an amount ideally equal to:

18 Example 5-1 Example 5-1

Therefore, the limiting excursion is 21 mA because the Q-point is closer to saturation than to cutoff

The 21 mA is the maximum peak variation of the collector current.

Actually, it would be slightly less in practice because VCE(sat) is not quite zero

EEDP - Basem ElHalawany 19

This is the most widely used biasing method. It uses a single-source resistive voltage divider.

To simplify the schematic, the battery symbol is omitted and replaced by a line termination circle with a voltage indicator (VCC) as shown.

Generally, voltage-divider bias circuits are designed so that the base current is much smaller than the current (I2) through R2

In this case, the voltage-divider circuit is very straightforward to analyze because the loading effect of the base current can be ignored.

Generally, voltage-divider bias circuits are designed so that the base current is much smaller than the current (I2) through R2

In this case, the voltage-divider circuit is very straightforward to analyze because the loading effect of the base current can be ignored.

It is called a (( stiff voltage divider )) because the base voltage is relatively independent of different transistors and temperature effects.

In other words: “That the transistor does not appear as a significant load”

It is called a (( stiff voltage divider )) because the base voltage is relatively independent of different transistors and temperature effects.

In other words: “That the transistor does not appear as a significant load”

EEDP - Basem ElHalawany 20

you can find the voltages and currents in the circuit, as you can find the voltages and currents in the circuit, as

Stiff voltage divider circuit analysis Stiff voltage divider circuit analysis

The voltage on the base using the unloaded voltage-divider rule:

Not Completely accurate Not Completely accurate

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To analyze a voltage-divider biased transistor circuit for base current loading effects To analyze a voltage-divider biased transistor circuit for base current loading effects

1. let’s get an equivalent base-emitter circuit for the circuit in Figure 5–13(a)

2. Apply Thevenin’s theorem to the circuit left of point A,

The Thevenin equivalent of the bias circuit, connected to the transistor base

The Thevenin equivalent of the bias circuit, connected to the transistor base

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3. Applying Kirchhoff’s voltage law around the equivalent base-emitter loop gives

3. Applying Kirchhoff’s voltage law around the equivalent base-emitter loop gives

EEDP - Basem ElHalawany 23

1. Negative collector supply voltage, VCC 1. Negative collector supply voltage, VCC

applying Kirchhoff’s voltage law applying Kirchhoff’s voltage law

Check EXAMPLE 5–5 Check EXAMPLE 5–5

EEDP - Basem ElHalawany 24

2. Positive emitter supply voltage, VEE 2. Positive emitter supply voltage, VEE

applying Kirchhoff’s voltage law applying Kirchhoff’s voltage law

Check EXAMPLE 5–4 Check EXAMPLE 5–4

EEDP - Basem ElHalawany 25

four additional methods for dc biasing a transistor circuit are discussed. These methods are not as common as voltage-divider bias

1. Emitter Bias 2. Base Bias 3. Emitter-Feedback Bias 4. Collector-Feedback Bias

1. Emitter Bias 2. Base Bias 3. Emitter-Feedback Bias 4. Collector-Feedback Bias

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1. Emitter Bias 1. Emitter Bias

Exact Analysis: Exact Analysis:

Apply Kirchhoff’s voltage law around the base-emitter circuit

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1. Emitter Bias 1. Emitter Bias

Approximate Analysis: Approximate Analysis:

The small base current causes the base voltage to be slightly below ground.

The combination of this small drop across RB and VBE forces the emitter to be at approximately = -1 V

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1. Emitter Bias 1. Emitter Bias

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