effect of thickness variation on electrical characteristics of single & dual gate organic thin film...

ISSN: 2395-0560 International Research Journal of Innovative Engineering

www.irjie.com Volume1, Issue 3 of March 2015

_______________________________________________________________________________________________ 2015, IRJIE-All Rights Reserved Page -110

Effect of Thickness Variation on Electrical Characteristics of Single & Dual Gate Organic Thin Film Transistors

Anket Kumar Verma,Kavery Verma Jaypee Institute of Information Technology,Noida,India

Abstract:-In last decades Organic thin film transistors (OTFT) have shown improvement on existing technology and expanded the scope of potentially realizable applications on low-cost, large-area and flexible devices. In single gate organic thin film transistors a thin film of organic semiconducting layer is deposited over the dielectric layer while in Dual gate organic thin film transistors (DGOTFT) the active semiconducting layer is sandwiched between two gate electrodes from which it is electrically isolated by two gate insulators. Therefore, this makes it possible to form two accumulation channels instead of one as in single gate OTFT. This paper presents comparative analytical analysis of thickness variation of different structures layer of a single and dual gate OTFT using 2-D ATLAS simulator. The simulation leads to variation in characteristics and performance parameters such as threshold voltage etc. of both single and dual gate OTFTs. The dual gate OTFT shows improved performance such as higher on current and a steeper subthreshold slope as compared to single gate OTFTs of organic TFTs.

Keywords: ATLAS simulator, dual gate OTFTs, organic thin film transistors, single gate OTFTs, thickness variations.

I. INTRODUCTION:-

THIN-FILM TRANSISTORS (TFTs) using organic semiconductors as the active material have made an impressive progress in terms of light weight, flexibility, and low cost as compared to other semiconductors. Due to above reasons the imposition of organic thin film transistors (OTFT) are increasingly likely. OTFT will find application, not only in displays, but also to integrate logic circuitry and memory arrays into low cost electronic products such as smart cards, smart price and inventory tags, and large-area sensor arrays.[1,2] This paper deals with comparative analysis of thickness variation of different layers of a single and dual gate OTFTs structures using 2-D ATLAS simulator. A simulation is done on variations in thickness of dielectrics; electrodes etc on both single and dual gate OTFTs. The organisation of paper is as follows. The present section introduces the content of paper. Section II describes about single and dual gate OTFTs structures. Section III deals with the simulation of thickness variations in dielectric layers and electrodes of both type of OTFTs and finally result and discussion is drawn in section IV and conclusion is drawn in section V.

(a) (b)

Figure-1.Schematic cross-section of OTFT structures (a)Single Gate Bottom Gate and Top Contact (SGBGTC) (b) Dual Gate organic thin film transistors ( DGOTFT)

II.SINGLE & DUAL GATE OTFT DEVICE DESIGN

An organic field-effect transistor (OTFT) is a field-effect transistor using an organic semiconductor in its channel. Like MOSFETS, OTFT have symmetrical structures that are source and drains are interchangeable. Single gate organic thin film transistors (SGOTFT) have been fabricated with various device geometries depending on position of electrodes and gate with respect to semiconductor and dielectric layer. The most commonly used device in single gate geometry is bottom gate with top drain and source electrodes using thermally grown SiO2 as gate dielectric. This structure is commonly known as bottom gate top contact(BGTC).




While in Dual gate organic thin film transistors (DGOTFT) the active semiconducting layer is sandwiched between two gate electrodes from which it is electrically isolated by two gate insulators. The fundamental principles of the operation of the dual gate organic thin film transistors (DGOTFT) do not differ from that of a common OTFT. In a single gate OTFT the charges are induced by the gate potential at the semiconductor/insulator interface forming a conducting channel. The formation of the channel creates a conducting path between the source and drain electrodes. It also screens the gate potential similar to the operation of a plate capacitor. The dual-gate OTFTs were characterized in double gate mode by sweeping the bottom gate bias voltages from positive to negative while fixing the top gate potentials, and vice versa. The change in the threshold voltage of the bottom gate depends on the top gate bias. There are two working regions of DGOTFTs. When one of the gate is made positive, the respective channel is in depletion and no gate screening will occur, while the other gate will be in accumulation regime, the field of the positive gate will penetrate to such a large extend that the channel in accumulation will be affected by both gates. When both channels are in accumulation, the charges present in the channels will screen the respective gate potentials, hence both channels will operate individually and no mutual influences are observed. For a dual-gate OTFT with its top channel in accumulation, a drop in the transconductance was demonstrated when the bottom gate potential becomes negative. The transition regime between both linear regimes is marked by a drop in the transconductance, where the bottom channel depends on the bottom gate only and the top channel will depend on both gates. The transition regime results from the fact that the charges accumulated in the bottom channel will start to screen the influence of the bottom gate potential on the top channel. The change in overall drain current will depend only on the change of the current of the bottom channel.[3,4]. III. DEVICE SIMULATION A 2-D ATLAS simulator of Silvaco Company is used as a semiconductor simulator. The simulation was carried out on two structures: 1) Single gate BGTC and 2) Dual gate OTFT. We have used an active layer of pentacene with 50-nm thickness in SGBGTC & 100-nm thickness in DGOTFT respectively. Basically, the simulation is based on zero-thickness electrodes to 40nm made up of gold. The gate insulator was assumed to be SiO2 a dielectric constant of 3.9 with thickness variation from 400 nm. This material prevents gate leakage currents, acts as an effective capacitor.Also it allows for the accurate measurement of the electrical performance of the organic semiconducting layer. ATLAS is generally used for silicon devices. PooleFrenkel mobility model was adapted for various organic devices .It is given by

= 0exp (

)

where Ea is zero field activation energy, whose value is around 550 meV, and is the PooleFrenkel constant, whose value is around 1 1055 104 eV (V/cm)1/2 for pentacene. The value of 0, activation energy (Ea), and are 0.62 cm2 V1 s1, 0.018eV, and 7.7 105 eV (V/cm)1/2, respectively.The channel length was taken as 20 m and the channel width was assumed to be 200 m.While in case of DGOTFT silicon was taken for both gate material with 50nm thickness on both side.SiO2 of 100nm thickness was again taken as insulating layer.The source and drain electrodes were taken of gold with 52.5nm thickness.The channel width and length were 800 m & 100 m respectively[5,6].

(a)




(b)

Figure-2.Output characteristics a) SGOTFT and b)DGOTFT

(a)

(b)

Figure-3.Transfer characteristics a) SGOTFT and b) DGOTFT

IV.RESULTS & DISCUSSION Output characteristics of SGOTFT and DGOTFT are shown in figure-2 which shows that dual gate structure draws more current compared to single gate structure.

(a)




(b)

Figure-4.Output characteristics of thickness variations in electrodes from 0nm to 40nm with Vgs=-40V a)SGOTFT b)DGOTFT.

(a)

(b)

Figure-5.Output characteristics of thickness variations in dielectric SiO2 from 400nm to 800nm withVgs=-40V a)SGOTFT b) DGOTFT.




Figure-6-Comparison of threshold voltage with electrode thickness variations from 0nm to 40nm with Vgs=-40V

a)SGOTFT b)DGOTFT. Table-I. Extracted Parameters

Figure-3 gives transfer characteristics of SGOTFT & DGOTFT which shows dual gate draws current at zero gate voltage(Vgs = 0V).Figure-4 shows output characteristics of thickness variations in electrodes from 0nm to 40nm at Vgs= -40v.Here we observe that drain current hardly varies with variation of electrode thickness. Figure-5 shows output characteristics of thickness variations in SiO2 from 400 to 800nm with Vgs =-40V.From the graph it is clear that current increases with dielectric thickness in both structures however single gate OTFT shows faster increase in current with thickness compared to dual gate OTFT. Figure-6 shows variation of threshold voltage with electrode thickness. It can be seen that SGOTFT undergoes no change in threshold voltage while DGOTFT results in steeper threshold slope which leads to higher current.Table-1 shows extracted parameters value for both the transistor at 40nm electrode thickness. The comparison shows higher transconductance and Ion/Ioff ratio of dual gate structure which proves to be better devices for switching applications.

V.CONCLUSION In this paper performance of SGOTFT & DGOTFT is analysed by variation of thickness of electrodes and dielectric layer. It can be concluded that dual gate OTFT has shown superior performance as compared to single gate OTFT such as higher on current and a steeper thresh hold slope. DGOTFT results in higher current due to formation of two conducting channels. Therefore, it can be concluded that dual gate is more suitable for applications in large area of electronics.

REFERENCES

[1] Hagen Klauk,David J. Gundlach, and Thomas N. Jackson, Fast Organic Thin-Film Transistor Circuits, IEEE Electron Device Lett., vol. 20, pp. 289-291, June 1999.

[2] Shradha Saxena, Brijesh Kumar, B. K. Kaushik, Y. S. Negi,G.D.Verma.,Organic Thin Film Transistors: Analytical Modeling and Structures Analysis Recent Advances in Information Technology (RAIT),pp. 701- 706, Mar. 2012.

[3] G.H.Gelinck, E.van Veenendaal and R. Coehoorn, Dual-gate organic thin-film transistors Appl. Phys. Lett., vol.87, 2005. [4] F. Maddalena, M. Spijkman, J.J Hummelen, D.M de Leeuw, P.W.M Blom, B.de Boer,Device characteristics of polymer

dual-gate field-effect transistorvol.9,2008. [5] Vidhi Goswami, Brijesh Kumar, B.K Kaushik, K.L Yadav, Y.S Negi and M.K Majumdar, Effect of dielectric thickness on

performance of dual gate organic field effect transistor Communications, Devices and Intelligent Systems (CODIS),pp. 141- 144,Dec. 2012.

[6] Chang-Hoon Shim, Fumito Maruoka, and Reiji Hattori, Structural Analysis on Organic Thin-Film Transistor With Device Simulation vol. 57,pp. 195-200,Jan.2010.

Parameters SGOTFT DGOTFT

Vth1 (V) -8.06186 -15.97832

Vth2 (V) NA -2.27348

Ion/Ioff 6.68458e+06 2.23179e+13

gm (A/V) 7.0598e-07 2.23761e-07

effect of thickness variation on electrical characteristics of single & dual gate organic thin film...

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