eeweb pulse - issue 46, 2012

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PULSE

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May 15, 20

Jean-Loui

MalingeKotura

Electrical Engineering Commun

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3/21EEWeb |Electrical Engineering Community Visit www.eeweb.com 3

TABLE OF CONTENTS

Jean-Louis Malinge 4KOTURA

What is Silicon Photonics? 8BY JEAN-LOUIS MALINGE

Featured Products 10

From PSPICE Netlist to AllegroDesign Sub-CircuitBY DON LAFONTAINE WITH INTERSIL

Thermal Basics of Complex Devices 17BY ROGER STOUT WITH ON SEMICONDUCTOR

RTZ - Return to Zero Comic 20

The new optical communication technology that is revolutionizing the telecommunicationsindustry.

Interview with Jean-Louis Malinge - CEO and President

Practical concerns and considerations for device level thermal management.

This step-by-step procedure enables the user to take any PSPICE netlist and convert it into asub-circuit for insertion into their Cadence Allegro simulator.

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INTERVIEW

Koturaas it is today, and gallium arsenidewas a good material system forfast electronics. The other area

was optical fiber. I ended up

randomly starting in optical fiber

and photonics for communications

and joined a company named

Thompson CSF, a very large groupin France. I started to work initially in

the design and development of the

first fiber optic communication line

in France, which was in downtown

Paris at the end of the 70s. I then

migrated progressively to work on

the design and realization of the first

broadband network of what was

one of the first Fiber to the Home

(FTTH) demonstrations. At the

end of the 1980s, I joined CorningInc., which is a large fiber optics

company headquartered in upstate

New York. I started working for

Corning in France, migrated to the

US in the early 1990s. After that, I

went through an executive MBA

at Sloan School at MIT and joined

the US side of Corning, working

Jean-Louis

Jean-Louis Malinge - CEO and President

Malingeinitially searching for work, I was

looking at industries or technologies

that were at the very beginning of

their life, and showed promise for

success, which brought me to two

areas. One was gallium arsenide

devices because this was before

the time that silicon was as available

How did you get intoelectronics/engineering andwhen did you start?

As you probably already noticed

from my name, I am of French

origin. I am a physicist by training

and received my education in

France in the 70s. When I was
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Jean-Louis Malinge -CEO and President at Kotura

What Is Silicon

Photonics?

Ever since the invention of thetransistor more than 60 years ago,

semiconductor chips have used

electrons for communications.

Each new generation of devices

offered more transistors in a smaller

area, operating at faster speeds.

Today, the semiconductor industry

exceeds $250B per year with a

single CMOS chip containing as

many as a billion or more transistors.

These complex circuits are still 100percent electrical.

Meanwhile, during the 1980s,

optical communications based

on lasers and optical fiber was

introduced for long distance

telecommunication. Instead of low-

cost silicon, optical communication

required exotic material systems forlasers, detectors, filters, isolators,

modulators, and switches. Optical

transceivers were hand assembled

from hundreds of piece parts and,

in many cases, still are today. Even

though it was expensive, optical

communication had the advantage

of being able to transmit huge

amounts of data over long distances.

The Internet was built using the

back bone of telecommunicationsoptical networks.

Silicon photonics brings

optical communication into the

semiconductor industry, enabling

a whole new range of applications.

Opto-electronic functions are

fabricated on the same CMOS

wafers using the same equipmentand methods as electronic chips.

The wafers are processed in

the same fabs as those running

electronics chips. The wafers are

diced into chips just like electrical

ones. Optical chips can be just

as inexpensive as their electrical

cousins. When mass volumes are

needed, the wafer fab simply runs

more wafers of the same recipe.

Silicon photonics eliminates

the need for hand assembly of

hundreds of parts. Silicon photonics

chips are much, much smaller than

the optical subassemblies they

replace. A silicon photonics chip

can support 100 gigabits per second

transmission on a chip less than half
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FEATURED PROD UCTS

Low Power 5MBd Digital Optocouplers

Avago Technologies, a leading supplier of analog interface

components for communications, industrial and consumer applications,

announcedthe ACPL-M21L/021L/024L/W21L/K24Loptocouplerfamily.

These optocouplers consume less power as compared to other similar5MBd optocouplers in the market. The ACPL-x2xLoptocouplers are

designed to meet customer needs for lower power, higher isolation

voltage, and better common-mode rejection (CMR) performance, thanks

to the excellent performance of the new LED and detector IC design.

Avago Technologies digital optocouplers are used in a wide variety of

isolation applications ranging from power supply and motor control circuits to data communications and digital

logic interface circuits. All newoptocouplers are compliant to industrial safety standards such asIEC/EN/DIN EN

60747-5-5 approval for reinforced insulation, UL 1577 and CSA. The first available optocoupler, the ACPL-M21L is

immediately available in sample quantities, and will sell for $0.88 apiece in lots of 10k units. For more information,

please click here.

Broadband RF MixerLinear Technology announces the LTC5567, a 300MHz to 4GHz

downconverting mixer with outstanding IIP3 (Input Third Order

Intercept) of 26.9dBm, low power consumption of 294mW, and wide IF

bandwidth of 2.5GHz to support 4G wireless base stations and a wide

range of high dynamic range receiver applications. The LTC5567s

wide 300MHz to 4GHz operating frequency range provides versatility

in a single device, enabling operation in any of the cellular bands from

700MHz to 2.7GHz. The mixer features a conversion gain of 1.9dB and

a noise figure of 11.8dB, providing excellent dynamic range for a wide variety of receiver applications. Additionally,

the LTC5567s IF output has a wide frequency range of 5MHz to 2500MHz, supporting wideband applications such

as cable TV downlink transmitters and digital predistortion (DPD) receivers. Moreover, the LTC5567s RF input isdesigned to withstand strong in-band blocking signals, while delivering a best-in-class noise figure of 16.5dB with

a +5dBm blocker, ensuring enhanced receiver sensitivity in the presence of interference. For more information,

please click here.

drop in efficacy. Conversely, by using the new LM3447 with constant power regulation, the LED forward voltage

droop over temperature is offset by an increase in LED current to maintain constant LED power. The result is up

to 10-percent improvement in efficacy across the expected operating temperature range of the fixture. For more

information, please click here.

Contsant Power LED Controller

Texas Instruments Incorporated introduced a new LED controller with

constant power regulation. The LM3447 AC/DC LED driver includes a

dimmer detect, phase decoder and adjustable hold current circuits to

provide smooth and flicker-free dimming operation in off-line, isolated

LED lighting applications, including A19, E26/27 and PAR30/38 bulbs,

as well as can light retrofits. raditional drivers use constant current

control to accurately regulate LED forward current. This approach

produces consistent light output or intensity from LEDs in the same

bin. However, once current is applied to the LED, its solder point

temperature rises, leading to a decrease in forward voltage and a
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Don LaFontaineSenior Application Engineer

From

PSPICE

NetlisttoAllegro

DesignSub-Circuit

Here is a common everyday

scenario in the electronics industry:

Designers whove found a good

op-amp for their project want to

run simulations on their design

before they head into the lab to

build up a prototype. They note that

the device manufacturer offers a

PSPICE model netlist in their data

sheet, but remain unsure how to

convert the PSPICE model netlistinto a sub-circuit for the simulator. If

the simulator is a Cadence Allegro

simulator, then there is a step-by-

step process to convert the data

sheet netlist into a sub-circuit for

simulations.

Intersil provides a PSPICE model

for all their low-speed and low

power precision amps at the end

of data sheets. The PSPICE model

netlist and netlist schematics are

included in the data sheet, along

with simulation vs. characterization

curves to highlight the accuracy of

the PSPICE models. (To find out

more details about the making of

these PSPICE models, reference

application note AN1556.)

Copying the PSPICE Netlist

Download the data sheet or the

PSPICE netlist from the web. The

data sheet or netlist will be in .pdf

format. Open the .pdf document

and right-click to enable the select

tool, if it is not already selected. This


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TECHNICAL ARTICLE

(Cadence SPB 16.2\Design Entry

CSI). From the Cadence Product

Choices screen, Select AllegroDesign Entry CIS and click OK.

Click on File in the tool bar and

select New, and then Project.

Type in the name of the project and

click on the radial button to the left

of Analog of Mixed A/D. Browse to

where you saved the Netlist in the

common directory (you must have

all the files located in the same

directory) and click OK.

The user can select to base their

new project on an existing project

or start a new one. Selecting to base

upon an existing project will carry

over the existing project with all the

simulation profiles and schematics.

This can be a real time saver if the

new project is very similar to an old

project. In this example, we will

choose to create a new project.

Click OK. Click on .\(your

file name) .dsn and then the

SCHEMATIC1 to open the PAGE1tab and then click on the PAGE1

tab. This is where the new sub-

circuit will be placed to run the

simulations. Before we can place

the new sub-circuit model and run

a simulation, we need to set-up

the simulation profile and add the

library. Click on PSPICE in the tool

bar and select New Simulation

Profile. Then, type in any name

that will help you keep track ofthe different simulations and click

Create. Click the Configuration

Files tab at the top. Then click on

Library in the Category field on

the left hand side. Browse to where

you saved the Library file (.lib).

Then click the Add to Design

button. The Simulation Settings

screen should look like that shown

in Figure 3 with the file path name

being the location of the common

directory.

Click the Apply button.

Now click the analysis tab (Figure

3) and configure the simulation for

the simulation conditions desired.

In this example, we will setup the

simulation as follows: Analysis Type

= AC Sweep/Noise, Options =

General Settings, Start frequency =

0.1Hz, End Frequency = 100Meg

Hz, Points/Decade = 100.

The analysis selected for this

example is an AC Sweep/Noise.

Other types of analysis are: Time

Domain (Transient), DC Sweep and

Bias Point. Just click the down arrow

in the analysis type section to access

the different Analysis options. When

Figure 2:All Pins Associated to Symbol

Figure 3: Configuration File to Add Library



TECHNICAL ARTICLE

Figure 4: Part Placement Tool

in Figure 4. To add the library,

click on the tab where the arrow is

pointing to in Figure 4. Browse to

where you saved the Netlist in the

common directory, select the .olb

file and click Open. The new .olb

file has been added to the library list

(highlighted in blue Figure 4) Now

you are ready to add the sub-circuit

to your simulation schematic and

start your simulations.

Adding the Sub-circuit to

Your Simulation Schematic

With the .lib file added to the

simulation profile and the .olb

file added to the part placementtool, you are now ready to place

the Op-amp sub-circuit into your

simulation schematic. Figure 4

shows the part placement tool after

the .olb has been added to it. Under

the Libraries section of Figure 4,

find the new .olb symbol you added

in the previous step (highlighted

in blue). Double-click on the file to

add the sub-circuit to the Part list

section (also highlighted in blue).

Double click on the Part in the part

list section and add the sub-circuit

to the simulation schematic. You are

now able to configure the Op-amp

for simulations.

This step-by-step procedure

enables the user to take any

PSPICE netlist and convert it into

a sub-circuit for insertion into their

Cadence Allegro simulator. The

straightforward PSPICE models

offered by Intersil (reference

AN1556) make it easy for the user

to edit the netlist and run worst-case

simulations for some of the Op-amp

parameters.

About the Author

Don LaFontaine is a Sr. Principal

Application Engineer/Sr. Engineer-

ing Manager with Intersils Signal

Path product line in Palm Bay, Flori-

da. His focus is on precision analog

products. He has been with Intersil

Corp. for the last 30 years. He grad-

uated from the University of South

Florida with a BSEE in 1985.

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finished, click OK.

The user will need to add the

Library .olb to the simulator. To do

this, click on Place in the tool bar

and select Part. This will bring

up the part placement tool at the

far right of the simulator as shown
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TECHNICAL ARTICLE

also ensures that engineers give themselves adequate

margins so that devices continued operation is ensured.

Figure 2 shows power dissipation on the vertical axis and

temperature on the horizontal axis. The gently slopedred line is referred to as the device operating line. This

represents a device whose power dissipation increases

with temperature. The blue diagonal line describes 1/

Jx as set out in equation 3. This is referred to as the

system line. It describes how increases in the devices

operating temperature go with increasing amounts of

power that may be successfully dissipated from that

device. The intersection of these two lines gives the

nominal steady-state operating point. Thus, to the right

of the steady-state operating point, more power leaves

the system than the device produces, so it cools; to the

left, less power leaves the system than is introduced, so

it heats up. Either way, the imbalance in power causes

TJ to move back toward the steady-state operating point.

Once this stability is lost, however, the device is at risk of

thermal runaway. This will happen if the slope of the blue

line is less than that of the red line

In summary, the whole business of ensuring device

level thermal management has become increasingly

Figure 2: Power dissipation versus temperature

difficult with the advent of more compact, power-

dense, functionally-complex devices enclosed in plastic

packages. Inside the package, there are multiple heat

paths that need to be taken into account; the idea that thepackages thermal properties can be represented by a

single number is, at best, naive. Simultaneously, outside

the package, specific boundary conditions dictate

how heat flow from the device takes place. Engineers

need to be fully aware of the thermal issues involved if

their system designs are to achieve the reliability and

performance levels they require.

About the Author

Roger Stout received his BSE in Mechanical Engineering

at ASU in 1977, and went on as a Hughes Fellow to earn his

MSME at the California Institute of Technology in 1979.

He then joined Motorola in the equipment engineering

side of the semiconductor business, which after about

four years evolved into factory automation and control

engineering. In about 1990, he took on the responsibility

for thermal characterization of ASIC products. Roger

holds six patents, and has been a registered Professional

Engineer (Mechanical) in the state of Arizona since 1983.

Q SystemLine

With a decrease in temperature

the system dissipates less

power so that the temperature

rises and equilibrium is restored

As temperature rises,

more heat may be dissipated

Device

Operating

Line

TX TJ T
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RETURN TO ZERO
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RETURN TO ZERO
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