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IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 28, NO. 6, JUNE 2013 3047

A High Step-Up Converter With a Voltage MultiplierModule for a Photovoltaic System

Kuo-Ching Tseng, Chi-Chih Huang, and Wei-Yuan Shih

Abstract Anovelhigh step-up converteris proposedfor a front-end photovoltaic system. Through a voltage multiplier module, anasymmetrical interleaved high step-up converter obtains high step-up gain without operating at an extreme duty ratio. The voltagemultiplier module is composed of a conventional boost converterand coupled inductors. An extra conventional boost converter isintegrated into the rst phase to achieve a considerably highervoltage conversion ratio. The two-phase conguration not onlyreduces the current stress through each power switch, but alsoconstrains the input current ripple, which decreases the conduc-tion losses of metaloxidesemiconductor eld-effect transistors(MOSFETs). In addition, the proposed converter functions as anactive clamp circuit, which alleviates large voltage spikes acrossthe power switches. Thus, the low-voltage-rated MOSFETs can beadopted for reductions of conduction losses and cost. Efciencyimproves because the energy stored in leakage inductances is re-cycled to the output terminal. Finally, the prototype circuit witha 40-V input voltage, 380-V output, and 1000- W output power isoperated to verify its performance. The highest efciency is 96.8%.

Index Terms Boostyback converter, high step-up, photo-voltaic system, voltage multiplier module.

I. INTRODUCTION

RENEWABLE sources of energy are increasingly valuedworldwide because of energy shortage and environmental

contamination. Renewable energy systems generate low volt-age output; thus, high step-up dc/dc converters are widely em-ployed in many renewable energy applications, including fuelcells, wind power, and photovoltaic systems [1][8]. Amongrenewable energy systems, photovoltaic systems are expectedto play an important role in future energy production [9][17].Such systems transform light energy into electrical energy, andconvert low voltage into high voltage via a step-up converter,which can convert energy into electricity using a grid-by-gridinverter or store energy into a battery set. Fig. 1 shows a typicalphotovoltaic system that consists of a solar module, a high step-up converter, a charge-discharge controller, a battery set, and

an inverter. The high step-up converter performs importantlyamong the system because the system requires a sufcientlyhigh step-up conversion.

Theoretically, conventional step-up converters, such as theboost converter and yback converter, cannot achieve a high

Manuscript received May 14, 2012; revised July 30, 2012; accepted August24, 2012. Date of current version December 7, 2012. Recommended for publi-cation by Associate Editor R. Redl.

The authors are with the Department of Electronic Engineering, Na-tional Kaohsiung First University of Science and Technology, Kaohsi-ung 811, Taiwan (e-mail: [email protected]; [email protected];[email protected]).

Digital Object Identier 10.1109/TPEL.2012.2217157

Fig. 1. Typical photovoltaic system.

Fig. 2. High step-up techniques based on a classical boost converter. (a) Inte-grated ybackboost converter structure. (b) Interleaved boost converter with avoltage-lift capacitor structure.

step-up conversion with high efciency because of the resis-tances of elements or leakage inductance. Thus, a modiedboostyback converter wasproposed [18][20], and manycon-verters that use the coupled inductor for a considerably high-voltage conversion ratio were also proposed [21][25].

Despite these advances, conventional step-up converters witha single switch are unsuitable for high-power applications givenan input large current ripple, which increases conduction losses.Thus, numerous interleaved structures and some asymmetricalinterleaved structures are extensively used [26][33]. The cur-rent study also presents an asymmetrical interleaved converterfor a high step-up and high-power application.

Modifying a boostyback converter, shown in Fig. 2(a), isoneof thesimpleapproaches to achieving high step-up gain; thisgain is realized via a coupled inductor. The performance of theconverter is similar to an active-clamped yback converter; thus,the leakage energy is recovered to the output terminal [20]. Aninterleaved boost converter with a voltage-lift capacitor shown

in Fig. 2(b) is highlysimilar to theconventional interleaved type.0885-8993/$31.00 2012 IEEE


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3048 IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 28, NO. 6, JUNE 2013

Fig. 3. (a) Proposed high step-up converter with a voltage multiplier module. (b) Equivalent circuit of the proposed converter.

It obtains extra voltage gain through the voltage-lift capacitor,and reduces the input current ripple, which is suitable for powerfactor correction (PFC) and high-power applications [34].

In this paper, an asymmetrical interleaved high step-up con-verter that combines the advantages of the aforementioned con-verters is proposed, which combined the advantages of both.In the voltage multiplier module of the proposed converter, theturns ratio of coupled inductors can be designed to extend volt-age gain, and a voltage-lift capacitor offers an extra voltageconversion ratio.

The advantages of the proposed converter are as follows:

1) the converter is characterized by a low input current rippleand low conduction losses, making it suitable for high-power applications;

2) the converter achieves the high step-up voltage gain thatrenewable energy systems require;

3) leakage energy is recycled and sent to the output terminal,and alleviates large voltage spikes on the main switch;

4) the main switch voltage stress of the converter is substan-tially lower than that of the output voltage;

5) low cost and high efciency are achieved by the lowr D S (on) and low voltage rating of the power switchingdevice.

II. OPERATING PRINCIPLE DESCRIPTION

The proposed high step-up converter with voltage multipliermodule is shown in Fig. 3(a). A conventional boost converterand two coupled inductors are located in the voltage multipliermodule, which is stacked on a boost converter to form an asym-metrical interleaved structure.

Primary windings of the coupled inductors with N p turnsare employed to decrease input current ripple, and secondarywindings of the coupled inductors with N s turns are connectedin series to extend voltage gain. The turns ratios of the coupledinductors are the same. The coupling references of the inductors

are denoted by .

and

in Fig. 3.

The equivalent circuit of the proposed converter is shown inFig. 3(b), where L m 1 and L m 2 are the magnetizing inductors,L k 1 and L k 2 represent the leakage inductors, S 1 and S 2 denotethe power switches, C b is the voltage-lift capacitor, and n isdened as a turns ratio N s / N p .

The proposed converter operates in continuous conductionmode (CCM), and the duty cycles of the power switches duringsteadyoperationare interleavedwith a 180 phase shift; thedutycycles are greater than 0.5. The key steady waveforms in oneswitching period of the proposed converter contain six modes,which are depicted in Fig. 4, and Fig. 5 shows the topological

stages of the circuit. Mode 1 [t 0 , t 1 ] : At t= t0 , the power switches S 1 and S 2 areboth turned ON. All of the diodes are reversed-biased. Mag-netizing inductors L m 1 and Lm 2 as well as leakage inductorsL k 1 and L k 2 are linearly charged by the input voltage sourceV in .

Mode 2 [t 1 , t 2 ] : At t= t1 , the power switch S 2 is switchedOFF, thereby turning ON diodes D 2 and D 4 . The energy thatmagnetizing inductor L m 2 has stored is transferred to the sec-ondary side charging the output lter capacitor C 3 . The inputvoltage source, magnetizing inductor Lm 2 , leakage inductorL k 2 , and voltage-lift capacitor C b release energy to the outputlter capacitor C 1 via diode D 2 , thereby extending the voltageon C 1 .

Mode 3 [t 2 , t 3]: At t= t2 , diode D 2 automatically switchesOFF because the total energy of leakage inductor L k 2 has beencompletely released to the output lter capacitor C 1 . Magnetiz-ing inductor L m 2 transfersenergy to thesecondaryside chargingthe output lter capacitor C 3 via diode D 4 until t3 .

Mode 4 [t 3 , t 4 ]: At t= t3 , the power switch S 2 is switchedON and all the diodes are turned OFF. The operating states of modes 1 and 4 are similar.

Mode 5 [t 4 , t 5 ]: At t= t4 , the power switch S 1 is switchedOFF, which turns ON diodes D 1 and D 3 . The energy stored inmagnetizing inductor L m 1 is transferred to the secondary side

charging the output lter capacitor C 2 . The input voltage source


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TSENG et al. : HIGH STEP-UP CONVERTER WITH A VOLTAGE MULTIPLIER MODULE FOR A PHOTOVOLTAIC SYSTEM 3049

Fig. 4. Steady waveforms of the proposed converter at CCM.

and magnetizing inductor Lm 1 release energy to voltage-liftcapacitor C b via diode D 1 , which stores extra energy in C b .

Mode 6 [t 5 , t 0 ]: At t = t 5 , diode D 1 is automatically turnedOFF because the total energy of leakage inductor L k 1 has beencompletely released to voltage-lift capacitor C b . Magnetizinginductor Lm 1 transfers energy to the secondary side chargingthe output lter capacitor C 2 via diode D 3 until t0 .

III. STEADY-STATE ANALYSIS

The transient characteristics of circuitry are disregardedto simplify the circuit performance analysis of the proposedconverter in CCM, and some formulated assumptions are asfollows:

1) all of the components in the proposed converter are ideal;

2) leakage inductors L k 1 and L k 2 are neglected;

3) voltage V C b , V C 1 , V C 2 , and V C 3 are considered to be con-stant because of innitely large capacitance.

A. Voltage Gain

The rst-phase converter can be regarded as a conventionalboost converter; thus, voltage V C b can be derived from

V C b = 11 DV in . (1)

When switch S 1 is turned ON and switch S 2 is turned OFF,voltage V C 1 can be derived from

V C 1 = 11 D

V in + V C b = 21 D

V in . (2)

The output lter capacitors C 2 and C 3 are charged by energytransformation from the primary side. When S 2 is in turn-onstate and S 1 is in turn-off state, V C 2 is equal to induced voltageof N s 1 plus induced voltage of N s 2 , and when S 1 is in turn-onstate and S 2 is in turn-off state, V C 3 is also equal to induced

voltage of N s 1 plus induced voltage of N s 2 . Thus, voltages V c2and V c3 can be derived from

V C 2 = V C 3 = n V in 1 + D1 D

= n1 D

V in . (3)

The output voltage can be derived from

V o = V C 1 + V C 2 + V C 3 = 2n + 21 D

V in . (4)

The voltage gain of the proposed converter is

V oV in

= 2n + 21 D

. (5)

Equation (5) conrms that the proposed converter has a highstep-up voltage gain without an extreme duty cycle. The curveof the voltage gain related to turns ratio n and duty cycle isshown in Fig. 6. When the duty cycle is merely 0.6, the voltagegain reaches 10 at a turns ratio n of 1; the voltage gain reaches30 at a turns ratio n of 5.

B. Voltage Stresses on Semiconductor Components

The voltage ripples on the capacitors are ignored to simplifythe voltage stress analyses of the components of the proposedconverter.

The voltage stresses on power switches S 1 and S 2 are derivedfrom

V S 1 = V S 2 = 11 D

V in . (6)

The voltage stresses on the power switches S 1 and S 2 relatedto the output voltage V o and the turns ratio n can be expressedas

V S 1 = V S 2 = V o 2n + 11 D

V in . (7)

Equations (6) and (7) conrm that low-voltage-rated metaloxidesemiconductor eld-effect transistors (MOSFETs) withlow RD S ON can be adopted for the proposed converter to

reduce conduction losses and costs. This feature makes our


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Fig. 5. Operating modes of the proposed converter. (a) Mode 1 [ t 0 , t 1 ]. (b) Mode 2 [ t 1 , t 2 ]. (c) Mode 3 [ t 2 , t 3 ]. (d) Mode 4 [ t 3 , t 4 ]. (e) Mode 5 [ t 4 , t 5 ].(f) Mode 6 [ t 5 , t 0 ].

converter suitable for high step-up and high-power applications.The voltage stresses on the power switches account for half of output voltage V o , even if turns ratio n is 0.

The voltage stress on diode D 1 is equal to V C 1 , and the

voltage stress on diode D 2 is voltage V C 1 minus voltage V C b .

These voltage stresses can be derived from

V D 1 = V C 1 = 2

1

D

V in (8)


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Fig. 6. Voltage gain versus turns ratio n and duty cycle.

V D 2 = V C 1 V C b = 11 D

V in . (9)

The voltage stresses on the diodes D 1 and D 2 related to the

output voltage V o and the turns ratio n can be expressed as

V D 1 = V o 2n

1 DV in (10)

V D 2 = V o 2n + 11 D

V in . (11)

The voltage stresses on diodes D 1 and D 2 are close on powerswitches S 1 and S 2 . Although the voltage stress on diode D 1is larger, it accounts for only half of the output voltage V o at aturns ratio n of 1. The voltage stresses on the diodes are loweras the voltage gain is extended by increasing turns ratio n .

The voltage stresses on diodes D 3 and D 4 both equal the V C 2

plus V C 3 , which can be derived fromV D 3 = V D 4 =

2n1 D

V in . (12)

The voltage stresses on the diodes D 3 and D 4 related to theoutput voltage V o and the turns ratio n can be expressed as

V D 3 = V D 4 = V o 2

1 DV in . (13)

Although the voltage stresses on the diodes D 3 and D 4 in-crease as the turns ratio n increases, the voltage stresses on thediodes D 3 and D 4 are always lower than the output voltage.

The relationship between the voltage stresses on all the semi-

conductor components and the turns ratio n is illustrated inFig. 7.

C. Analysis of Conduction Losses

Some conduction lossesare causedby resistancesof semicon-ductor components and coupled inductors. Thus, all the com-ponents in the proposed converter are not assumed to be ideal,except for all the capacitors. Diode reverse recovery problems,core losses, switching losses, and the ESR of capacitors are notdiscussed in this section. The characteristics of leakage induc-tors are disregarded because of energy recycling. Theequivalentcircuit, which includes the conduction losses of coupled induc-

tors andsemiconductor components, is shown in Fig. 8, in which

Fig. 7. Voltage stresses on semiconductor components versus turns ratio n .

Fig. 8. Equivalent circuit including conduction losses of coupled inductors

and semiconductor components.

r L 11 and r L 21 are the copper resistances of primary windings of the coupled inductor; r L 12 and r L 22 are the copper resistancesof secondary windings of the coupled inductor; r D S 1 and r D S 2denote the on-resistance of power switches; V D 1 , V D 2 , V D 3 , andV D 4 denote the forward biases of the diodes; and r D 1 , r D 2 , r D 3 ,and r D 4 are the resistances of the diodes.

Small-ripple approximation was used to calculate conductionlosses. Thus, all currents that pass through components wereapproximated by the dc components. The magnetizing currentsand capacitor voltages are assumed constant because of the

innite values of magnetizing inductors and capacitors. Fig. 9


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Fig. 9. PWM signal of S 1 and S 2 .

shows the PWM signals of S 1 and S 2 . The equivalent operationstates, including the four modes, are shown in Fig. 10.

Mode 1 [0, (D 0.5)]: In this mode, power switches S 1 and S 2are turned ON, and diodes D 1 , D2 , D3 , and D 4 are turned OFF.The equivalent circuit is shown in Fig. 10(a), and the followingequations can be derived:

V in = I Lm 1(r L 11 + r D S 1) + V Lm 1 (14)

V in = I Lm 2(r L 21 + r D S 2) + V Lm 2 . (15)

Mode 2 [(D 0.5), 0.5]: In this mode, power switch S 2 isturned OFF, and diodes D 2 and D 4 are turned ON. The equiva-lent circuit is shown in Fig. 10(b), and the following equationscan be derived:

V in = ( I Lm 1 + nI D 4) (r L 11 + r D S 1) + V Lm 1 (16)

V in = ( I Lm 2 nI D 4) (r L 21 + r D 2) + V Lm 2

+ V D 2 V C b + V C 1 (17)

V C 3 = n (V Lm 1 V Lm 2) I D 4(r L 21 + r L 22

+ r D 4) V D 4 . (18)

Mode 3 [0.5, D]: This mode is similar to mode 1. The equiv-alent circuit is shown in Fig. 10(c), and the following equationscan be derived:

V in = I Lm 1(r L 11 + r D S 1) + V Lm 1 (19)

V in = I Lm 2(r L 21 + r D S 2) + V Lm 2 . (20)

Mode 4 [D, 1]: In this mode, power switch S 1 is turned OFF,and diodes D 1 and D 3 areswitchedON. Theequivalent circuit isshown in Fig. 10(d), and the following equationscan be derived:

V in = ( I Lm 2 + nI D 3) r L 21 + V Lm 2

+ ( I Lm 1 + I Lm 2) r D S 2 (21)

V in = ( I Lm 1 nI D 3) (r L 11 + r D 1) + V Lm 1

+ ( I Lm 1 + I Lm 2) r D S 2 + V D 1 + V C b (22)

V C 2 = n (V Lm 2 V Lm 1) I D 3(r L 21

+ r L 22 + r D 3) V D 3 . (23)

The average currents that pass through diodes D 1 , D 2 , D 3 ,

and D 4 can be derived by the capacitor charge balance.

In modes 1 and 3, both switches are turned OFF, and the av-erage currents that pass through output lter capacitors C 1 , C 2 ,and C 3 are

I C 1 = I C 2 = I C 3 = V oR o

. (24)

In mode 2, the average currents that pass through output lter

capacitors C 1 and C 3 are

I C 1 = I D 2 V oR o

(25)


. (26)

In mode 4, the average currents that pass through output ltercapacitor C 2 are as follows:


. (27)

The average currents that pass through diodes D 2 , D 3 , andD

4 can be derived from

I D 2 = I D 3 = I D 4 = V o

(1 D )R o. (28)

In mode 2, I C b is equal to I D 2 ; in mode 4, I C b is equal to thenegative of I D 1 . Thus, the average current that passes throughdiode D 1 can be derived as follows:

I D 1 = V o

(1 D )R o. (29)

In mode 4, the average value of I Lm 1 can be derived thus

I Lm 1 = I D 1 + nI D 3 = (n + 1) V o(1 D )R o

. (30)

In mode 2, the average value of I Lm 2 can be derived by

I Lm 2 = I D 2 + nI D 4 = (n + 1) V o(1 D )R o

. (31)

The voltage conversion ratio with conduction losses can bederived from

V oV in

=2n +21 D

1V in

(V D 1 + V D 2 + V D 3 + V D 4)

1 + (1 + n )2 (2 D 1) r X

R o (1 D ) 2 + [(1+2 n )2 r X ]+ r Y

R o (1 D )

(32)

where

r X = r L 11 + r L 12 + r L 21 + r L 22

r Y = r L 11 + r L 21 + 2( r L 22 + r L 12 ) + r D S 1 + r D S 2

+ r D 1 + r D 2 + r D 3 + r D 4 .

Because the turns ratio and copper resistances of the sec-ondary windings of the coupled inductors are directly propor-tional, the copper resistances of the coupled inductors can beexpressed as

r L 12 = n r L 11 ; r L 22 = n r L 21 .

Efciency is expressed as follows:

=1 (1

D )V in (2 n +2 )

(V D 1 + V D 2 + V D 3 + V D 4)

1 + (1 + n ) 2 (2 D 1) r X

R o (1 D )2 + [(1+2 n )2 r X ]+ r Y

R o (1 D )

. (33)


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Fig. 10. Equivalent operating modes with conduction losses states. (a) Mode 1 [0, ( D 0.5)]. (b) Mode 2 [( D 0.5), 0.5]. (c) Mode 3 [0.5, D ]. (d) Mode 4 [ D , 1].

On the basis of (33), we infer that the efciency will be higherif the input voltage is considerably higher than the summationof the forward bias of all the diodes, or if the load is substantiallylarger than the resistances of coupled inductors and semicon-ductor components.

The calculated voltage gain and efciency with different cop-per resistances are shown in Fig. 11, and rL 11 and r L 21 aredened as r L . The other parameters in (33) are set as follows:

1) input voltage V in : 40 V;2) turns ratio n : 1;3) load R o : 200 4) on-resistances of switches r D S 1 and r D S 2 : 0.021 ;5) resistances of diodes r D 1 , r D 2 , r D 3 , and r D 4 : 0.01 ;6) forward bias of diodes V D 1 , V D 2 , V D 3 , and V D 4 : 1 V;7) copper resistances of secondary windings of coupled in-

ductors r L 12 and r L 22 = r L at a turns ratio n of 1.Fig. 11 reveals that efciency and voltage gain are affected

by various coupled inductor winding resistors and duty cycle,

and that efciency is decreased by the extreme duty ratio.

This section provides important information on voltage gain,voltage stresses on semiconductor components, and analysis of conduction losses, which indicates the relationship among dutycycle, turns ratio, and components. The proposed converter foreach application can be designed on the basis of selected turnsratios, components, and other considerations.

D. Performance Comparison

For demonstrating the performanceof the proposed converter,the proposed converter is compared with other high step-upinterleaved converters introduced in [30] and [33] as shownTable I.

The high step-up interleaved converter introduced in [30]is also suitable as a candidate for high step-up, high-powerconversion of the PV system, and the other high step-up in-terleaved converter introduced in [33], which is an asymmetri-

cal interleaved structure as proposed converter is favorable for


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Fig. 11. Calculated voltage gain and efciency with different copperresistances.

TABLE IPERFORMANCE COMPARISON OF INTERLEAVED HIGH STEP-UP CONVERTERS

dc-microgrid applications. Both of converters use coupled in-ductor and voltage doubler to achieve high step-up conversion.

For the proposed converter, the step-up gain is highest and thevoltage stress on switch is the lowest, as converter introducedin [30]. Under the turns ratio n designed as less than 2, thehighest voltage stress on diodes of the proposed converter isthe lowest among the compared converters. In addition, thequantities of diodes are the least as converter introduced in [33].Because the components of the proposed converter are the leastamong the compared converters, the reliability is higher and thecost is lower. Thus, the proposed converter is suitable for high

step-up, high-power applications such as PV system.

TABLE IICONVERTER COMPONENTS AND PARAMETERS

Fig. 12. Control strategy for the proposed converter.

IV. DESIGN AND EXPERIMENT OF THE PROPOSED CONVERTER

A prototype of the proposed high step-up converter with a40-V input voltage, 380-V output voltage, and maximum outputpower of 1 kW is tested. The switching frequency is 40 kHz, andthe corresponding component parameters are listed in Table IIfor reference.

The design consideration of the proposed converter includescomponents selection and coupled inductors design, which arebased on the analysis presented in the previous section. In theproposed converter, the values of the primary leakage inductorsof the coupled inductors are set as close as possible for current

sharing performance. Due to the performances of high step-up


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Fig. 13. Measured waveform at P o = 1 kW: (a) V g s 1 , V g s 2 , i L k 1 , and iL k 2 . (b) V ds 1 , V ds 2 , and iL s . (c) V g s 1 , V g s 2 , i D 1 , and iD 2 . (d) V g s 1 , V g s 2 , i D 1 , andi D 2 .

gain, the turns ratio n can be set 1 for the prototype circuit witha 40- V input voltage, 380- V output to reduce cost, volume, andconduction loss of winding. Thus, the copper resistances whichaffect efciency much can be decreased.

The value of magnetizing inductors Lm 1 and Lm 2 can bedesign based on the equation of boundary operating condition,which is derived from

L m (critical) = D (1 D )2R o

2(n + 1)(2 n + 2) f s(34)

where L m (critical) is the value of magnetizing inductors at theboundary operating condition, f s is the switching frequency,and R o is the load. How to suppress the voltage ripple on thevoltage-lift capacitor C b to an acceptable value is the mainconsideration. The equation versus the voltage ripple and theoutput power or output current can be derived by

C b = P o

V o f s V C b=

I of s V C b

(35)

where P o is the output power, V o is the output voltage, f s isthe switching frequency, and V C b is the voltage ripple on thevoltage-lift capacitor C b .

In control strategy, theproposed converter is controlled by themicrochip dsPIC30F4011 as shown in Fig. 12. PV module andbattery set are the main input power sources, which can be seenas an equivalent voltage source for the proposed converter, andthe MPPT algorithm is employed by referring [35]. The batterymanagement system (BMS) for the charge/discharge controlleris not the main priority in this paper; thus, the related designedis not implemented in the paper.

The output voltage is changed as load shift and the detectedfeedbacksignal is processedviaproportional-integral controller,

and the internal comparator generates interleaved PWM with

a 180 phase shift. Due to the insufcient voltage of PWM,the PWM is supported by TC4420 to control power switches,and EL50P1 is a Hall sensor to detect the input current forovercurrent protection (OCP). The input voltage V i suppliedby the PV module and battery set is very nearly 40 V even if the load shift. Thus, the efciency of the proposed converterunder constant input voltage/constant output voltage can be

measured.Fig. 13 illustrates the measured waveforms of V g s 1 , V gs 2 , i Lk 1 , i Lk 2 , V ds 1 , V ds 2 and iLs at P o = 1 kW.In Fig. 13(b), the switch voltage is clamped at 90 V, which ismuch smaller than the output voltage 380 V. Fig. 13(c) and (d)illustrate the measured waveforms of V gs 1 , V g s 2 , iD 1 , iD 2 , iD 3 ,and iD 4 at P o = 1 kW. The measured waveforms are consistentwith the steady-state analysis.

Fig. 14 shows the simulation and experimental result of volt-age on all capacitor to illustrate the high voltage storage andtheoretical analysis. V C 1 is equal to V C b plus output voltage of boost converter, and V C b is equal to the output voltage of theboost converter. Thus, V C 1 is twice of V C b . V C 2 is equal to V C 3 ;both are nearly V C b because turns ratio n is set 1.

Fig. 15(a) shows the input current ripple i in and the currentsiLK 1 and iLK 2 of the primary side of the coupled inductors atP o = 1 kW. The peak-to-peak current ripple is about 2 A (6%),which conrms that the input current ripple is very low even if athigh-power operation. Fig. 15(b) shows the dynamic responsedue to the step load variation between 100 and 500 W, and theoutput voltage is 380 V.

Fig. 16 shows the measured efciency of the proposed con-verter. The maximum efciency is 96.8% at P o = 400 W.At maximum output power, the conversion efciency is about96.1%. Fig. 17 shows the prototype photograph of the proposed

converter.


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Fig. 14. Simulation and experimental result of high-voltage storage of a capacitor: (a) simulation result (b) and experimental result.

Fig. 15. Performance of current sharing and dynamic response. (a) Input current ripple i L K 1 and i L K 2 at 1000 W. (b) Dynamic response under step loadvariation between 100 and 500 W.

Fig. 16. Measured efciency of the proposed converter.

Fig. 17. Prototype photograph of the proposed converter.

V. CONCLUSION

This paper has presented the topological principles, steady-state analysis, andexperimental results for a proposed converter.

The proposed converter has been successfully implemented inan efciently high step-up conversion without an extreme dutyratio and a number of turns ratios through the voltage multi-plier module and voltage clamp feature. The interleaved PWMschemereduces thecurrents that pass through each powerswitchand constrained the input current ripple by approximately 6%.The experimental results indicate that leakage energy is recy-cled through capacitor C b to the output terminal. Meanwhile,the voltage stresses over the power switches are restricted andare much lower than theoutput voltage (380 V).These switches,conductedto low voltage ratedandlow on-state resistance MOS-FET, can be selected. Furthermore, the full-load efciency is96.1% at P o = 1000 W, and the highest efciency is 96.8% atP o = 400 W. Thus, the proposed converter is suitable for PVsystems or other renewable energy applications that need highstep-up high-power energy conversion.

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Kuo-Ching Tseng was born in Tainan, Taiwan, in1957. He received the M.S. degree from Da-YehPolytechnic Institute, Chang Hua, Taiwan, and thePh.D. degree from National Cheng Kung University,Tainan, Taiwan, in 1999 and 2004, respectively, bothin electrical engineering.

From July 1988 to 1996,he wasan R&DEngineerwith Lumen Co., Ltd., Taiwan, working on UPSs andswitching power supply design. In February 2003,he joined the Department of Electrical Engineering,Da-Yeh Institute of Technology, Chang Hua, Taiwan.

Since 2008, he has been with the Department of Electronic Engineering, Na-tional Kaohsiung First University of Science and Technology, Kaohsiung, Tai-

wan, where he is currently an Assistant Professor. His current research interestsinclude dc/dc convertersandpower-factor correctiontechniques,powermanage-ment control system design, solar energy conversion system design, switchingpower converter design, and renewable energy conversion system design.

Dr. Tseng was the recipient of the Electric Power Applications PremiumAward for the paper entitled Novel High-Efciency Step-Up Converter fromthe Institution of Electrical Engineers during 20042005.

Chi-Chih Huang was born in Pingtung, Taiwan, in1989. He received the B.S. degrees in electronics en-gineering from the National Kaohsiung First Univer-sity of Science and Technology, Kaohsiung, Taiwan,in 2011, where he is currently working toward theM.S. degree.

His research interests include power electronicsand energy conversion.

Wei-Yuan Shih was born in Kaohsiung, Taiwan,in 1984. He received the B.S. degrees from Na-tional Formosa University, Yunlin County, Taiwan,and the M.S. degree in electronics engineering fromthe National Kaohsiung First University of Sci-ence and Technology, Kaohsiung, in 2006 and 2011,respectively.

He is currently an Electronic Engineer andworking for Asiatree Technology Co., Ltd. His re-search interests include power electronics and energyconversion.

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