eee 556 cat ms

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    BACHELOR OF SCIENCE IN ELECTRICAL AND ELECTRONIC ENGINEERING

    EEE 556: PROGRAMMABLE LOGIC CONTROLLERS CAT

    1.

    a) List 2 discrete input devices, 2 analog input devices, 2 discrete output devices and 2 analog

    output devices that can be connected to a PLC (4 mks)

    Discrete inputsPush button, Limit switch 1 mk

    Analog inputs

    Load cell, Level sensor 1 mkDiscrete output

    Valve, relay 1 mkAnalog output

    Motor, pump 1 mk

    b) Deine the bus and briely describe the various types o buses ound in a PLC! (4 mks)

    A bus is a path used for communication within the PLC. The information is transmitted inbinary form, i.e. as a group of bits with a bit being a binary digit of 1 or 0, i.e. on/ostates. ach of the bits is communicated simu!taneous!y a!ong its own para!!e! wire. Thesystem has four buses"2 mks

    The data buscarries the data used in the processing carried out by the CP#. Amicroprocessor termed as being $%bit has an interna! data bus which can hand!e $%bitnumbers. &t can thus perform operations between $%bit numbers and de!i'er resu!ts as $%bit 'a!ues. 0.5 mk

    The address busis used to carry the addresses of memory !ocations. (o that each word

    can be !ocated in the memory, e'ery memory !ocation is gi'en a uni)ue address. 0.5 mk

    The control buscarries the signa!s used by the CP# for contro!, e.g. to inform memoryde'ices whether they are to recei'e data from an input or output data and to carrytiming signa!s used to synchroni*e actions. 0.5 mk

    The system busis used for communications between the input/output ports and theinput/output unit. 0.5 mk

    c) List any our advantages o PLC over relay logic (2 mks)Programming the PLC is easier than wiring re!ay !ogic 0.5 mk

    The PLC can be reprogrammed. Con'entiona! contro!s must be rewired and are often

    scrapped instead. 0.5 mk

    PLCs ta+e !ess loor space then re!ay contro! pane!s. 0.5 mk

    aintenance of the PLC is easier, and re!iabi!ity is greater. 0.5 mk

    The PLC can be connected to the p!ant computer systems more easi!y than re!ays can.0.5 mk

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    An !"#$

    2.

    d) Draw the ladder diagram and bloc" diagram or the ollowing logic gatesi! #$ gate

    ii. %#$ gate

    e) Draw the ladder diagram and write the statement list representation, in &iemens PLC, o the

    ollowing 'oolean e(pressions

    F=(AC+B) .CD (2 mks)

    A *!+A *!2

    # *!-

    A *!2

    A *!./ 0+!*

    ) 1(plain with aid o a suitable ladder diagram the concept o latching in PLC systems (2 mks)

    There are often situations where it is necessary to ho!d an output energi*ed, e'en whenthe input ceases. A simp!e e-amp!e of such a situation is a motor which is started by

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    pressing a push button switch. Though the switch contacts do not remain c!osed, themotor is re)uired to continue running unti! a stop push button switch is pressed. Theterm !atch circuit is used for the circuit used to carry out such an operation. &t is a se!f%maintaining circuit in that, after being energi*ed, it maintains that state unti! anotherinput is recei'ed. 1 mk

    1 mk

    g) Design a ladder logic circuit and unctional bloc" diagram to implement control o a motor

    such that when a switch button is pressed, it remains on until another button is pressed!

    (2 mks)

    h) A sensor system has our sensors which operate such

    that when any one o the sensors is deactivatednot in operation an alarm is activated! Design

    a ladder logic diagram to implement this system using the concept o latching

    (2 mks)

    %. n a course selection process

    where ive sub3ects are

    considered, a student must pass

    either 1nglish or

    4iswahili! 5o be considered or 1ngineering, a student must pass in both mathematics and

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    Physics! 5o be considered or ursing, a student must pass in 'iology and in either

    Mathematics or Physics! A student who 6ualiies or both can only be ta"en in one course

    according to his irst priority!i! $epresent this inormation in a truth table (2 mks)

    A 718) ' 74&) C 7MA5) D 7P9:) 1 7'#) ;+ 718) ;27

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    F1=BCD+ACD=CD ( A+B )

    F2=BCE+ACE+ADE+BDE

    CE ( A+B )+DE (A+B )=( A+B )(CE+DE)

    iii! Draw a ladder logic diagram that can implement this (2 mks)

    5a"ing

    A 71nglish)=+2.!*

    ' 74iswahili)=+2.!+

    C 7Mathematics)=+2.!2

    D 7Physics)=+2.!-

    1 7'iology) >+2.!.

    ;+ 71ngineering)=0+2.!*

    ;2 7ursing)=0+2.!+

    iv! Draw unctional bloc" diagram that can implement this (2 mks)Correct diagram ? 2 mks

    v! @rite the statement list, or a &iemens PLC, or this implementation (2 mks)

    Correct list ? 2 mks