ECE342: Computer Hardware

Course Information Sheet January 5th, 2015

Instructors Tom Czajkowski Course Coordinator Lecture Section L0101 email: tsczajkowski@gmail.com Hamid Timorabadi Lecture Section L0102 email: h.timorabadi@utoronto.ca Description Computer Hardware (ECE342) course discusses the design of logic systems consisting both of hardware and software components. In this course, we continue the work began in ECE241 (Digital Systems) and discuss more advanced logic design techniques, covering multipliers, the use of Algorithmic State Machine charts to implement algorithms in hardware, bus/interconnect interfaces and asynchronous circuit design. At the same time, we follow up on the topics covered in ECE243 (Computer Organization) and demonstrate how to build logic systems that contain both student-designed hardware components and a processor. We conclude this course with digital logic testing techniques such as path sensitizing. To provide a valuable practical experience, the material introduced in this course is used in laboratories. There are six laboratory exercises in this course, ranging from fast multiplier design, through implementation of software algorithms as a hardware circuit, to the implementation of a computer system consisting of a student-designed simple processor and pre-made hardware components. This provides an experience of building a simple computer system from the ground up, covering the key concepts necessary to build such systems commercially. In each lab, students will use Verilog Hardware Description Language to implement their logic designs on a DE2 board. Some exercises will require students to also write assembly or C code when a processor is present in their design. Lectures In this course, there are three lectures per week for each section. The time and day of each lecture is summarized in the table below.

Day Tom Czajkowski (L0101) Hamid Timorabadi (L0102)

Monday 9-11am, GB221

Tuesday 4-5pm, GB220

Wednesday 9-10am, GB221 4-5pm, GB220

Friday 4-5pm, GB220

Laboratories The second component of this course is a set of laboratory assignments that are to be completed within the scheduled time. There are 3 hours of lab time allocated per week for each section, with a total of 9 weeks of laboratories. The laboratory times are listed in the table below.

Time and Day Practical Section

P0101 Practical Section

P0102

9am-12pm, Tuesday BA3135, BA3145

12-3pm, Tuesday BA3135, BA3145

The first laboratory session starts in the week of January 19th, 2015.

Midterm Examination The midterm examination date is currently set for the week of February 23rd, 2015. The exact day and time will be provided at a later date. Grading Student will be assigned a grade for performance in this course. The grade is composed of: 1. Laboratories (20%)

Lab 1 (1%) – 1 week Lab 2 (2%) – 1 week Lab 3 (3%) – 1 week Lab 4 (4%) – 1 week Lab 5 (4%) – 2 weeks Lab 6 (6%) – 3 weeks

2. Midterm Exam (30%) 3. Final Exam (50%) Textbook Fundamentals of Digital Logic with Verilog Design, S. D. Brown and Z. G. Vranesic, McGraw-Hill Companies Inc.. Although the latest edition of the book is recommended, an earlier version will also be suitable.