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ECE 7366 Advanced Process Integration

Set 10b: The Bipolar Transistors and BiCMOS

Dr. Wanda Wosik

Text Book: B. El-Karek, “Silicon Devices and Process Integration”

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BJT: High-Level Injection EffectCurrent Gain Degradation

Base Conductivity Modulation: • RB(int) decreases

• emitter efficiency g decreases too

• majority carriers create E-field – drift current of minority carriers

Low injection levels High injection levels – starts sooner for low doped base – HBT has advantage over Si BJT

Dnp<<pp Dnp>>pp

The effect of base modulation is stronger if combined with emitter crowding effect.

Kirk Effect

High current densities increases base width i.e. base Gummel number b

At high injection level:Electric field in the low doped C – peak field at CB junction moves to n+/n region. Electrons accumulate in B at the C-B depletion layer dl in B shrinks = C expandsBase widens=Kirk effect.

Voltage drop here

Use higher doping in the collector region (SIC) but watch for capacitance increase.

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Base Push Effect (Kirk Effect)

Current through the depletion layer of B-C

•High injection aggravated also by the increase of the Base Gummel number at high VBE

• Ohmic voltage drop on C-epi consumes some of the applied VCE

•Onset of High Level Injection Dn@ base edge ≈ ND

•Increase ND in C to Kirk effect

• To prevent degradation of VCEO and maintain low capacitance use SIC (selective implanted collector) – higher than in n-epi ND≥1017cm-3

ND≥1016cm-3

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Frequency Response of Current Gain

Emitter delay tE

with current

E-B junction

Increase speed (E) : CjE, REext, rEint and CEparasitic

•C (junction): scaling (area), B doping , overlapping (Cparasitic) •Optimization of tE trade-off : speed, current-carrying capability, Early voltage, and punch-through

Base transit time

Emittertransit time

Base Transit Time tB of injected charges QnB

Injection&transport to the base

Increase speed (B):•Built-in E-field (graded doping)•µ(N(x)), D(N(x))

Base ~20-50 nm – high E-fields velocity overshoot and ballistic transport

tB~Wb

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Collector-Base Capacitance Delay, tCjC

CJC includes both SIC and non-SIC collector regions

Frequency Response - Collector Delay, tC

Transit Time through the Collector-Base Depletion Layer, txdC

Velocity saturation in C-B D.L. Vsat~107cm/s

Gain-Bandwidth Product, fT

(b≈1)

Figure of merit: fT=bf

adjustment 2-6 for grading in the base

Dominated by dynamic emitter resistance kT/IC

Wb shortening at higher voltage

Kirk effect dominates

Important for short base ~100nm – transport in base fast

Maximum Frequency of Oscillation, fmax (G≈1)

Power gain=Pout/Pin drops to 1 when f=fmax

Increase max speed: rB (intrinsic base by layout: Emitter width, multiple contacts, distance Bext/Bint), CjC

Go to slide 13

fT(IC)

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The Transistor as a Switch

ton=td+tr

toff=ts+tr

Switching uses large signals: • I(V) analyses very complex because

of nonlinear operation of the transistors

• Charge control method preferred for analyses

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Delay Time , td

VEC=ICRload

VEB=0 VEC≈VBC

From off on

If VBE=0 td=0 (reverse bias)

If VBE>0 td≠0 charging E-B junction

DQxdE=qNDDxdE

Charging (from reverse to zero):DQxdE/DVBECjE

&DQxdCCjC

For high speed C&E as small as possible

Current for this charging:

ts

tf

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Rise Time , tr

Time to bring IC from 10% to 90% of its final value (point AB)

Base electrically neutral: QnB=-QpB

Charging of E-B and C-B depletion layers

If there is recombination in the base

To bring IC to required level at point B

teff – includes 1/fT, RLCjC

For ultra thin bases - emitter charge storage has to be included

tr

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Storage Time , tsTime corresponding to maintain saturation after switching off the base signal IB (AB)

Large charge storage due to low doping level

t4- corresponds to return from saturation to point B

Minimize storage: minority t in C & distance Wepi b/w collector and B.L. Do not use AuClamp C-B with Schottky diode – small storage there in SBD + low voltage on C-B junction

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Fall Time , tf

Time to decrease IC from 90% to 10% of its final value (point BA)

Excess minority carriers recombine so the charge is removed from the base

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Bipolar Junction Transistors and a Switch

SchottkyDiode used in n-p-n BJTs forfaster speed

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Silicon-Germanium TransistorHeterojunction Bipolar Transistor (HBT)

Epitaxy: Ultra High Vacuum CVD ~450°C Low pressure of

atmospheric pressure CVD ~600°CDoping: B2H6, AsH3 or PH3 in the gas

4.2% lattice mismatch

For x<20% the SiGe lattice constant:

Pseudomorphic conditions – adapt to substrate

Defect generation possible

If still metastable – film can relax to smaller Si lattice if annealed @high T

Bandgap engineering

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Energy Bands: Bandgap Lowering

Change in the bandgap mainly in the valence band

Note: base in Si BJTs had bandgap narrowing due to doping

Density of States

Strain should change bandgapni2 but also shape

(E(k)mn*&mp*). Effective masses decrease NC&NV

Barrier for holes injection to E Current gain

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Carrier Mobility

Low field Mobility in Strained SiGe

Strain in the crystal causes:

• distortion of the bands (split&shift)~ DE≈.6x (x- Ge fraction)

• change of effective mass of carriers

• distribution in the bands Piezoresistance

Energy Split ≈0.166xAll holes occupy the light-hole bands – high mobility there

reminder

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Carrier Mobility in BJT Base

Normal to the base

Mobility parallel to the base degrade under compressive strain (d.ue to alloy scattering)

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Transistor Parameters

BJT are made with SiGe base, poly-Si emitters with oxide interface

In Siin SiGe

Improvement in current gain comes from• mobility in the direction of e-flow

but • mainly from higher npSiGe because of

lower bandgap in the base

Current Gain

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Transistor ParametersCurrent Gain: Forward Active Mode

Bandgap changes along the base due to graded Ge incorporation

doping composition

Effect of mobility and density of states

VBESiGe<VBESi

Base Transit Time

Reduce transit time tB to increase device speed

Bandgap lowering SiGe reduces tB by:

• increasing doping in the base• reducing B thickness but keeping Rs low and b high – can reach velocity

saturation• increasing transport by grading base with Ge – built-in E-field.• transport through the base will be negligible while that through collector will

dominate

For uniform doping and bandgap

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Transistor Optimization

•Digital designs: high speed, high gain, small size, high packing density.

•Analog designs: High Early voltage, bVA high product, low noise (size not so important – mainly C, R, L in the circuits).

• Mixed analog-digital designs – compatibility with CMOS so limited flexibility in optimization

•Power transistors: high voltage and current capabilities and power management

• All cases: transistors must have high reliability and yield and minimized leakage and power.

Base Profile Optimization

High base transit time: thin base but highly doped for low RBint and small depletion layers in the base

Accelerating E-fieldDecelerating

field

E-B junction shift too high field, tunneling & surface trapping

B fast diffusion out from the Ge region (E & C) h-injection to c-Si degradation of b, speed, Early voltage – use spacers.

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Suppression of Boron Diffusion by Carbon (0.5-1%)

As and Sb diffusion enhanced by C

B and P diffusion retarded by C ( of interstitials’ concentrations)

Base Base

Base Base

Emitter Emitter

Emitter Emitter

50 nm base width possible.

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Collector Profile Optimization

Higher collector concentrations• increase current density for onset of Kirk effect•Reduce Rc and• transit time through C-B junction• reduced base-width (typically caused by B outdiffusion into C)

Net improvement of cutoff frequency fT but CjC and BVCEO

Product fTxBVCEO ~200GHz-V but for SiGe HBT ~ 500 GHz-V.

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Interaction between Process and Device Parameters Summary.

Here, HBT less susceptible to high T CMOS

Harame, 2004

BiCMOS on SOI.

Krishna, 2009

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BiCMOS Process Flow

Indicate bipolar/analog specific modules

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NPN Transistor in BiCMOS

Intrinsic Epi 0.4-0.6µm

0.1-1.0 µm

As or Sb N+ buried layer NBL

sinker

deep

shallow

trenches

SIC

NPN extrinsic baseSiGe grows as a crystal on Si and polycrystalline on oxide

NPN intrinsic base SiGe100-200nm GeH4+B2H6 epiSi cap at E/B

Poly-Si E

~500 nm

SOI

Sequence is marked by #s – Incorporated into the CMOS process flow. NPN & PNP have common processes also.

Sinkers done by multiple implant of As&P for tailoring profilessilicide

SIC is high low dose P or As implant ~1012-1013 cm-2

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Common with NPN

PNP Transistor in BiCMOS

P+ BL

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Intrinsic Base Regions for NPN and PNP Transistors

CVD: • SiGe ~100-200nm GeH4+B2H6

• Si cap @625°C for npn HBT

Very steep profiles of Ge and of B or As or P.

Acts as a buffer b/w E&B

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Bipolar Transistors in BiCMOS @ PNP Base Patterning

@ Poly E Patterning

Base implantedwith P or As

Poly-resistor can be implanted at this step – include R pattern in the mask

20-30nm SiO2 50-100nm Si3N4 • Isolate Bex and poly-Si E

• Etch E window NPN• SIC implant with P 1012-1013cm-2

@ 100-200keV• Grow IFO 0.5nm in RTO• Deposit poly-Si 150-200 nm• As implant 2x1016cm-2 , 1000°C• Pattern and etch poly-E NPN

• Nitride to stop PNP poly-Si etch• B implant for SIC @ 50-100keV• Grow IFO• Implant B (5-8)x1015cm-3

Rucker et al., 2012

Example of 0.13mm SiGe HBT at 500 GHz

WE =0.12mmRBCBC RBi=2.6Ω/sqdsp ox ~25nm RB

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Common with NPN

Intrinsic Epi 0.4-0.6µm

0.1-1.0 µm

As or Sb N+ buried layer NBL

sinker

deep

shallow

trenches

SIC

Poly-Si E

~500 nm

silicide

•CMOS gate-stack, poly-R and capacitors patterned and etched together (directional).

•NMOS S/D used as conacts to PNP base, NPN collector, poly-R and capacitors.

•PMOS S/D serve as contacts to NPN base and PNP collector

Compare NPN and PNP transistors

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Passive ElementsResistors

Resistors

Inductor

Passive ElementsCapacitors: Stability in Operation (V & T)

TCC includes TCC due to: thermal expansion, space charge region (surface depletion – Si and poly-Si), oxide e(T). Watch for leakage.

Plugs/Vias reduce resistance values

Protection of- and against Cu by Al2O3/Ta barriers.

MIM capacitors for decoupling use high K

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Passive ElementsVaractors

Variable capacitor when the voltage is applied to a p-n junction, Schottky diode or MOS structure.Used for tuning ex. radio receiver or voltage-controlled oscillator (VCO)

Junction Varactor n=1/2 for abrupt junction 1/3 for linearly graded junction

Depletion layer

p+-n junction

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Depletion layer with VR gives capacitance depending on dopant distribution

Passive ElementsJunction Varactors

The most important parameters: • C/area

• capacitance sensitivity (the highest for hyperabrupt junction)

• tuning range

• quality factor

• low frequency noise

• breakdown voltage

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BiCMOS Applications Read out integrated circuits (ROICs) ex.

“ROIC are used for consumer, industrial, scientific and military needs such as automobile and maritime night vision, surveillance, medical and X-ray imaging, building diagnostics, fire fighting, gas detection, helmet mounted and weapons sights, smart munitions, micro-UAVs (unmanned aerial vehicles)”

See passive elements, pnp also available here and in general in BiCMOS

Arjun Kar-Roy et al, 2010 SPIE