ece 447: lecture 7

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ECE 447: Lecture 7 Polling and Interrupts

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ECE 447: Lecture 7. Polling and Interrupts. Main Program. Polling routine. Service device #1. Signal from device #1?. Service device #2. Signal from device #2?. Signal from device #N?. Service device #N. Cycle continuously. ECE 447: Polling. ECE 447: Interrupt. - PowerPoint PPT Presentation

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Page 1: ECE 447: Lecture 7

ECE 447: Lecture 7

Polling and Interrupts

Page 2: ECE 447: Lecture 7

ECE 447: Polling

Main Program

.

.

.

.

.

.

.

Cycle continuously

Polling routine

Signal from device #1?

Signal from device #2?

Signal from device #N?

Service device #1

Service device #2

Service device #N

Page 3: ECE 447: Lecture 7

ECE 447: Interrupt

Page 4: ECE 447: Lecture 7

ECE 447: External Edge Sensitive Interrupts

STRA- Strobe A Interrupt

PA0 - Input Capture 3 (IC3)

PA1 - Input Capture 2 (IC2)

PA2 - Input Capture 1 (IC1)

PA3 - Input Capture 4/ Output compare 5 (IC4/OC5)

PA7 - Pulse Accumulator Input (PAI)

Pin Event / Interrupt

Page 5: ECE 447: Lecture 7

ECE 447: External Level Sensitive Interrupts

IRQ - maskable interrupt, may beignored by setting a bit in a “mask” register.

XIRQ - non-maskable interrupt, cannot be ignored, no “mask” register available.

Pin Event / Interrupt

Non-Maskable Interrupts are usually reserved for critical events (i.e. unrecoverable errors)

Page 6: ECE 447: Lecture 7

ECE 447: Interrupt Service Routines

Page 7: ECE 447: Lecture 7

ECE 447: Interrupt Vectors

Page 8: ECE 447: Lecture 7

ECE 447: Interrupt Vector Jump Table

Page 9: ECE 447: Lecture 7

ECE 447: Register Structure of 68HC11

X-index register

Y-index register

Stack Pointer

Program Counter

Condition Code Register

Double Accumulator DAccumulators A and B or

IX 015

IY 015

SP 015

PC 015

CCR 07

D 015

7 70 0A B

S X H I N Z V C

Page 10: ECE 447: Lecture 7

ECE 447: Condition Code Register

CCR 07

S X H I N Z V C

carry / borrowoverflowzeronegativeI-interrupt maskhalf-carry (from bit 3)X-interrupt maskstop disable

Page 11: ECE 447: Lecture 7

ECE 447: Setting and Clearing Interrupt MasksI - interrupt mask

set cleared

1. by RESET2. whenever an interrupt occurs3. using SEI4. using TAP

1. by RTI2. using CLI3. using TAP

X - interrupt maskset cleared

1. by RESET2. whenever an interrupt occurs

1. by RTI2. using TAP

interrupt disabled interrupt enabled

interrupt disabled interrupt enabled

Page 12: ECE 447: Lecture 7

ECE 447: Condition Code Instructions

1. set a flag 1 flag

SE [C, V, I]

2. clear a flag 0 flag

CL [C, V, I]

3. change all flags A CC

TAP

4. read all flags CC A

TPA

Page 13: ECE 447: Lecture 7

ECE 447: 68HC11 InterruptsCC Register

Mask0 - interrupt

enabled1 - interrupt

disabled

Local Enable Flag

1 - interrupt enabled

0 - interrupt disabled

InterruptSource

VectorAddress

Jump TableAddress

Timer input capture 3Timer input capture 2Timer input capture 1Real-time interruptIRQ (external pin) + STRAXIRQSoftware interruptIllegal opcode trapCOP failureClock monitor fail

FFEA-EBFFEC-EDFFEE-EFFFF0-F1FFF2-F3

FFF4-F5FFF6-F7FFF8-F9FFFA-FBFFFC-FF

00E2-00E400E5-00E700E8-00EA00EB-00ED00EE-00F0

00F1-00F300F4-00F600F7-00F900FA-00FC00FD-00FF

IIIII

XNANANANA

TMSK1,IC3ITMSK1,IC2ITMSK1,IC1ITMSK2, RTII

—PIOC, STAI

———

CONFIG, NOCOPOPTION,CME

Page 14: ECE 447: Lecture 7

ECE 447: 68HC11 InterruptsCC Register

Mask0 - interrupt

enabled1 - interrupt

disabled

Local Enable Flag

1 - interrupt enabled

0 - interrupt disabled

InterruptSource

VectorAddress

Jump TableAddress

Pulse accumulatorinput edgePulse accumulatoroverflowTimer overflowTimer input capture 4/output compare 5Timer output compare 4Timer output compare 3Timer output compare 2Timer output compare 1

FFDA-DB

FFDC-DD

FFDE-DFFFE0-E1

FFE2-E3FFE4-E5FFE6-E7FFE8-E9

00CA-00CC

00CD-00CF

00D0-00D200D3-00D5

00D6-00D800D9-00DB00DC-00DE00DF-00E1

I

I

II

IIII

TMSK2,PAII

TMSK2,PAOVI

TMSK2,TOITMSK1,I4/O5I

TMSK1,OC4ITMSK1,OC3ITMSK1,OC2ITMSK1,OC1I

Page 15: ECE 447: Lecture 7

ECE 447: 68HC11 InterruptsCC Register

Mask0 - interrupt

enabled1 - interrupt

disabled

Local Enable Flag

1 - interrupt enabled

0 - interrupt disabled

InterruptSource

VectorAddress

Jump TableAddress

ReservedSCI Serial System• receive data register full• receiver overrun• transmit data register empty• transmit complete• idle line detectedSPI serial transfer complete

FFC0-D5FFD6-D7

FFD8-D9

—00C4-00C6

00C7-00C9

—I

I

SCCR2,RIE

SCCR2,RIESCCR2,TIE

SCCR2,TCIESCCR2,ILIESPCR, SPIE

Page 16: ECE 447: Lecture 7

ECE 447: Port C & CL

PORTC

PORTCL

PC7-PC0

STRA

PORTC - unsychronized inputPORTCL - synchronized input

Reading PORTC reads data currently present on input linesReading PORTCL reads data latched in the input register usinga falling or rising edge of STRA

Page 17: ECE 447: Lecture 7

ECE 447: When a Strobe Occurs

PIOC, STAF

PIOC, STAI

PIOC, EGA

PC7:PC0

STRA

DATA1 DATA2

interrupt

STAF is reset by a two-step process:1) read PIOC2) read PORTCL

DATA1read

DATA2read

Page 18: ECE 447: Lecture 7

ECE 447: Polling for STRA

#include <hc11e9.h>

while (!PIOC & STAF);a = PORTCL;

Page 19: ECE 447: Lecture 7

ECE 447: Interrupt Service Routine for STRA

STRA interrupt has the same Vector Address and the same Jump Table Address as IRQ

Interrupt service routine should contain checking for a source of the interrupt

Example:

#include <hc11e9.h>#define STAF_STAI (STAF | STAI)

if (PIOC & STAF_STAI == STAF_STAI){ STRA routine }

else { IRQ routine }