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  • 7/26/2019 EC Objective Paper 2 1011

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    ESE - 2016

    Detailed Solutions ofELECTRONICS ENGG.

    PAPER-II

    Corporate office: 44-A/1, Kalu Sarai, New Delhi-110016 | Ph: 011-45124612, 9958995830

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    Directors Message

    UPSC has introduced the sectional cutoffs of each paper and screening cut off in

    three objective papers (out of 600 marks). The conventional answer sheets of only

    those students will be evaluated who will qualify the screening cut offs.

    In my opinion the General Ability Paper was easier than last year but Civil

    Engineering objective Paper-I and objective Paper-II both are little tougher/

    lengthier. Hence the cut off may be less than last year. The objective papers of ME

    and EE branches are average but E&T papers are easier than last year.

    Category

    Percentage

    Marks

    Expected Minimum Qualifying Marks in Each Paper (out of 200 Marks)OBJECTIVE

    GEN

    15%

    30

    OBC

    15%

    30

    SC

    15%

    30

    ST

    15%

    30

    PH

    10%

    20

    Category

    Percentage

    Marks

    Expected Minimum Qualifying Marks in Each Paper (out of 200 Marks)CONVENTIONAL

    GEN

    15%

    30

    OBC

    15%

    30

    SC

    15%

    30

    ST

    15%

    30

    PH

    10%

    20

    Branch

    CE

    ME

    EE

    E&T

    Expected Screening cut off out of 600 Marks (ESE 2016)

    GEN

    225

    280

    310

    335

    OBC

    210

    260

    290

    320

    SC

    160

    220

    260

    290

    ST

    150

    200

    230

    260

    Note: These are expected screening cut offs for ESE 2016. MADE EASY does not

    take guarantee if any variation is found in actual cutoffs.

    B. Singh (Ex. IES)CMD , MADE EASY Group

    MADE EASY team has tried to provide the best possible/closest answers, however if

    you find any discrepancy then contest your answer at www.madeeasy.in or write your

    query/doubts to MADE EASY at: [email protected]

    MADE EASY owes no responsibility for any kind of error due to data insufficiency/misprint/human errors etc.

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    MADE EASY offers well planned Classroom and Postal Study Course which is designed by senior and expert faculty

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    Roadmap forESE 2017 Prelims

    Paper-IGeneral Studies &Engineering Aptitude

    Indias Best Institute for IES, GATE PSUs

    1. Current Affairs:Current National and International issues, bilateral issues, current economic affairs,

    Defence, Science and Technology, Current Government Schemes, Persons in news, Awards &

    honours, current environment & wildlife, current sports, books & authors etc.

    2. Reasoning and Aptitude :Algebra and Geometry, Reasoning and Data Interpretation, Arithmetic,

    coding and decoding, Venn diagram, number system, ratio & proportion, percentage, profit & loss,

    simple interest & compound interest, time & work, time & distance, blood relationship, direction

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    3. Engineering Mathematics : Differential equations, complex functions, calculus, linear algebra,

    numerical methods, Laplace transforms, Fourier series, Linear partial differential equations,

    probability and statistics etc.

    Paper-I : General Studies & Engineering Aptitude

    P.T.O. (Page 1 of 3)

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    4. General Principles of Design, Drawing, Importance of Safety : Engineering Drawing,

    Drawing instruments, drawing standard, geometric construction and curves, orthographic

    projections, methods of projection, profile planes side views, projection of points, projection of

    straight lines, positions of a straight line with respect to HP and VP, determining true length and

    true inclinations of a straight line, rotation methods, trace of a line, projection of planes,

    importance of safety etc.

    5. Standards and quality practices in production, construction, maintenance and services:

    ISO Standards, ISO-9000 Quality Management, ISO-14000 other, BIS Codes, ECBC, IS, TQM ME,

    TPM, PDCA, PDSA, Six Sigma, 5S System, 7 Quality Control Tools , ISHIKAWAS -7QC Tools, Kaizer

    Tools-3m, TQM : Most Importance, Deming's: 14 Principles, Lean Manufacturing ME, Quality

    Circles, Quality Control, Sampling.

    6. Basics of Energy and Environment:Renewable and non renewable energy resources, energy

    conservation, ecology, biodiversity, environmental degradation, environmental pollution,

    climate change, conventions on climate change, evidences of climate change, global warming,greenhouse gases, environmental laws for controlling pollution, ozone depletion, acid rain,

    biomagnification, carbon credit, benefits of EIA etc.

    7. Basics of Project Management:Project characteristics and types, Project appraisal and project

    cost estimations, project organization, project evaluation and post project evaluation, risk

    analysis, project financing and financial appraisal, project cost control etc.

    8. Basics of Material Science and Engineering:Introduction of material science, classification of

    materials, Chemical bonding, electronic materials, insulators, polar molecules, semi conductor

    materials, photo conductors, classification of magnetic materials, ceramics, polymers, ferrous

    and non ferrous metals, crystallography, cubic crystal structures, miller indices, crystal

    imperfections, hexagonal closed packing, dielectrics, hall effect, thermistors, plastics,

    thermoplastic materials, thermosetting materials, compounding materials, fracture, cast iron,

    wrought iron, steel, special alloys steels, aluminum, copper, titanium, tungsten etc.

    9. Information and Communication Technologies : Introduction to ICT, Components of ICT,

    Concept of System Software, Application of computer, origin and development of ICT, virtual

    classroom, digital libraries, multimedia systems, e-learning, e-governance, network topologies,

    ICT in networking, history and development of internet, electronic mail, GPS navigation system,smart classes, meaning of cloud computing, cloud computing architecture, need of ICT in

    education, national mission on education through ICT, EDUSAT (Education satellite), network

    configuration of EDUSAT, uses of EDUSAT, wireless transmission, fibre optic cable etc.

    10. Ethics and values in engineering profession:ethics for engineers, Ethical dilemma, elements

    of ethical dilemmas, indian ethics, ethics and sustainability, ethical theories, environmental

    ethics, human values, safety, risks, accidents, human progress, professional codes,

    responsibilities of engineers etc.

    Page 2 of 3Scroll down

    or Answer Key of ESE 2016

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    Corporate Office: 44-A/1, Kalu Sarai, New Delhi-16 | Email : [email protected] | Visit: www.madeeasy.in

    ESE-2016 : Electronics Engg.Solutions of Objective Paper-II | Set-A

    1 2 3 4 5 6 7 8 9 0

    1 2 3 4 5 6 7 8 9 0

    1 2 3 4 5 6 7 8 9 0

    1 2 3 4 5 6 7 8 9 0

    1 2 3 4 5 6 7 8 9 0

    1 2 3 4 5 6 7 8 9 0

    1 2 3 4 5 6 7 8 9 0

    1 2 3 4 5 6 7 8 9 0

    1 2 3 4 5 6 7 8 9 0

    1 2 3 4 5 6 7 8 9 0

    1 2 3 4 5 6 7 8 9 0

    1 2 3 4 5 6 7 8 9 0

    1 2 3 4 5 6 7 8 9 0

    Page3

    Paper-II (Electronics Engineering)

    1.1.1.1.1. A single-stage amplifier has a voltage gain of 100. The load connected to the collector

    is 500 and its input impedance is 1 k. Two such stages are connected in cascadethrough an R-C coupling. The overall gain is

    (a) 10000 (b) 6666.66

    (c) 5000 (d) 1666.66

    Ans.Ans.Ans.Ans.Ans. (b)(b)(b)(b)(b)

    A1

    A2 VoVi

    Voltage gain of A1decreases due to loading effect.

    +

    R01

    A vv 1i Ri2V01

    V01 =

    =

    + +i

    i

    = 66.66

    whereas AV2= 100

    Overall gain, Av =AV1 AV2= 66.66 100 = 6666.66

    2.2.2.2.2. Assuming VCE(Sat)= 0.3 V for a Silicon transistor at ambient temperature of 25C and

    hFE= 50, the minimum base current IB required to drive the transistor into saturation

    for the circuit shown is

    +5 V

    1 k

    IB

    Q

    (a) 64 A (b) 78 A(c) 94 A (d) 140 A

    Ans.Ans.Ans.Ans.Ans. (c)(c)(c)(c)(c)

    IC sat =

    =

    IBmin =

    = =

    I

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    Corporate Office: 44-A/1, Kalu Sarai, New Delhi-16 | Email : [email protected] | Visit: www.madeeasy.in

    ESE-2016 : Electronics Engg.Solutions of Objective Paper-II | Set-A

    1 2 3 4 5 6 7 8 9 0

    1 2 3 4 5 6 7 8 9 0

    1 2 3 4 5 6 7 8 9 0

    1 2 3 4 5 6 7 8 9 0

    1 2 3 4 5 6 7 8 9 0

    1 2 3 4 5 6 7 8 9 0

    1 2 3 4 5 6 7 8 9 0

    1 2 3 4 5 6 7 8 9 0

    1 2 3 4 5 6 7 8 9 0

    1 2 3 4 5 6 7 8 9 0

    1 2 3 4 5 6 7 8 9 0

    1 2 3 4 5 6 7 8 9 0

    1 2 3 4 5 6 7 8 9 0

    Page4

    3.3.3.3.3. Which of the following regions of operation are mainly responsible for heating of the

    transistor under switching operation?

    1. Saturation region

    2. Cut-off region

    3. Transition from saturation to cut-off

    4. Transition from cut-off to saturation Select the correct answer using the codes given

    below:

    (a) 1, 2, and 4 only (b) 1, 3, and 4 only

    (c) 2 and 3 only (d) 1 and 3 only

    Ans.Ans.Ans.Ans.Ans. (b)(b)(b)(b)(b)

    4.4.4.4.4. In a sinusoidal oscillator, sustained oscillations will be produced only if the loop gain

    (at the oscillation frequency) is

    (a) Less than unity but not zero (b) Zero

    (c) Unity (d) Greater than unity

    Ans.Ans.Ans.Ans.Ans. (c)(c)(c)(c)(c)

    Oscillators have unity loop gain.

    5.5.5.5.5. The Class-B push-pull amplifier is an efficient two-transistor circuit, in which the two

    transistors operate in the following way :

    (a) Both transistors operate in the active region throughout the negative ac cycle

    (b) Both transistors operate in the active region for more than half-cycle but less than

    a whole cycle

    (c) One transistor conducts during the positive half-cycle and the other during the

    negative half-cycle

    (d) Full supply voltage appears across each of the transistors

    Ans.Ans.Ans.Ans.Ans. (c)(c)(c)(c)(c)

    6.6.6.6.6. Consider the following statements regarding Wien Bridge oscillator:

    1. It has a larger bandwidth than the phase shift oscillator.

    2. It has a smaller bandwidth than the phase shift oscillator.

    3. It has 2 capacitors while the phase shift oscillator has 3 capacitors.

    4. It has 3 capacitors while the phase shift oscillator has 2 capacitors.

    Which of the above statements are correct?

    (a) 1 and 3 only (b) 2 and 4 only

    (c) 1 and 4 only (d) 2 and 3 only

    Ans.Ans.Ans.Ans.Ans. (a)(a)(a)(a)(a)

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    Corporate Office: 44-A/1, Kalu Sarai, New Delhi-16 | Email : [email protected] | Visit: www.madeeasy.in

    ESE-2016 : Electronics Engg.Solutions of Objective Paper-II | Set-A

    1 2 3 4 5 6 7 8 9 0

    1 2 3 4 5 6 7 8 9 0

    1 2 3 4 5 6 7 8 9 0

    1 2 3 4 5 6 7 8 9 0

    1 2 3 4 5 6 7 8 9 0

    1 2 3 4 5 6 7 8 9 0

    1 2 3 4 5 6 7 8 9 0

    1 2 3 4 5 6 7 8 9 0

    1 2 3 4 5 6 7 8 9 0

    1 2 3 4 5 6 7 8 9 0

    1 2 3 4 5 6 7 8 9 0

    1 2 3 4 5 6 7 8 9 0

    1 2 3 4 5 6 7 8 9 0

    Page5

    7.7.7.7.7. For normal operation of a transistor

    (a) Forward bias the emitter diode and reverse bias the collector diode

    (b) Forward bias the emitter diode as well as the collector diode

    (c) Reverse bias the emitter diode as well as the collector diode

    (d) Reverse bias the emitter diode and forward bias the collector diode

    Ans.Ans.Ans.Ans.Ans. (a)(a)(a)(a)(a)

    8.8.8.8.8. Consider the following statements regarding linear power supply:

    1. It requires low frequency transformer.

    2. It requires high frequency transformer.

    3. The transistor works in active region. Which of the above statements is/are correct?

    (a) 1 only (b) 2 and 3 only

    (c) 1 and 3 only (d) 3 only

    Ans.Ans.Ans.Ans.Ans. (c)(c)(c)(c)(c)

    9.9.9.9.9. The capacitance of a full wave rectifier, with 60 Hz input signal, peak output voltage

    Vp= 10 V, load resistance R= 10 k and input ripple voltage Vr = 0.2 V, is

    (a) 22.7 F (b) 33.3 F(c) 41.7 F (d) 83.4 F

    Ans.Ans.Ans.Ans.Ans. (c)(c)(c)(c)(c)

    IDC

    = =

    Vr

    =

    I

    C=

    = =

    I

    10.10.10.10.10. A full wave rectifier connected to the output terminals of the mains transformer produces

    an RMS voltage of 18 V across the secondary. The no-load voltage across the secondary

    of the transformer is

    (a) 1.62 V (b) 16.2 V

    (c) 61.2 V (d) 6.12 V

    Ans.Ans.Ans.Ans.Ans. (b)(b)(b)(b)(b)

    VRMS =

    =

    Vm=

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    Batches MADE EASY offers rank improvement batches for ESE 2017 & GATE 2017. These batches are designed for repeater students who havealready taken regular classroom coaching or prepared themselves and already attempted GATE/ESE Exams , but want to give next attempt

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    Corporate Office: 44-A/1, Kalu Sarai, New Delhi-16 | Email : [email protected] | Visit: www.madeeasy.in

    ESE-2016 : Electronics Engg.Solutions of Objective Paper-II | Set-A

    1 2 3 4 5 6 7 8 9 0

    1 2 3 4 5 6 7 8 9 0

    1 2 3 4 5 6 7 8 9 0

    1 2 3 4 5 6 7 8 9 0

    1 2 3 4 5 6 7 8 9 0

    1 2 3 4 5 6 7 8 9 0

    1 2 3 4 5 6 7 8 9 0

    1 2 3 4 5 6 7 8 9 0

    1 2 3 4 5 6 7 8 9 0

    1 2 3 4 5 6 7 8 9 0

    1 2 3 4 5 6 7 8 9 0

    1 2 3 4 5 6 7 8 9 0

    1 2 3 4 5 6 7 8 9 0

    Page6

    VDCNL

    =

    = =

    11.11.11.11.11. An Op-Amp can be connected to provide

    1. Voltage controlled current source

    2. Current controlled voltage source

    3. Current controlled current source Which of the above statements are correct?

    (a) 1 and 2 only (b) 1 and 3 only

    (c) 2 and 3 only (d) 1, 2 and 3

    Ans.Ans.Ans.Ans.Ans. (a)(a)(a)(a)(a)

    12.12.12.12.12. In an Op-Amp, if the feedback voltage is reduced by connecting a voltage divider at

    the output, which of the following will happen?

    1. Input impedance increases

    2. Output impedance reduces

    3. Overall gain increases

    Which of the above statements is/are correct?

    (a) 1 only (b) 2 only

    (c) 3 only (d) 1, 2 and 3

    Ans.Ans.Ans.Ans.Ans. (c)(c)(c)(c)(c)

    If feedback voltage is reduced then overall gain increases.

    13.13.13.13.13. The transient response rise time (unity gain) of an Op-Amp is 0.05 s. The small signal

    bandwidth is

    (a) 7 kHz (b) 20 kHz

    (c) 7 MHz (d) 20 MHz

    Ans.Ans.Ans.Ans.Ans. (c)(c)(c)(c)(c)

    Bandwidth =

    =

    14.14.14.14.14. A negative feedback of = 2.5 x 103is applied to an amplifier of open-loop gain 1000.What is the change in overall gain of the feedback amplifier, if the gain of the internal

    amplifier is reduced by 20%?

    (a) 295.7 (b) 286.7

    (c) 275.7 (d) 266.7

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    Corporate Office: 44-A/1, Kalu Sarai, New Delhi-16 | Email : [email protected] | Visit: www.madeeasy.in

    ESE-2016 : Electronics Engg.Solutions of Objective Paper-II | Set-A

    1 2 3 4 5 6 7 8 9 0

    1 2 3 4 5 6 7 8 9 0

    1 2 3 4 5 6 7 8 9 0

    1 2 3 4 5 6 7 8 9 0

    1 2 3 4 5 6 7 8 9 0

    1 2 3 4 5 6 7 8 9 0

    1 2 3 4 5 6 7 8 9 0

    1 2 3 4 5 6 7 8 9 0

    1 2 3 4 5 6 7 8 9 0

    1 2 3 4 5 6 7 8 9 0

    1 2 3 4 5 6 7 8 9 0

    1 2 3 4 5 6 7 8 9 0

    1 2 3 4 5 6 7 8 9 0

    Page7

    Ans.Ans.Ans.Ans.Ans. (d)(d)(d)(d)(d)

    A = 0.8 1000 = 800

    New overall gain, Af =

    +

    Af =

    =

    +

    15.15.15.15.15. If the quality factor of a single-stage single-tuned amplifier is doubled, the bandwidth

    will

    (a) Remain the same (b) Become half

    (c) Become double (d) Become four times

    Ans.Ans.Ans.Ans.Ans. (b)(b)(b)(b)(b)

    Bandwidth =

    Bandwidth becomes half.

    16.16.16.16.16. Consider the following statements related to oscillator circuits :

    1. The tank circuit of a Hartley oscillator is made up of a tapped capacitor and a common

    inductor.

    2. The tank circuit of a Colpitts oscillator is made up of a tapped capacitor and a

    common oscillator.

    3. The Wien Bridge oscillator is essentially a two-stage amplifier with an RC bridge

    in the first stage, and, the second stage serving as an inverter.

    4. Crystal oscillators are fixed frequency oscillators with a high Q-factor.

    Which of the above statements are correct?

    (a) 1, 2 and 3 only (b) 2, 3 and 4 only

    (c) 1, 2 and 4 only (d) 1,3 and 4 only

    Ans.Ans.Ans.Ans.Ans. (b)(b)(b)(b)(b)

    17.17.17.17.17. The most commonly used transistor configuration for use as a switching device is

    (a) Common-base configuration

    (b) Common-collector configuration

    (c) Collector-emitter shorted configuration

    (d) Common-emitter configuration

    Ans.Ans.Ans.Ans.Ans. (d)(d)(d)(d)(d)

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    Corporate Office: 44-A/1, Kalu Sarai, New Delhi-16 | Email : [email protected] | Visit: www.madeeasy.in

    ESE-2016 : Electronics Engg.Solutions of Objective Paper-II | Set-A

    1 2 3 4 5 6 7 8 9 0

    1 2 3 4 5 6 7 8 9 0

    1 2 3 4 5 6 7 8 9 0

    1 2 3 4 5 6 7 8 9 0

    1 2 3 4 5 6 7 8 9 0

    1 2 3 4 5 6 7 8 9 0

    1 2 3 4 5 6 7 8 9 0

    1 2 3 4 5 6 7 8 9 0

    1 2 3 4 5 6 7 8 9 0

    1 2 3 4 5 6 7 8 9 0

    1 2 3 4 5 6 7 8 9 0

    1 2 3 4 5 6 7 8 9 0

    1 2 3 4 5 6 7 8 9 0

    Page8

    18.18.18.18.18. The value of hFE(the hybrid parameters) of a Common-Emitter (CE) connection of a Bipolar

    Junction Transistor (BJT) is given as 250. What is the value of dc(ratio of collector currentto emitter current), for this BJT?

    (a) 0.436 (b) 0.656

    (c) 0.874 (d) 0.996

    Ans.Ans.Ans.Ans.Ans. (d)(d)(d)(d)(d)

    =

    =

    +

    19.19.19.19.19. For realizing a binary half-subtractor having two inputs Aand B, the correct set of logical

    expressions for the outputs D (Aminus B) and X (borrow) are

    1. The difference output D=

    +2. The borrow output B=

    Which of the above statements is/are correct?

    (a) 1 only (b) 2 only

    (c) Both 1 and 2 (d) Neither 1 nor 2

    Ans.Ans.Ans.Ans.Ans. (a)(a)(a)(a)(a)

    The truth table of Half subtractor is shown below

    Difference = +

    Borrow =

    20.20.20.20.20. The simplified form of the Boolean expression AB + A(B + C) + B(B+ C) is given

    by

    (a) AB + AC (b) B + AC

    (c) BC + AC (d) AB + C

    Ans.Ans.Ans.Ans.Ans. (b)(b)(b)(b)(b)

    f=AB + A(B + C) + B(B + C)

    =AB + AB + AC + BB + BC

    =AB + AC + B + BC

    =AB + AC + B (1 + C)

    =AB + AC + B

    = B (A + 1) + AC

    =B + AC

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    ESE-2016 : Electronics Engg.Solutions of Objective Paper-II | Set-A

    1 2 3 4 5 6 7 8 9 0

    1 2 3 4 5 6 7 8 9 0

    1 2 3 4 5 6 7 8 9 0

    1 2 3 4 5 6 7 8 9 0

    1 2 3 4 5 6 7 8 9 0

    1 2 3 4 5 6 7 8 9 0

    1 2 3 4 5 6 7 8 9 0

    1 2 3 4 5 6 7 8 9 0

    1 2 3 4 5 6 7 8 9 0

    1 2 3 4 5 6 7 8 9 0

    1 2 3 4 5 6 7 8 9 0

    1 2 3 4 5 6 7 8 9 0

    1 2 3 4 5 6 7 8 9 0

    Page9

    21.21.21.21.21. Product of Maxterms representation for the Boolean function = + + is(a) M (1, 3, 5, 7) (b) M (0, 2, 4, 6)

    (c) M (0,1, 2, 3) (d) M (4, 5, 6, 7)Ans.Ans.Ans.Ans.Ans. (b)(b)(b)(b)(b)

    F= + +

    13

    5 7 61 1

    11

    BD

    BD BD BD BD

    A

    A

    A

    0

    4

    2

    F=m(1, 3, 5, 7)Converting the function from Minterms form to Maxterms form,

    F=

    M(0, 2, 4, 6)

    22.22.22.22.22. Simplified form of the Boolean expression = + + + is

    (a) + + + (b) + + + +

    (c) + + (d) A (B+ C)

    Ans.Ans.Ans.Ans.Ans. (b)(b)(b)(b)(b)

    Y= + + +

    = + + + +

    = + + = + + +

    =m(1, 2, 3, 4, 5, 6)=M(0, 7)

    = (A + B + C) + +

    23.23.23.23.23. What is the maximum frequency for a sine wave output voltage of 10 V peak with an

    Op-Amp whose slew rate is 1 V/s?

    (a) 15.92 kHz (b) 19.73 kHz(c) 23.54 kHz (d) 27.336 kHz

    Ans.Ans.Ans.Ans.Ans. (a)(a)(a)(a)(a)

    fo

    fo

    fo 15.92 kHz

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    ESE-2016 : Electronics Engg.Solutions of Objective Paper-II | Set-A

    1 2 3 4 5 6 7 8 9 0

    1 2 3 4 5 6 7 8 9 0

    1 2 3 4 5 6 7 8 9 0

    1 2 3 4 5 6 7 8 9 0

    1 2 3 4 5 6 7 8 9 0

    1 2 3 4 5 6 7 8 9 0

    1 2 3 4 5 6 7 8 9 0

    1 2 3 4 5 6 7 8 9 0

    1 2 3 4 5 6 7 8 9 0

    1 2 3 4 5 6 7 8 9 0

    1 2 3 4 5 6 7 8 9 0

    1 2 3 4 5 6 7 8 9 0

    1 2 3 4 5 6 7 8 9 0

    Page10

    24.24.24.24.24. Which one of the following statements is correct?

    (a) TTL logic cannot be used in digital circuits.

    (b) Digital circuits are linear circuits.

    (c) AND gate is a logic circuit whose output is equal to its highest input.

    (d) In a four-input AND circuit, all inputs must be high for the output to be high.

    Ans.Ans.Ans.Ans.Ans. (d)(d)(d)(d)(d)

    In an AND gate, the output is high only when all inputs are high.

    25.25.25.25.25. The slew rate is the rate of change of output. voltage of an operational amplifier when

    a particular input is applied. What is that input?

    (a) Sine wave input (b) Ramp input

    (c) Pulse input (d) Step input

    Ans.Ans.Ans.Ans.Ans. (d)(d)(d)(d)(d)

    Slew rate of op-amp in measured by applying step input.

    26.26.26.26.26. Except at high frequencies of switching, nearly all the power dissipated in the switch

    mode operation of a BJT occurs, when the transistor is in the

    (a) Active region (b) Blocking state

    (c) Hard saturation region (d) Soft saturation region

    Ans.Ans.Ans.Ans.Ans. (d)(d)(d)(d)(d)

    27.27.27.27.27. Consider the following statements with respect to combinational circuit:

    1. The output at any time depends only on the present combination of inputs.

    2. It does not employ storage elements.

    3. It performs an operation that can be specified logically by a set of Boolean functions.

    Which of the above statements are correct?

    (a) 1 and 2 only (b) 1 and 3 only

    (c) 2 and 3 only (d) 1, 2 and 3

    Ans.Ans.Ans.Ans.Ans. (d)(d)(d)(d)(d)

    A

    CombiB

    C

    f

    g

    It has no storage present output depends only on present input.

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    ESE-2016 : Electronics Engg.Solutions of Objective Paper-II | Set-A

    1 2 3 4 5 6 7 8 9 0

    1 2 3 4 5 6 7 8 9 0

    1 2 3 4 5 6 7 8 9 0

    1 2 3 4 5 6 7 8 9 0

    1 2 3 4 5 6 7 8 9 0

    1 2 3 4 5 6 7 8 9 0

    1 2 3 4 5 6 7 8 9 0

    1 2 3 4 5 6 7 8 9 0

    1 2 3 4 5 6 7 8 9 0

    1 2 3 4 5 6 7 8 9 0

    1 2 3 4 5 6 7 8 9 0

    1 2 3 4 5 6 7 8 9 0

    1 2 3 4 5 6 7 8 9 0

    Page11

    28.28.28.28.28. Consider the following statements : A multiplexer

    1. selects one of the several inputs and transmits it to a single output.

    2. routes the data from a single input to one of many outputs.

    3. converts parallel data into serial data.

    4. is a combinational circuit.

    Which of the above statements are correct?

    (a) 1 and 3 only (b) 2 and 4 only

    (c) 1,3 and 4 only (d) 2, 3 and 4 only

    Ans.Ans.Ans.Ans.Ans. (c)(c)(c)(c)(c)

    Data is routed from a single input to one of many outputs in a demultiplexer and not

    in a multiplexer.

    29.29.29.29.29. What are the two types of basic adder circuits?

    (a) Half adder and full adder

    (b) Half adder and parallel adder

    (c) Asynchronous adder and synchronous adder

    (d) One's complement adder and two's complement adder

    Ans.Ans.Ans.Ans.Ans. (a)(a)(a)(a)(a)

    A half adder adds 2 bits.

    A full adder adds 3 bits.

    These are the two types of basic adder circuits.

    30.30.30.30.30. Consider the following statements :

    1. An 8-input MUX can be used to implement any 4 variable functions.

    2. A 3-line to 8-line DEMUX can be used to implement any 4 variable functions.

    3. A 64-input MUX can be built using nine 8-input MUXs.

    4. A 6-line to 64-line DEMUX can be built using nine 3-line to 8-line DEMUXs.

    Which of the above statements are correct?

    (a) 1, 2, 3 and 4 (b) 1, 2 and 4 only

    (c) 3 and 4 only (d) 1, 2 and 3 only

    Ans.Ans.Ans.Ans.Ans. (c)(c)(c)(c)(c)

    An 8-input MUX can implement only some functions of 4 variables and not all functions

    of 4 variables.

    31.31.31.31.31. For ann-bit binary adder, what is the number of gates through which a carry has to

    propagate from input to output?

    (a) n (b) 2n

    (c) n2 (d) n + 1

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    ESE-2016 : Electronics Engg.Solutions of Objective Paper-II | Set-A

    1 2 3 4 5 6 7 8 9 0

    1 2 3 4 5 6 7 8 9 0

    1 2 3 4 5 6 7 8 9 0

    1 2 3 4 5 6 7 8 9 0

    1 2 3 4 5 6 7 8 9 0

    1 2 3 4 5 6 7 8 9 0

    1 2 3 4 5 6 7 8 9 0

    1 2 3 4 5 6 7 8 9 0

    1 2 3 4 5 6 7 8 9 0

    1 2 3 4 5 6 7 8 9 0

    1 2 3 4 5 6 7 8 9 0

    1 2 3 4 5 6 7 8 9 0

    1 2 3 4 5 6 7 8 9 0

    Page12

    Ans.Ans.Ans.Ans.Ans. (b)(b)(b)(b)(b)

    In a single adder, the carry propagates through 2 gates.

    in an n-bit binary adder, the carry would propagate through 2n gates.

    32.32.32.32.32. The main disadvantage of DTL logic circuits is

    (a) Medium speed (b) Very large power supply voltage

    (c) High cost (d) Very large gate propagation delay

    Ans.Ans.Ans.Ans.Ans. (d)(d)(d)(d)(d)

    The propagation delay of DTL logic circuits is about 30 ns, which is relatively quite large.

    33.33.33.33.33. Which one of the following statements best describes the operation of a negative-edge-triggered D flip-flop?

    (a) The logic level at the Dinput is transferred to Qon NGT of CLK.

    (b) The Qoutput is always identical to the CLK input if the D input is high.

    (c) The Qoutput is always identical to the D input when CLK = PGT.

    (d) The Qoutput is always identical to the D input.

    Ans.Ans.Ans.Ans.Ans. (a)(a)(a)(a)(a)

    D QInput

    clk

    Q+ =D

    The logic level at the D input is transferred at negative edge.

    D

    Q

    34.34.34.34.34. A 3-bit ripple counter is constructed using three Tflip-flops to do the binary counting.

    The three flip-flops have T-inputs fixed at

    (a) 0, 0 and 1 (b) 1, 0 and 1

    (c) 0, 1 and 1 (d) 1, 1 and 1

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    ESE-2016 : Electronics Engg.Solutions of Objective Paper-II | Set-A

    1 2 3 4 5 6 7 8 9 0

    1 2 3 4 5 6 7 8 9 0

    1 2 3 4 5 6 7 8 9 0

    1 2 3 4 5 6 7 8 9 0

    1 2 3 4 5 6 7 8 9 0

    1 2 3 4 5 6 7 8 9 0

    1 2 3 4 5 6 7 8 9 0

    1 2 3 4 5 6 7 8 9 0

    1 2 3 4 5 6 7 8 9 0

    1 2 3 4 5 6 7 8 9 0

    1 2 3 4 5 6 7 8 9 0

    1 2 3 4 5 6 7 8 9 0

    1 2 3 4 5 6 7 8 9 0

    Page13

    Ans.Ans.Ans.Ans.Ans. (d)(d)(d)(d)(d)

    In a ripple counter, the T inputs of all T flip flops are always applied logic 1.

    35.35.35.35.35. What is the function Y= A+ in Product-of-Sums (POS) form?

    (a) M6 M5 M4 M3 (b) M3M2M4 M0(c) M0M2 M3 (d) M4M3M2 M1

    Ans.Ans.Ans.Ans.Ans. (c)(c)(c)(c)(c)

    Y= +

    the function is plotted on K map below,

    01

    3 2

    4 5 7 61 1

    1

    BC

    BC BC BC BC A

    A

    A

    1 1

    Y=m(1, 4, 5, 6, 7)Converting the function from SOP to POS form

    Y=M(0, 2, 3)=M

    0 M

    2 M

    3

    36.36.36.36.36. The initial content of a four-bit shift register is 1000. What is the register content after

    it is shifted four times to the right, with the serial input being 111100?(a) 1111 (b) 1100

    (c) 1000 (d) 0011

    Ans.Ans.Ans.Ans.Ans. (b)(b)(b)(b)(b)

    1 1 1 1

    0

    0

    1

    1

    1 0

    1

    0

    0

    1

    0 0

    0

    1

    0

    0

    0 0

    0

    0

    1

    0

    37.37.37.37.37. When a large number of analog signals is to be converted to digital form, an analog

    multiplexer is used. The A-to-D converter most suitable in this case will be

    (a) Forward counter type (b) Up-down counter type

    (c) Successive approximation type (d) Dual slope type

    Ans.Ans.Ans.Ans.Ans. (c)(c)(c)(c)(c)

    Conversion time of successive approximation ADC is less than up counter type, up-

    down counter and dual slope ADC.

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    ESE-2016 : Electronics Engg.Solutions of Objective Paper-II | Set-A

    1 2 3 4 5 6 7 8 9 0

    1 2 3 4 5 6 7 8 9 0

    1 2 3 4 5 6 7 8 9 0

    1 2 3 4 5 6 7 8 9 0

    1 2 3 4 5 6 7 8 9 0

    1 2 3 4 5 6 7 8 9 0

    1 2 3 4 5 6 7 8 9 0

    1 2 3 4 5 6 7 8 9 0

    1 2 3 4 5 6 7 8 9 0

    1 2 3 4 5 6 7 8 9 0

    1 2 3 4 5 6 7 8 9 0

    1 2 3 4 5 6 7 8 9 0

    1 2 3 4 5 6 7 8 9 0

    Page14

    38.38.38.38.38. For Emitter-Coupled Logic (ECL), the switching speed is very high because

    (a) Negative logic is used

    (b) The transistors are not saturated when they are conducting

    (c) Multi-emitter transistors are used

    (d) Of low fan-out

    Ans.Ans.Ans.Ans.Ans. (b)(b)(b)(b)(b)

    In ECL, the transistors operate only in Active and Cut off regions.

    39.39.39.39.39. A flip-flop is a

    (a) Combinational logic circuit and edge sensitive

    (b) Sequential logic circuit and edge sensitive

    (c) Combinational logic circuit and level sensitive

    (d) Sequential logic circuit and level sensitive

    Ans.Ans.Ans.Ans.Ans. (b)(b)(b)(b)(b)

    Flip-flop is sequential and edge triggered.

    40.40.40.40.40. The transfer function

    +will have

    (a) dc gain 1 and high frequency gain 1

    (b) dc gain 0 and high frequency gain (c) dc gain 1 and high frequency gain 0

    (d) dc gain 0 and high frequency gain 1

    Ans.Ans.Ans.Ans.Ans. (c)(c)(c)(c)(c)

    T F=

    +

    M=

    +

    M at = 0 is 1 and at = is 0.

    41.41.41.41.41. The closed-loop transfer function of a certain control system is given by

    =

    + +. Then the settling time for a 2% tolerance band is given by

    (a) 0.8 s (b) 1.2 s

    (c) 1.5 s (d) 2.1 s

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    ESE-2016 : Electronics Engg.Solutions of Objective Paper-II | Set-A

    1 2 3 4 5 6 7 8 9 0

    1 2 3 4 5 6 7 8 9 0

    1 2 3 4 5 6 7 8 9 0

    1 2 3 4 5 6 7 8 9 0

    1 2 3 4 5 6 7 8 9 0

    1 2 3 4 5 6 7 8 9 0

    1 2 3 4 5 6 7 8 9 0

    1 2 3 4 5 6 7 8 9 0

    1 2 3 4 5 6 7 8 9 0

    1 2 3 4 5 6 7 8 9 0

    1 2 3 4 5 6 7 8 9 0

    1 2 3 4 5 6 7 8 9 0

    1 2 3 4 5 6 7 8 9 0

    Page15

    Ans.Ans.Ans.Ans.Ans. (a)(a)(a)(a)(a)

    T F=

    + +2n= 10 n= 5

    ts (2%) =

    = =

    42.42.42.42.42. The unit step input response of a certain control system is given by

    c(t) = 1 + 0.2 e60t 1.2 e10t. Then the undamped natural frequency nand damping

    ratio are, respectively

    (a) 24.5 and 1.27 (b) 33.5 and 1.27(c) 24.5 and 1.43 (d) 33.5 and 1.43

    Ans.Ans.Ans.Ans.Ans. (c)(c)(c)(c)(c)

    SR= 1 + 0.2 e60t 1.2 e10t

    From SR the poles are at 10, 60

    Hence q(s) = (S+ 10) (S + 60) = 0

    q(s) =S2 + 70S + 600 = 0

    Wn=

    2n

    = 70

    = 1.43

    43.43.43.43.43. In Force-Voltage Analogy

    (a) Force is analogous to current

    (b) Mass is analogous to capacitance

    (c) Velocity is analogous to current

    (d) Displacement is analogous to magnetic flux linkage

    Ans.Ans.Ans.Ans.Ans. (c)(c)(c)(c)(c)

    As per theory of analogy velocity is analogous to current.

    44.44.44.44.44. For a unity feedback control system having an open-loop transfer function

    =+

    ,

    what is the time tp at which the peak of the step input response occurs?

    (a) 0.52 s (b) 2.75 s

    (c) 0.79 s (d) 1.57 s

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    ESE-2016 : Electronics Engg.Solutions of Objective Paper-II | Set-A

    1 2 3 4 5 6 7 8 9 0

    1 2 3 4 5 6 7 8 9 0

    1 2 3 4 5 6 7 8 9 0

    1 2 3 4 5 6 7 8 9 0

    1 2 3 4 5 6 7 8 9 0

    1 2 3 4 5 6 7 8 9 0

    1 2 3 4 5 6 7 8 9 0

    1 2 3 4 5 6 7 8 9 0

    1 2 3 4 5 6 7 8 9 0

    1 2 3 4 5 6 7 8 9 0

    1 2 3 4 5 6 7 8 9 0

    1 2 3 4 5 6 7 8 9 0

    1 2 3 4 5 6 7 8 9 0

    Page16

    Ans.Ans.Ans.Ans.Ans. (c)(c)(c)(c)(c)

    GH(s) =

    +

    q(s) = 1 + GH(s) = S2 + 6S + 25 = 0

    n= 5 ; = 0.6 d= 4

    tp=

    =

    45.45.45.45.45. The transfer function

    =

    + represents

    (a) Unstable system (b) Minimum phase system

    (c) Non-minimum phase system (d) PID controller system

    Ans.Ans.Ans.Ans.Ans. (c)(c)(c)(c)(c)

    GH(s) =

    +

    If a system has at least a zero (or) a pole in right side of Splane then it is called Non-

    minimum phase system.

    46.46.46.46.46. What is the maximum input frequency limit of a 3-bit Ripple counter configured aroundflip-flops, with inherent propagation delay time tpd= 50 ns?

    (a) 6670 MHz (b) 667 MHz

    (c) 66.7 MHz (d) 6.67 MHz

    Ans.Ans.Ans.Ans.Ans. (d)(d)(d)(d)(d)

    fCLK =

    = =

    47.47.47.47.47. The characteristic equation of a certain feedback control system is given by

    s4+ 4s3+ 13s2+ 36s + k= 0. The range of values of k for which the feedback system

    is stable, is given by

    (a) 0

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    ESE-2016 : Electronics Engg.Solutions of Objective Paper-II | Set-A

    1 2 3 4 5 6 7 8 9 0

    1 2 3 4 5 6 7 8 9 0

    1 2 3 4 5 6 7 8 9 0

    1 2 3 4 5 6 7 8 9 0

    1 2 3 4 5 6 7 8 9 0

    1 2 3 4 5 6 7 8 9 0

    1 2 3 4 5 6 7 8 9 0

    1 2 3 4 5 6 7 8 9 0

    1 2 3 4 5 6 7 8 9 0

    1 2 3 4 5 6 7 8 9 0

    1 2 3 4 5 6 7 8 9 0

    1 2 3 4 5 6 7 8 9 0

    1 2 3 4 5 6 7 8 9 0

    Page17

    Ans.Ans.Ans.Ans.Ans. (c)(c)(c)(c)(c)

    q(s) =s4 + 4s3 + 13S2 + 36S + K = 0

    For stability K > 0 and K < 36

    0 < K < 36

    48.48.48.48.48. The closed-loop transfer function of a unity feedback control system is,

    =

    + + . The velocity error constant of the system is

    (a)

    (b)

    (c)

    (d)

    Ans.Ans.Ans.Ans.Ans. (a)(a)(a)(a)(a)

    T F=

    + +

    OLTFGH(s) =

    +

    Velocity error constant =Kv =

    Kv=

    =

    +

    49.49.49.49.49. The system described by the following state equations

    [ ]

    = + =

    1. Completely controllable

    2. Completely observable

    Which of the above statements is/are correct?

    (a) 1 only (b) 2 only

    (c) Both 1 and 2 (d) Neither 1 nor 2

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    ESE-2016 : Electronics Engg.Solutions of Objective Paper-II | Set-A

    1 2 3 4 5 6 7 8 9 0

    1 2 3 4 5 6 7 8 9 0

    1 2 3 4 5 6 7 8 9 0

    1 2 3 4 5 6 7 8 9 0

    1 2 3 4 5 6 7 8 9 0

    1 2 3 4 5 6 7 8 9 0

    1 2 3 4 5 6 7 8 9 0

    1 2 3 4 5 6 7 8 9 0

    1 2 3 4 5 6 7 8 9 0

    1 2 3 4 5 6 7 8 9 0

    1 2 3 4 5 6 7 8 9 0

    1 2 3 4 5 6 7 8 9 0

    1 2 3 4 5 6 7 8 9 0

    Page18

    Ans.Ans.Ans.Ans.Ans. (c)(c)(c)(c)(c)

    =

    +

    Y= [ ]

    QC=

    [ ]

    = =

    For controllability 0

    Q0 =

    =

    = 4 0

    For observability 0

    50.50.50.50.50. Consider the system with

    +=

    + +and H(s) = 1. The breakaway point(s) of

    the root loci is/are at

    (a) 0.265 only (b) 3.735 only

    (c) 3.735 and 0.265 (d) There is no breakaway point

    Ans.Ans.Ans.Ans.Ans. (b)(b)(b)(b)(b)

    GH(s) =

    ++ +

    Breakaway point is solution of

    that lies on root locus.

    Solution of

    are

    = 3.73 lies on root locus

    51.51.51.51.51. How would a binary number 0010 be represented by a 4-bit binary word, if the range

    of voltage is 0 to 10 V?

    (a) 0.666 V (b) 1.333 V

    (c) 0.333 V (d) 2000 V

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    ESE-2016 : Electronics Engg.Solutions of Objective Paper-II | Set-A

    1 2 3 4 5 6 7 8 9 0

    1 2 3 4 5 6 7 8 9 0

    1 2 3 4 5 6 7 8 9 0

    1 2 3 4 5 6 7 8 9 0

    1 2 3 4 5 6 7 8 9 0

    1 2 3 4 5 6 7 8 9 0

    1 2 3 4 5 6 7 8 9 0

    1 2 3 4 5 6 7 8 9 0

    1 2 3 4 5 6 7 8 9 0

    1 2 3 4 5 6 7 8 9 0

    1 2 3 4 5 6 7 8 9 0

    1 2 3 4 5 6 7 8 9 0

    1 2 3 4 5 6 7 8 9 0

    Page19

    Ans.Ans.Ans.Ans.Ans. (b)(b)(b)(b)(b)

    VFS= 10 V

    n= 40010 D = 2

    R=

    = =

    Analog output =R D= 0.66667 2= 1.333 volts

    52.52.52.52.52. For a unity feedback system with open-loop transfer function

    +, the resonant peak

    at output Mmand the corresponding resonant frequency m, are respectively(a) 2.6 and 2.67 r/s (b) 1.04 and 2.67 r/s

    (c) 2.6 and 4.8 r/s (d) 1.04 and 4.8 r/s

    Ans.Ans.Ans.Ans.Ans. (b)(b)(b)(b)(b)

    GH(s) =

    +

    q(s) = 1 + GH(s) = s2 + 6s + 25 = 0

    n= 5 : = 0.6

    Wr = =

    Mr

    =

    =

    53.53.53.53.53. The transfer function of a control system is said to be All Pass System, if it has

    (a) Unit magnitude at all frequencies with anti-symmetric pole-zero pattern

    (b) Unit magnitude at all frequencies with symmetric pole-zero pattern

    (c) Magnitude varying with frequency and with anti-symmetric pole-zero pattern

    (d) Unit magnitude at some frequencies with symmetric pole-zero pattern

    Ans.Ans.Ans.Ans.Ans. (b)(b)(b)(b)(b)

    All pass system has constant magnitude response for all frequencies. This can happen

    only if poles and zeros are symmetric w.r.t. j-axis.

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    ESE-2016 : Electronics Engg.Solutions of Objective Paper-II | Set-A

    1 2 3 4 5 6 7 8 9 0

    1 2 3 4 5 6 7 8 9 0

    1 2 3 4 5 6 7 8 9 0

    1 2 3 4 5 6 7 8 9 0

    1 2 3 4 5 6 7 8 9 0

    1 2 3 4 5 6 7 8 9 0

    1 2 3 4 5 6 7 8 9 0

    1 2 3 4 5 6 7 8 9 0

    1 2 3 4 5 6 7 8 9 0

    1 2 3 4 5 6 7 8 9 0

    1 2 3 4 5 6 7 8 9 0

    1 2 3 4 5 6 7 8 9 0

    1 2 3 4 5 6 7 8 9 0

    Page20

    54.54.54.54.54. Consider the following:

    1. Bode plot 2. Nyquist plot 3. Nichols chart

    Which of the above frequency response plots are commonly employed in the analysisof control systems?

    (a) 1 and 2 only (b) 1 and 3 only

    (c) 2 and 3 only (d) 1, 2 and 3

    Ans.Ans.Ans.Ans.Ans. (d)(d)(d)(d)(d)

    All the mentioned plots are popular and commonly used in control analysis.

    55.55.55.55.55. An A-to-D converter in which one sub-circuit is a D-to-A converter is

    (a) Parallel A/D converter

    (b) Dual slope A/D converter

    (c) Successive approximation A/D converter

    (d) Extended parallel type A/D converter

    Ans.Ans.Ans.Ans.Ans. (c)(c)(c)(c)(c)

    Successive approximation ADC

    +

    Controlcircuit

    SAR

    DAC

    Start EOC

    Va

    56.56.56.56.56. Consider the transfer function :

    + +=

    + +The corner frequencies in Bode's plot for this transfer function are as

    (a) 10 r/s and 10 r/s (b) 100 r/s and 10 r/s

    (c) 10 r/s and 1 r/s (d) 100 r/s and 1 r/s

    Ans.Ans.Ans.Ans.Ans. (c)(c)(c)(c)(c)

    GH(s) =

    ++ +

    Corner frequency in Bode plot is defined for finite poles and zeros, which are complex

    in given system.

    For complex pole, zeros corner frequency.

    Hence 10, 1.

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    ESE-2016 : Electronics Engg.Solutions of Objective Paper-II | Set-A

    1 2 3 4 5 6 7 8 9 0

    1 2 3 4 5 6 7 8 9 0

    1 2 3 4 5 6 7 8 9 0

    1 2 3 4 5 6 7 8 9 0

    1 2 3 4 5 6 7 8 9 0

    1 2 3 4 5 6 7 8 9 0

    1 2 3 4 5 6 7 8 9 0

    1 2 3 4 5 6 7 8 9 0

    1 2 3 4 5 6 7 8 9 0

    1 2 3 4 5 6 7 8 9 0

    1 2 3 4 5 6 7 8 9 0

    1 2 3 4 5 6 7 8 9 0

    1 2 3 4 5 6 7 8 9 0

    Page21

    57.57.57.57.57. Consider the transfer function (0.1 + 0.1s) for a PD controller. What is the frequency at

    which the magnitude is 20 dB (by using asymptotic Bodes plot)?

    (a) 2000 r/s (b) 1000 r/s

    (c) 200 r/s (d) 100 r/s

    Ans.Ans.Ans.Ans.Ans. (b)(b)(b)(b)(b)

    GH(s) = [0.1 + 0.01s] = 0.1 [1 + 0.1s]

    Bode plot is

    20 dB

    0 dB

    20 dB

    1 10 100 1000

    +20 dB

    decade

    58.58.58.58.58. The main objectives of drawing the root-locus plot are

    1. To obtain a clear picture of the open-loop poles and zeros of the system.

    2. To obtain a clear picture of the transient response of the system for varying gain, K.

    3. To find the range of K to make the system stable.

    Which of the above statements are correct?

    (a) 1, 2 and 3 (b) 1 and 2 only

    (c) 1 and 3 only (d) 2 and 3 only

    Ans.Ans.Ans.Ans.Ans. (d)(d)(d)(d)(d)

    Root locus obtained mainly to obtain response and stability of system.

    59.59.59.59.59. A unity feedback system has open-loop poles at s= 2 j2, s= 1 and s= 0 and a

    zero at s= 3. What are the angles made by the root-loci asymptotes with the real axis?

    (a) 60, 180 and 60 (b) 30, 90 and 60

    (c) 60, 120 and 30 (d) 30, 60 and 180

    Ans.Ans.Ans.Ans.Ans. (a)(a)(a)(a)(a)

    Total number of poles = 4

    Total number of zeros = 1

    Angles of asymptotes =

    +

    K= 0, 1, 2

    Angles = 60, 180, 300 (or) 60

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    ESE-2016 : Electronics Engg.Solutions of Objective Paper-II | Set-A

    1 2 3 4 5 6 7 8 9 0

    1 2 3 4 5 6 7 8 9 0

    1 2 3 4 5 6 7 8 9 0

    1 2 3 4 5 6 7 8 9 0

    1 2 3 4 5 6 7 8 9 0

    1 2 3 4 5 6 7 8 9 0

    1 2 3 4 5 6 7 8 9 0

    1 2 3 4 5 6 7 8 9 0

    1 2 3 4 5 6 7 8 9 0

    1 2 3 4 5 6 7 8 9 0

    1 2 3 4 5 6 7 8 9 0

    1 2 3 4 5 6 7 8 9 0

    1 2 3 4 5 6 7 8 9 0

    Page22

    60.60.60.60.60. The open-loop transfer function of a unity feedback system is

    =

    +. The

    gain K that results in a phase margin of 45 is(a) 35 (b) 30

    (c) 25 (d) 20

    Ans.Ans.Ans.Ans.Ans. (a)(a)(a)(a)(a)

    GH(s) =

    +q(s) = 1 + GH(s) = S2 + 5S + K= 0

    n= ; =

    PM = 100 =

    = K 35

    61.61.61.61.61. Consider the following statements :

    The Gain margin and Phase margin of an unstable system may respectively be

    1. Positive, negative 2. Negative, positive 3. Negative, negative

    Which of the above statements is/are correct?

    (a) 3 only (b) 1 and 2 only

    (c) 2 and 3 only (d) 1, 2 and 3

    Ans.Ans.Ans.Ans.Ans. (a)(a)(a)(a)(a)GM and PM of unstable system are always negative

    62.62.62.62.62. A phase lead compensator has its transfer function,

    +=

    +. The maximum

    phase lead and the corresponding frequency, respectively are nearly

    (a) sin1 (0.9) and 6 r/s (b) sin1(0.82) and 4 r/s

    (c) sin1 (0.9) and 4 r/s (d) sin1(0.82) and 6 r/s

    Ans.Ans.Ans.Ans.Ans. (d)(d)(d)(d)(d)

    Gc(s) =

    ++

    Zero : S= 2; pole : S = 20 ; =

    =

    M= [ ]

    = +

    M= =

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    ESE-2016 : Electronics Engg.Solutions of Objective Paper-II | Set-A

    1 2 3 4 5 6 7 8 9 0

    1 2 3 4 5 6 7 8 9 0

    1 2 3 4 5 6 7 8 9 0

    1 2 3 4 5 6 7 8 9 0

    1 2 3 4 5 6 7 8 9 0

    1 2 3 4 5 6 7 8 9 0

    1 2 3 4 5 6 7 8 9 0

    1 2 3 4 5 6 7 8 9 0

    1 2 3 4 5 6 7 8 9 0

    1 2 3 4 5 6 7 8 9 0

    1 2 3 4 5 6 7 8 9 0

    1 2 3 4 5 6 7 8 9 0

    1 2 3 4 5 6 7 8 9 0

    Page23

    63.63.63.63.63. Consider the following statements :

    1. Lead compensation decreases the bandwidth of the system.

    2. Lag compensation increases the bandwidth of the system.

    Which of the above statements is/are correct?

    (a) 1 only (b) 2 only

    (c) Both 1 and 2 (d) Neither 1 nor 2

    Ans.Ans.Ans.Ans.Ans. (d)(d)(d)(d)(d)

    Lead compensator is high pass filter hence it increases bandwidth Lag compensator

    is low pass filter hence it decreases bandwidth.

    64.64.64.64.64. A proportional controller with transfer function, Kpis used with a first-order system having

    its transfer function as

    =+

    , in unity feedback structure. For step inputs, an

    increase in Kpwill

    (a) Increase the time constant and decrease the steady state error

    (b) Decrease the time constant and decrease the steady state error

    (c) Decrease the time constant and increase the steady state error

    (d) Increase the time constant and increase the steady state error

    Ans.Ans.Ans.Ans.Ans. (b)(b)(b)(b)(b)

    GH(s) =

    =

    +

    CLTF =

    +=

    + + +

    time constant =

    +

    ess =

    If KP is increased then both time constant and essdecreases.

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    ESE-2016 : Electronics Engg.Solutions of Objective Paper-II | Set-A

    1 2 3 4 5 6 7 8 9 0

    1 2 3 4 5 6 7 8 9 0

    1 2 3 4 5 6 7 8 9 0

    1 2 3 4 5 6 7 8 9 0

    1 2 3 4 5 6 7 8 9 0

    1 2 3 4 5 6 7 8 9 0

    1 2 3 4 5 6 7 8 9 0

    1 2 3 4 5 6 7 8 9 0

    1 2 3 4 5 6 7 8 9 0

    1 2 3 4 5 6 7 8 9 0

    1 2 3 4 5 6 7 8 9 0

    1 2 3 4 5 6 7 8 9 0

    1 2 3 4 5 6 7 8 9 0

    Page24

    65.65.65.65.65. For a second-order differential equation, if the damping ratio , is unity, then(a) The poles are imaginary and complex conjugate

    (b) The poles are in the right half of s-plane

    (c) The poles are equal, negative and real

    (d) Both the poles are unequal, negative and real

    Ans.Ans.Ans.Ans.Ans. (c)(c)(c)(c)(c)

    = 1 means critically damped.Hence, roots are real, equal, negative.

    66.66.66.66.66. Consider the following statements associated with microstrip patch antenna :

    1. The microstrip patch behaves more like a leaky cavity rather than like a radiator and

    this is not a highly efficient antenna.

    2. They can be adapted for radiation of circularly polarized waves.

    Which of the above statements is/are correct?

    (a) 1 only (b) 2 only

    (c) Both 1 and 2 (d) Neither 1 nor 2

    Ans.Ans.Ans.Ans.Ans. (c)(c)(c)(c)(c)

    67.67.67.67.67. A carrier waveform 10 cos ctand modulating signal 3 cos mthave fc= 100 kHz andfm

    = 4 kHz. Given that sensitivity of FM is 4 kHz/V and FM spectra beyond J6 is

    negligible, what are the channel bandwidth requirements forAMand FM, respectively?

    (a) 12 kHz and 48 kHz (b) 8 kHz and 48 kHz

    (c) 12 kHz and 24 kHz (d) 8 kHz and 24 kHz

    Ans.Ans.Ans.Ans.Ans. (b)(b)(b)(b)(b)

    AM BW = 2 fm

    = 8 kHz

    FM BW = 12 fm

    (significant sidebands upto 6th order, so bandwidth 12 fm

    )

    = 48 kHz

    68.68.68.68.68. When the modulating frequency is doubled, the modulation index is halved, and the

    modulating voltage remains constant. The modulation system is

    1. Amplitude modulation

    2. Phase modulation

    3. Frequency modulation

    Select the correct answer from the codes given below :

    (a) 1 only (b) 2 only

    (c) 3 only (d) 1, 2 and 3

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    ESE-2016 : Electronics Engg.Solutions of Objective Paper-II | Set-A

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    Ans.Ans.Ans.Ans.Ans. (c)(c)(c)(c)(c)

    For FM; =

    If modulating frequency doubled, then modulation index is half.

    69.69.69.69.69. What is the modulation index of anFMsignal having a carrier swing of 100 kHz and

    modulating frequency of 8 kHz?

    (a) 4.75 (b) 5.50

    (c) 6.25 (d) 7.50

    Ans.Ans.Ans.Ans.Ans. (c)(c)(c)(c)(c)

    Carrier swing

    2f= 100 kHzf= 50 kHz

    =

    = =

    70.70.70.70.70. In a Pulse Code Modulated system, the number of bits is increased from 7 to 8 bits.

    The improvement in signal to quantization noise ratio will be

    (a) 2 dB (b) 4 dB

    (c) 6 dB (d) 8 dB

    Ans.Ans.Ans.Ans.Ans. (c)(c)(c)(c)(c)

    If k bits increased, then SQNR is increased by 6 k dB.

    if one bit is increased, then SQNR is increased by 6 dB

    71.71.71.71.71. In the process of modulation

    (a) Some characteristics of a high frequency sine wave are varied in accordance with

    the instantaneous value of a low frequency signal

    (b) Parameters of carrier wave are held constant

    (c) For proper and efficient radiation, the receiving antennas should have heights

    comparable to half-wavelength of the signal received

    (d) The signal is converted first within the range of 10 Hz to 20 Hz

    Ans.Ans.Ans.Ans.Ans. (a)(a)(a)(a)(a)

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    ESE-2016 : Electronics Engg.Solutions of Objective Paper-II | Set-A

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    72.72.72.72.72. If the sampling is carried out at a rate higher than twice the highest frequency of the

    original signal (fmax), then it is possible to receive the original signal from the sampled

    signal by passing it through

    (a) A high-pass filter with the cut-off frequency equal to fmax(b) A low-pass filter with the cut-off frequency equal to fmax(c) A high-pass filter with the cut-off frequency greater than fmax(d) A low-pass filter with the cut-off frequency greater than fmax

    Ans.Ans.Ans.Ans.Ans. (b)(b)(b)(b)(b)

    In sampling process with sampling frequency greater than nyquist frequency for

    reconstruction of original signal, LPF is used.

    73.73.73.73.73. The open-loop transfer function of a unity feedback system is

    ++ The

    phase shift at = 0 and = , will be, respectively(a) 90 and 180 (b) 0 and 180

    (c) 90 and 90 (d) 0 and 0

    Ans.Ans.Ans.Ans.Ans. (d)(d)(d)(d)(d)

    GH(s) = [ ]

    ++

    type = 0 ; P Z = 0

    Phase at = 0 is 90 type = 0phase at = is 90 (P Z) = 0

    74.74.74.74.74. The conversion time for a 10-bit successive approximationA/Dconverter, for a clock

    frequency of 1 MHz is

    (a) 1 s (b) 5 s(c) 10 s (d) 15 s

    Ans.Ans.Ans.Ans.Ans. (c)(c)(c)(c)(c)

    fCLK = 1 MHz

    TCLK

    = 1 sIn successive approximation ADC, the conversion time is always constant, and is equal

    to number of bits in ADC. Tconv.

    = 10 1 s = 10 s.

    75.75.75.75.75. The minimum bandwidth of the link needed for a guard band of 10 kHz frequency to

    prevent interference between six channels, each with 100 kHz frequency, is

    (a) 425 kHz (b) 575 kHz

    (c) 650 kHz (d) 725 kHz

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    ESE-2016 : Electronics Engg.Solutions of Objective Paper-II | Set-A

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    Ans.Ans.Ans.Ans.Ans. (c)(c)(c)(c)(c)

    6 signals multiplexed. So 5 guard bands will exist

    BW = 6 100 kHz + 5 10 kHz= 650 kHz

    76.76.76.76.76. The different access methods which permit many satellite users to operate in parallel

    through a single transponder without interfering with each other are

    1. Frequency Division Multiple Access (FDMA)

    2. Time Division Multiple Access (TDMA)

    3. Code Division Multiple Access (CDMA)

    Which of the above are correct?

    (a) 1 and 2 only (b) 1 and 3 only

    (c) 2 and 3 only (d) 1, 2 and 3

    Ans.Ans.Ans.Ans.Ans. (b)(b)(b)(b)(b)

    In TDMA, different users access the transponder in different time slots, not parallely.

    77.77.77.77.77. In an optical fibre, the pulse dispersion effect is minimized by

    1. Using a high frequency light source

    2. Using plastic cladding

    3. Minimizing the core diameter

    Which of the above statements is/are correct?

    (a) 1 only (b) 2 only(c) 3 only (d) 1, 2 and 3

    Ans.Ans.Ans.Ans.Ans. (c)(c)(c)(c)(c)

    78.78.78.78.78. Consider the following statements:

    As compared to short-circuited stubs, open-circuited stubs are not preferred because

    the latter

    1. Are of different characteristic impedance

    2. Have a tendency to radiate Which of the above statements is/are correct?

    (a) 1 only (b) 2 only(c) Both 1 and 2 (d) Neither 1 nor 2

    Ans.Ans.Ans.Ans.Ans. (b)(b)(b)(b)(b)

    79.79.79.79.79. Consider the following statements for multiple access system in a satellite earth station:

    1. Access to same repeater sub-systems and same RF channel is possible.

    2. Frequency division multiple access is used.

    3. Several carriers are not amplified by same TWT.

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    ESE-2016 : Electronics Engg.Solutions of Objective Paper-II | Set-A

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    Which of the above statements are correct?

    (a) 2 and 3 only (b) 1 and 3 only

    (c) 1 and 2 only (d) 1, 2 and 3

    Ans.Ans.Ans.Ans.Ans. (d)(d)(d)(d)(d)

    80.80.80.80.80. The Bode plot of the open-loop transfer function of a system is described as follows:

    Slope 40 dB/decade < 0.1 rad/s

    Slope 20 dB/decade 0.1 < < 10 rad/s

    Slope 0 > 10 rad/s

    The system described will have

    (a) 1 pole and 2 zeros (b) 2 poles and 2 zeros

    (c) 2 poles and 1 zero (d) 1 pole and 1 zero

    Ans.Ans.Ans.Ans.Ans. (b)(b)(b)(b)(b)

    As per given details Bode plot is

    40

    200

    Initial slope indicates 2 poles at origin.

    Final slope indicates

    P= Z P= Z = 2

    81.81.81.81.81. From the Nichols chart, one can determine the following quantities pertaining to a closed-

    loop system:

    (a) Magnitude, bandwidth and phase (b) Bandwidth and phase only

    (c) Magnitude and phase only (d) Bandwidth only

    Ans.Ans.Ans.Ans.Ans. (a)(a)(a)(a)(a)

    Nichols chart provides complete frequency response of a system.

    82.82.82.82.82. In position control systems, the Tacho-generator feedback is used to

    (a) Increase the effective damping in the system

    (b) Decrease the effective damping in the system

    (c) Decrease the steady state error

    (d) Increase the steady state error

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    ESE-2016 : Electronics Engg.Solutions of Objective Paper-II | Set-A

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    Ans.Ans.Ans.Ans.Ans. (a)(a)(a)(a)(a)

    Tacho generator (or) derivative controller mainly used to increase system damping

    new =old+

    KD

    = tachometer constant

    83.83.83.83.83. Consider the following statements :

    1. The pin diode consists of two narrow, but highly doped, semiconductor regions

    separated by a thicker, lightly doped material called the intrinsic region.

    2. Silicon is used most often for its power-handling capability and because it provides

    a highly resistive intrinsic region.

    3. The pin diode acts as an ordinary diode at frequencies above 100 MHz.

    Which of the above statements are correct?

    (a) 1 and 2 only (b) 1 and 3 only

    (c) 2 and 3 only (d) 1, 2 and 3

    Ans.Ans.Ans.Ans.Ans. (d)(d)(d)(d)(d)

    84.84.84.84.84. Consider the following statements :

    1. Additional cavities serve to velocity-modulate the electron beam and produce an

    increase in the energy available at the output.

    2. The addition of intermediate cavities between the input and output cavities of the

    basic klystron greatly improves the amplification, power output, and efficiency ofthe klystron.

    Which of the above statements is/are correct?

    (a) 1 only (b) 2 only

    (c) Both 1 and 2 (d) Neither 1 nor 2

    Ans.Ans.Ans.Ans.Ans. (c)(c)(c)(c)(c)

    85.85.85.85.85. In a waveguide with perfectly conducting flat wall, the angle of reflection is equal to the

    angle of

    (a) Diffraction (b) Incidence(c) Refraction (d) Penetration

    Ans.Ans.Ans.Ans.Ans. (b)(b)(b)(b)(b)

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    ESE-2016 : Electronics Engg.Solutions of Objective Paper-II | Set-A

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    86.86.86.86.86. In microwave system, waveguides have the advantages of

    (a) High power-handling capability and low loss

    (b) Thin dielectric substrate

    (c) Low power-handling and adequate stability

    (d) Positive phase shift

    Ans.Ans.Ans.Ans.Ans. (a)(a)(a)(a)(a)

    87.87.87.87.87. A straight dipole radiator fed in the centre will produce maximum radiation at

    1. The plane parallel to its axis

    2. The plane normal to its axis

    3. Extreme ends

    Which of the above statements is/are correct?

    (a) 1 only (b) 2 only

    (c) 1 and 3 only (d) 2 and 3 only

    Ans.Ans.Ans.Ans.Ans. (b)(b)(b)(b)(b)

    88.88.88.88.88. In communication systems, modulation is the process of

    (a) Improving frequency stability of transmitter

    (b) Combining signal and radio frequency waves

    (c) Generating constant frequency radio waves

    (d) Reducing distortion in RF waves

    Ans.Ans.Ans.Ans.Ans. (b)(b)(b)(b)(b)

    Modulation is the process of transmitting low frequency message signal by combining

    with high frequency carrier signal.

    89.89.89.89.89. Which one of the following statements is correct?

    (a) Sampling and quantization operate in amplitude domain.

    (b) Sampling and quantization operate in time domain.

    (c) Sampling operates in time domain and quantization operates in amplitude domain.

    (d) Sampling operates in amplitude domain and quantization operates in time domain.

    Ans.Ans.Ans.Ans.Ans. (c)(c)(c)(c)(c)

    Sampling is done in time domain and quantization is done is amplitude domain.

    90.90.90.90.90. What is the voltage attenuation provided by a 25 cm length of waveguide having a= 1 cm

    and b= 0.5 cm in which a 1 GHz signal is propagated in the dominant mode?

    (a) 721 dB (b) 681 dB

    (c) 521 dB (d) 481 dB

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