US CMS DOE/NSF Review: February 17-19, 1999 1
WBS 3.1.1 Muon TriggerOverview
WBS 3.1.1 WBS 3.1.1 MuonMuon Trigger TriggerOverviewOverview
Jay Hauser, UCLA
DOE/NSF ReviewFebruary 18, 1999
US CMS DOE/NSF Review: February 17-19, 1999 2
Outline (20’)Outline (20’)Outline (20’)
Overview of Muon Trigger Design• Relation between CSCs and trigger electronics• Front-end electronics (Endcap Muon)• Data collection and Track Finder (TRIDAS)
Overview of Technical Progress since 5/98• Test beam ‘98 results• Design and documentation
Changes Since Last ReviewResponses to 5/98 Committee ConcernsConclusions
US CMS DOE/NSF Review: February 17-19, 1999 3
Muon Detectors, Trigger LogicMuon Muon Detectors, Trigger LogicDetectors, Trigger Logic
Muon Detectors
Trigger Logic
US CMS DOE/NSF Review: February 17-19, 1999 4
Trigger Regions in ηTrigger Regions in Trigger Regions in ηη
5.68
m
6.66
m
7.24
m
8.49
5 m
9.75
m
10.6
3 m
10.8
3 m
6.45
m
10.8
6 m
10.9
1 m
14.5
3 m
14.5
6 m
14.9
6 m
4.905 m
1.811 m
HF/1
ME
/1/3
YE/1
ME
/3/2
ME
/4/2
ME
/2/2
ME
/2/1
ME
/3/1
ME
/4/1
ME
/1/1 HE/1
EB/1M
E/1
/2
HB/1
YE
/3
YE
/2
EE
/1
CB/0
SE/1
SB/1
CMS - PARA- 003 - 14/10/97 PP
η = 5.31
4.33
2 m
3.90
m
1.711 m1.9415 mη = 3.0
η = 2.4
η = 1.479
η = 1 η = 0.5η = 1.1
0.440 m
2.864 m2.700 m
3.800 m
7.380 m7.000 m
5.975 m
4.020 m
0.00 m
1.185 m1.290 m
0.00
0 m
2.93
5 m
2.950 m
MB/2/1
MB/2/2
MB/2/3
MB/2/4
YB/2/1
YB/2/2
YB/2/3
MB/1/1
MB/1/2
MB/1/3
MB/1/4
YB/1/1
YB/1/2
YB/1/3
MB/0/1
MB/0/2
MB/0/3
MB/0/4
YB/0/1
YB/0/2
YB/0/3
/pg/hr
CSC
DTOverlap
1.2 > η > 0.9
ME3 ME2 ME1
MB1
MB2
MB3
MB4
Separatetriggerregions
US CMS DOE/NSF Review: February 17-19, 1999 5
CSC Trigger PrimitivesCSC Trigger PrimitivesCSC Trigger Primitives
• Single BXtiming fromanode wires
P2 (large) chamber
Strips
Wires
Anode Wire Preamps, CF Discriminators
Cathode Preamps/ Precision DAQ
1
Strips
Layer
23456
Anode LCT cards
Hits
LCT (>=4)
Time (Xings)
123456
Early n/γhit
Xing (>=2)
Goal: 92% Bunch ID
efficiency
Cathode LCT cards Goal: ±0.1 strip
resolution
Trigger Comparator Networks
THRESH
L
R
Qn
Goal: 92% half-strip ID
efficiency
Trigger Motherboard
Goal: 99% efficiency for +-1 BX correlation
TRIG
LCT cards and Trigger Motherboard are in counting house (CAMAC)
• Phi (bend)position to1mm fromcathode strips
Focus of ‘98 prototypes:
US CMS DOE/NSF Review: February 17-19, 1999 6
Muon Track-FindingMuon Track-FindingMuon Track-FindingLink trigger primitives into tracksAssign P T, ϕ, and ηSend highest P T candidates to Global L1 trigger
θ
ϕ
US CMS DOE/NSF Review: February 17-19, 1999 7
CSC Track-FinderRequirements
CSC Track-FinderCSC Track-FinderRequirementsRequirements
High efficiencyTrigger Rate:
• Single muon rate < few kHz at L = 1034cm-2 s-1
Resolution:
• σPt / Pt ≤ 30% (Requires η information )
Selection:• ≤ 3 muons per 60° sector
Redundancy• Require only 2 stations out of 3 (or 4)
Minimal latency, pipelined, programmable
US CMS DOE/NSF Review: February 17-19, 1999 8
Trigger Regions in ϕTrigger Regions in Trigger Regions in ϕϕ
ME1/3
MB2/2
MB2/1Illustration ofoverlap region
US CMS DOE/NSF Review: February 17-19, 1999 9
60o Sector Block Diagram6060oo Sector Block Diagram Sector Block Diagram
Endcap Muon
TRIDAS
Individual CSCChambers
12 Sectors( 2 Endcaps)
US CMS DOE/NSF Review: February 17-19, 1999 10
CSC Muon Trigger SchemeCSC Muon Trigger SchemeCSC Muon Trigger SchemeStrip FE cards
Wire FE cards
Motherboard
TMB
Port Card
PC
Sector Receiver Sector Processor
OPTICAL
SR SP
CSC Track-Finder
CSC Muon Sorter
Global µ Trigger
DTRPC
FE
FE
Global L1
2µ / chamber 3µ / port card 3µ / sector
4µ
4µ
4µ 4µ
LCT
LCT
Strip LCT card
Wire LCT card
On chamber In chamber crate
In counting house
US CMS DOE/NSF Review: February 17-19, 1999 11
Physical Layout of CSCTrigger Electronics
Physical Layout of CSCPhysical Layout of CSCTrigger ElectronicsTrigger Electronics
Front-end A/D for Trigger:• Cathode cards have comparator ASICs• Anode cards have discriminators and BX
latch
Muon Stubs:• Raw bits go to 9U crates on iron disk
periphery• 6-layer muon stubs measured by LCT
cards• Anode/cathode matching, RPC
coincidence at Trigger Motherboards• Collection of data & optical links from
Port Cards
Muon Track Measurement:• Stubs go to 9U crates in counting house• Stubs received, formatted, aligned in
Sector Receivers• Tracks found in Sector Processors• Tracks selected by CSC Muon Sorter
End
cap
Muo
n S
yste
mT
riDA
ST
riDA
S S
yste
m S
yste
m
SRCSC
ME 1
SRCSC
ME2,3
DTIM
SPCSC
SPOVL
208
208
204
SRCSC
ME 1
SRCSC
ME2,3
DTIM
SPCSC
SPOVL
208
208
204
CCC
CPU
US CMS DOE/NSF Review: February 17-19, 1999 12
CSC Trigger PrimitivesCSC Trigger PrimitivesCSC Trigger Primitives
• Single BXtiming fromanode wires
P2 (large) chamber
Strips
Wires
Anode Wire Preamps, CF Discriminators
Cathode Preamps/ Precision DAQ
1
Strips
Layer
23456
Anode LCT cards
Hits
LCT (>=4)
Time (Xings)
123456
Early n/γhit
Xing (>=2)
Goal: 92% Bunch ID
efficiency
Cathode LCT cards Goal: ±0.1 strip
resolution
Trigger Comparator Networks
THRESH
L
R
Qn
Goal: 92% half-strip ID
efficiency
Trigger Motherboard
Goal: 99% efficiency for +-1 BX correlation
TRIG
LCT cards and Trigger Motherboard are in counting house (CAMAC)
• Phi (bend)position to1mm fromcathode strips
Focus of ‘98 prototypes:
US CMS DOE/NSF Review: February 17-19, 1999 13
98 Prototype Beam Test98 Prototype Beam Test98 Prototype Beam Test
Comparators
Anode/Cathode LCT
CSC Chamber
TriggerMotherboard
US CMS DOE/NSF Review: February 17-19, 1999 14
CSC Trigger Results fromCERN ‘98 Test Beam
CSC Trigger Results fromCSC Trigger Results fromCERN ‘98 Test BeamCERN ‘98 Test Beam
Cathodes for position:half-strip eff. 90% per layer0.1 strip/chamber position
resolution
Anodes for timing:bunch crossing efficiency 99%works at 7x max LHC rate
Cathode-anode timing:+-1 bunch xing 98% efficient
Prototypes meet the CMS design criteria in all aspects
Prototype electronics worked well(reliable, no pickup noise, etc.)
US CMS DOE/NSF Review: February 17-19, 1999 15
Endcap Muon SubsystemTrigger Component CountEndcap MuonEndcap Muon Subsystem SubsystemTrigger Component CountTrigger Component Count
Object No. DescriptionAnode Front-End 1476 Custom ASICs, custom size cardsCathode Front-End
1728 Custom ASICs, custom size cards
Anode LCT 360 9U cards: gate arraysCathode LCT 360 9U cards: gate arraysTriggerMotherboards
192 9U cards: gate arrays
SCSI cables to FE 3204 Indiv. Shielded twisted-pairFlat cables to FE 1476 34-conductorCrates 96 9U VIPA standardPower Supplies 96 High-power 5v and 3.3vFlat cablesbetween 9Umodules
34-conductor
US CMS DOE/NSF Review: February 17-19, 1999 16
TriDAS Component CountTriDASTriDAS Component Count Component Count
Object No. DescriptionMuon Port Card 60 9U cards: clock rcvr., clock
distribution, gate arrays, opticalxmitters
Optical fibers 360 E.g. Glink typeSector Receivers 24 9U cards: optical rcvrs., gate arraysSector Processors 24 9U card: gate arrays, memoriesClock&ControlCards
6 9U card: clock distribution, DAQinterface
Muon Sorter Card 1 9U card: gate arraysCrates 6 9U VIPA standardPower Supplies 6 High-power switchersCopper cables Twisted-flat
US CMS DOE/NSF Review: February 17-19, 1999 17
New Layout for CSCTrack-Finder Crate
New Layout for CSCNew Layout for CSCTrack-Finder CrateTrack-Finder Crate
SRCSC
ME 1
SRCSC
ME2,3
DTIM
SPCSC
SPOVL
208
208
204
SRCSC
ME 1
SRCSC
ME2,3
DTIM
SPCSC
SPOVL
208
208
204
CCC
CPU
• Two 60° sectors housed in one 9U VME crate withcustom backplane
• Each SR-CSC sends 6 CSC muon stubs × 34 bitsand 4 bits BXN = 208 bits
• Each DT-IM sends 8 DT muon stubs × 25 bitsand 4 bits BXN = 204 bits
US CMS DOE/NSF Review: February 17-19, 1999 18
Sector Receiver FunctionalitySector Receiver FunctionalitySector Receiver Functionality
• Receives 6 stubs via 12 optical links from 2 Port Cards (3 in ME1)
• Synchronizes the data
• Reformats the data
• LCT bit pattern → η, ϕ, Ψ• Communicates to Sector Processor via custom point-to-point
backplane
• Fans out signals to CSC overlap processors and sends ME1/3signals to DT Sector Processor
US CMS DOE/NSF Review: February 17-19, 1999 19
Sector Processor FunctionalitySector Processor FunctionalitySector Processor Functionality
Identify and measure muons from ~600 bits every 25ns (3 GB/s)
1. Perform all possible station-to-station extrapolations in parallel
Simultaneously search for roads in ϕϕ and ηη
2. Assemble 2-, 3-, 4-station tracks from 2-station extrapolations
3. Cancel redundant short tracks if track is 3 or 4 stations in length
4. Select the three best candidates
5. Calculate P T, ϕ, η and send to CSC muon sorter
US CMS DOE/NSF Review: February 17-19, 1999 20
Muon Sorter FunctionalityMuon Sorter FunctionalityMuon Sorter Functionality
• New processor added since lastreview
• The 3 highest rank muons from eachSector Processor are sent to the CSCmuon sorter , which selects the 4highest rank
• Total muon count:• 3 muons × 6 sectors × 2 endcaps × 2
regions = 72 muons for CSC and OVLregions
• Sent to Global L1 Muon Trigger forassociation with RPC and DT triggers
US CMS DOE/NSF Review: February 17-19, 1999 21
Muon Trigger ChangesSince 5/98
Muon Muon Trigger ChangesTrigger ChangesSince 5/98Since 5/98
• Cathode front-end• 4:1 data compression in cathode comparator
ASIC (submitted to foundry)• Comparator ASICs integrated with cathode
front-end board (board layout)
• Anode front-end• BX latching integrated with anode front-end
board (board layout)
• New CSC/RPC coincidence option• Trigger logic moved off of
chambers• VME 9U crates on iron disk periphery• Advantages: power, cooling, DAQ readout,
access, seamless trigger
• Track Finder refinements• Fully documented design, including
Endcap/Barrel interface
US CMS DOE/NSF Review: February 17-19, 1999 22
Highlight TRIDAS Changes:Highlight TRIDAS Changes:Highlight TRIDAS Changes:• Agreement on Barrel/Endcap boundary
• Barrel and Endcap Track Finders are fundamentallydifferent (2D versus 3D)
• Information will be sent both ways• The actual boundary (0.9-1.2) will be “hard” but
programmable
• Data distribution in Track Finder crates• CSC and Overlap processors in same crate• Saves 2 crates, 24 Sector Receivers, many cables, etc.
• Addition of ME1/1 split strips• Costs 12 additional Port Cards, more optical links
• Addition of CSC muon sorter• One additional card
• Addition of VME test stands - contingency used
US CMS DOE/NSF Review: February 17-19, 1999 23
Available ResourcesAvailable ResourcesAvailable Resources
Muon Port Card and Sorter Card (Rice):
• P. Padley – physicists
• M. Matveev, N. Adams – engineers / technicians
Sector Processor (Florida and PNPI):
• D. Acosta, S.M. Wang – physicists
• Florida electronics shop – engineers / technicians
• A.Atamanchuk, V.Golovtsov, B.Razmyslovich – PNPIengineers
• B.Scurlock, M.Watkins – students
Sector Receiver (UCLA)
• J.Hauser, C. Shankar – physicists
• J.K., Y. Shi – engineers
US CMS DOE/NSF Review: February 17-19, 1999 24
DocumentationDocumentationDocumentation
USCMS TriDAS project management• http://hep.physics.wisc.edu/wsmith/cms/trig_pm.html
Technical info• CMS muon trigger home page
• http://cmsdoc.cern.ch/ftp/afscms/TRIDAS/mutrig/html/• USCMS Endcap muon home page
• http://uscms.fnal.gov/uscms/subsystems/muon/muon.html• CSC muon trigger home page
• http://www-collider.physics.ucla.edu/cms/trigger/• CSC trigger complete bit list
• ftp://hepsun0.physics.ucla.edu/pub/cms/trigger/triggerbits.ps• Motherboard/Port Card home page
• http://bonner-ntserver.rice.edu/motherboard/• Sector Processor home page
• http://www.phys.ufl.edu/~acosta/cms/trigger.html