Dídac Gómez, Joan Mauricio, Diego Mateo, Francesc Moll
Variability mitigation techniques in nanometer
CMOS technologies
Research framework
ENIAC project MODERN (2009-2012) – 27 European institutions (Industry and Research) – 12M€ budget – ENIAC JU 120003 – MICINN PLE 2009-0024 (Spain institutions)
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Outline
Introduction Variability in nanometer CMOS Adaptive digital circuits Thermal monitoring and control of RF blocks Conclusions
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Nobody’s perfect…
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The good news chart
Frank Schwierz - Nature Nanotechnology 5, 487–496 (2010)
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Introduction: Sources of Variability
Proximity Spatial Temporal
Reversible Irreversible
Variation of chip mean
Parameter means (LG, VT, tox)
Environmental operating
temperature
Activity factor
Hot-electron effect
NBTI shift
Within-chip variation
Pattern-density
Layout-induced Variations
On-die hot spots
Hot-spot-enhanced NBTI
Device-to-device variation
Atomistic dopant Variation
Line-edge roughness
Parameter std. dev.
SOI body history
Self heating
rVT-NBTI
(NBTI-induced
VT distribution)
Source: Bernstein IBM R&D journal CEI UPM 5th Annual Meeting,
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M Bohr (Intel)
Technology evolution driven by variability
CEI UPM 5th Annual Meeting, 23rd March 2012
Lithography gap
45nm 32nm
193nm
20nm
Source: Mentor graphics
Since 0.35um technology the wavelength is larger than the critical dimension. Since 90nm node the wave length is stagnating.
CEI UPM 5th Annual Meeting, 23rd March 2012
Random dopant Line Edge Roughness (LER)
A. Asenov et al., “Simulation of Intrinsic Parameter Fluctuations in Decananometer and Nanometer-Scale MOSFETs”, TED, 2003.
Random fluctuations
Stochastic variations of physical parameters
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Effect of PV
Source: Keith Bowman, Intel CEI UPM 5th Annual Meeting,
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Adaptive circuits
Variations are unavoidable or very expensive to minimize
Adaptive circuits try to correct deviations at runtime – Given a sensed magnitude of a circuit (delay or power), it
can be adjusted to its nominal value. – Digital circuits: Body Biasing (BB) and Voltage Scaling (VS)
can be used in order to control variability. – AMS&RF: voltage bias control.
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Challenges for digital
Correlation between different magnitude variation – Reducing one may increase the other
Objective: – Study which sensing strategy gives the best overall
variability reduction. – Collateral effects between delay, leakage and dynamic
power variability reduction are studied.
CEI UPM 5th Annual Meeting, 23rd March 2012
Variability Analysis
Simultaneous Variation of Device Parameters: – 250 Monte Carlo simulations are done using an 8-Bit Ripple Carry
Adder as testbench (65nm) :
Value ±3σ
L ±20%
Tox ±10%
Wp, Wn
±5%, ±8.5%
Nsub ±10%
Temp 80ºC ±50%
Vdd ±10%
250 samples of static power, dynamic power
and delay are obtained.
Delay measure Dynamic power measure Leakage power measure
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Variability Analysis
Corr. Coef. = 0.70 Corr. Coef. = 0.62
Corr. Coef. = 0.49
8-Bit Ripple-Carry Adder CDFs
Huge variability. 25% of samples with > 2x leakage.
Normal distribution. Samples ranged between 0.7x and 1.3x
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Effect of Adaptive techniques (VS/BB) on
performance parameters
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Variability reduction with different sensors
Four sensing strategies are proposed: – Single sensors:
Delay. Static Power (leakage current). Dynamic Power.
– Dual sensor: Delay + Dynamic Power.
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Variability reduction with different sensors
Algorithm:
Measure
Sample
Estimate new VS , BB
BB , VS changed? No
VS = 1.2 VBB = 0 V
Yes
END
Apply VS , BB
Leakage Power Dyn. Power Delay Delay + Dyn. P.
Parameter Nominal Min. Max.
BB 0 V -0.9 V 0.5 V
VS 1.2 V 0.8 V 1.5 V CEI UPM 5th Annual Meeting,
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Variability reduction with different sensors
CEI UPM 5th Annual Meeting, 23rd March 2012
8-Bit Ripple-Carry Adder CDFs
No Sensor Leakage Dynamic Delay Dual
Delay variability has the highest correlation with leakage (62%) and dynamic power (70%). Using delay sensors, the overall variability is reduced.
Thermal monitoring for AMS&RF
Thermal testing overview
Temperature is a low pass filtered version of electrical magnitudes. Joule effect behaves as an electrical mixer, downconverting information to DC or low frequencies.
Temperature couples through the common substrate-->non-invasive
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Dynamic thermal testing
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Requires single or multitone excitation. Exploits mixing properties of Joule effect
Static thermal testing
Exploits correlation between transistor transconductance (DC) and figures of merit. It doesn’t need signal excitation.
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Thermal feedback to correct deviations
• Exploits the capability of thermal measurements to Embed a CUT inside a negative feedback loop. •In this way, circuit variations can be compensated with temperature measurements.
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Conclusions
In digital circuits, define proper adaptive strategy – Type of sensors – Knob (VS, BB) control algorithm – Granularity (core, IP block…)
In RF, thermal is a good option – Hi freq magnitudes downconverted to measurable
temperature – Natural analog control to adaptation
Experimental work in progress – “digital” (VCDL) circuits in 40nm – RF in 65nm
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Papers
J. Mauricio, F. Moll, J. Altet, “Monitor strategies for variability reduction considering correlation between power and timing variability,” System on Chip Conference (SOCC), Taipei, September 2012.
J. Altet, D. Gómez, C. Dufis, J.L. González, D. Mateo, X. Aragonés, F. Moll, A. Rubio “On Evaluating Temperature as Observable for CMOS Technology Variability”, First European Workshops on CMOS Variability (VARI2010), 26-27 May,Montpellier (France).
M. Onabajo, D. Gómez, E. Aldrete-Vidrio, J. Altet, D. Mateo, and J. Silva-Martinez, “Survey of robustness enhancement techniques for wireless systems-on-a-chip and study of temperature as observable for process variations,” Springer J. Electronic Testing: Theory and Applications, vol. 27, no .3,pp.225-240,June 2011
D.Gomez, C. Dufis, J.Altet, D.Mateo, J. L. Gonzalez, “Electro-thermal coupling analysis methodology for RF circuits”,accepted for publication in Elsevier Microelectronics Journal, doi:10.1016/j.mejo.2011.04.011
D.Gómez,J.Altet,D.Mateo, “On the use of static temperature measurements as process variation observable”, accepted for publication in Springer J. Electronic Testing: Theory and Applications
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Patents
Didac Gómez Salinas,Diego Mateo Peña,Josep Altet Sanahujes, “PROCEDIMIENTO PARA LA ESTIMACIÓN DE CARACTERÍSTICAS ELÉCTRICAS DE UN CIRCUITO ANALÓGICO MEDIANTE LA MEDICIÓN EN CONTINUA DE TEMPERATURA”, Spanish patent pending P201132099
Diego Mateo Peña ,Josep Altet Sanahujes,Didac Gómez Salinas, “CIRCUITO ELECTRÓNICO CON MAGNITUD ELÉCTRICA DE SALIDA DEPENDIENTE DE LA DIFERENCIA DE TENSIÓN DE DOS NODOS DE ENTRADA Y DE LA DIFERENCIA DE TEMPERATURA DE DOS DE SUS DISPOSITIVOS”, Spanish patent pending P201230276
Diego Mateo Peña ,Josep Altet Sanahujes,Didac Gómez Salinas, “PROCEDIMIENTO PARA LA MEDICIÓN DE LA EFICIENCIA DE AMPLIFICADORES DE POTENCIA INTEGRADOS LINEALES CLASE A UTILIZANDO MEDICIONES DE TEMPERATURA EN CONTINUA”, Spanish patent pending P201230234
CEI UPM 5th Annual Meeting, 23rd March 2012
CEI UPM 5th Annual Meeting, 23rd March 2012
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