Ultra Low Power Design Ultra Low Power Design ——The Road to Disappearing ElectronicsThe Road to Disappearing Electronics
SasimiSasimi Workshop, Kanazawa, JapanWorkshop, Kanazawa, Japan–– October 18, 2004October 18, 2004
Jan M. Rabaeyand the PicoRadio GroupBerkeley Wireless Research CenterDepartment of EECS, University of California, Berkeleyhttp://bwrc.eecs.berkeley.edu
Jan M. RabaeyJan M. Rabaeyand the PicoRadio Groupand the PicoRadio GroupBerkeley Wireless Research CenterDepartment of EECS, University of California, Berkeleyhttp://bwrc.eecs.berkeley.edu
Year
log
(peo
ple
per c
ompu
ter)
Meaning in the Device
Meaning in the Connection
Meaning in the Collection
BellBell’’s Law: A New Computer Class Every 10 Yearss Law: A New Computer Class Every 10 Years
Courtesy: R. Newton
1940’s 2000’s
Disappearing Electronics Disappearing Electronics --The The ““Ambient IntelligenceAmbient Intelligence”” ConceptConcept
• An environment where technology is embedded, hidden in the background
• An environment that is sensitive, adaptive, and responsive to the presence of people and objects
• An environment that augments activities through smart non-explicit assistance
• An environment that preserves security, privacy and trustworthiness while utilizing information when needed and appropriate
Fred Boekhorst, Philips, ISSCC02
Enabled by Technology AdvancementsEnabled by Technology Advancements
Moore’s law and size
Moore’s law and cost
SOC/SIP enablingtrue system integration
Ubiquitous wireless as the glue
Creating a whole new world of applicationsCreating a whole new world of applicationsFrom MonitoringFrom MonitoringFrom Monitoring To AutomationTo AutomationTo Automation
How to Make Electronics Truly Disappear?How to Make Electronics Truly Disappear?
From 10’s of cm3 and 10’s to 100’s of mW
To 10’s of mm3 and 10’s of µW
Meso-scale low-cost wireless transceivers for ubiquitous wireless data acquisition that• are fully integrated
– Size smaller than 1 cm3
• are dirt cheap (“the Dutch treat”) – At or below 1$
• minimize power/energy dissipation– Limiting power dissipation to 100 µW
enables energy scavenging
• and form self-configuring, robust, ad-hoc networks containing 100’s to 1000’s of nodes
Meso-scale low-cost wireless transceivers for ubiquitous wireless data acquisition that• are fully integrated
– Size smaller than 1 cm3
• are dirt cheap (“the Dutch treat”) – At or below 1$
• minimize power/energy dissipation– Limiting power dissipation to 100 µW
enables energy scavenging
• and form self-configuring, robust, ad-hoc networks containing 100’s to 1000’s of nodes
The PicoRadio ProjectThe PicoRadio Project
What can one do with 1 cmWhat can one do with 1 cm33? ? Reference case: the human brainReference case: the human brain
Pavg(brain) = 20 W (20% of the total dissipation, 2% of the weight),
Power density: ~15 mW/cm3
Nerve cells only 4% of brain volume Nerve cells only 4% of brain volume Average neuron density: 70 million/cmAverage neuron density: 70 million/cm33
What can one do with 1 cmWhat can one do with 1 cm33? ? Perform computations Perform computations ……
• 300 million 4 input NAND gates (90 nm)
• 7 million “Xilinx gates” (90 nm)
• Assuming 500 MHz clock frequency, 1V Vdd and fanout of 4 and 10% activity:
15 Peta gate-ops/sec @ 45 W
• Reducing supply voltage to 0.2V and clock rate to 10 MHz: 300 Giga gate-ops @ 40 mW
What can one do with 1 cmWhat can one do with 1 cm33??Energy StorageEnergy Storage
3.2100Ultra-capacitor
341080Secondary battery
902880Primary battery
1103500Micro Fuel cell
µW/cm3/yearJ/cm3
What can one do with 1 cmWhat can one do with 1 cm33??Energy GenerationEnergy Generation
40Temperature
17Pressure Var.
10Solar (inside)
200Vibration
330Human power
380Air flow
15,000Solar (outside)
µW/cm3
Towards a subTowards a sub--100 100 µµW Integrated NodeW Integrated Node
Baseband(mixed-signal)
RF+ Antenna
ClockGeneration
DigitalProcessor(s)
PowerSupply
NetworkSensors
Some Overall GuidelinesSome Overall Guidelines• Consider ALL components• Keep it simple!• Minimize the supply voltage and the ambient currents as much as possible• Aggressive use of new technologies (RF-MEMS, integrated passives, …)• Manufacturability is key
Towards a subTowards a sub--100 100 µµW Integrated NodeW Integrated Node
Baseband(mixed-signal)
RF+ Antenna
ClockGeneration
DigitalProcessor(s)
PowerSupply
NetworkSensors
FBAR
• Simplest possible architecture• Minimize on-current by aggressive usage of passives• Minimize supply voltage• Turned off most of the time / fast turn-on
LowLow--Power RF: Back to The FuturePower RF: Back to The Future(Courtesy of Brian Otis)(Courtesy of Brian Otis)
D. Yee, UCB
© 2000 - Direct Conversionfc= 2GHz>10000 active devicesno off-chip components
© 1949 - superregenerativefc= 500MHz2 active deviceshigh quality off-chip passives - hand tuning
The Return of SuperThe Return of Super--regenerativeregenerative• Fully integrated receiver front-end• Minimizes use of active components – exploits
new technologies such as RF-MEMS• Uses simple non-linear modulation scheme (OOK)• Down-conversion through non-linearity (diode)
1500µm
1200
µm
OOK modulated(80 dbm signal)
“1”
“0”
Operates down to 0.9V!400 µA when active
FBAR:Thin-Film Bulk Acoustic Resonator
Courtesy: Brian Otis
Ref Osc Power Osc
BasebandData
Power Control /Frequency Calibration
RadiatedPower
EnergyEnergy--efficient Transmittersefficient Transmitters
7-bits capacitive array
Core Devices
LC Power Oscillator to deliver power efficiently and reduce driver power (self-driven)• Concurrent antenna/power oscillator design• Power control for optimal radiated power • Frequency calibration to minimize locking power / FBAR Reference Oscillator
Injection-locked transmitter
TX at 2 mW or less(when on)
Courtesy: Yuen-Hui Chee
Moving forward:Moving forward:Realizing even lowerRealizing even lower--power receivers power receivers One option: sub-threshold RF oscillator using integrated LCs
Challenge: How to deal with process variations?
Courtesy: Nate Pletcher
Measured performance @ Vdd=0.5V and Idd=400µA:fosc = 1.4 GHz; Vswing = 125 mV
2.5 ns start-up
FBAR
oscPD LPF ADC ...
FBAR
oscPD LPF ADC ...
Answer: Use on-chip calibration!
Towards a subTowards a sub--100 100 µµW Integrated NodeW Integrated Node
Baseband(mixed-signal)
RF+ Antenna
ClockGeneration
DigitalProcessor(s)
PowerSupply
NetworkSensors
• Trade-off between digital and analog• Design exploration essential
• Minimize supply voltages < 500 mV• Most analog sub-threshold • Beware of process variations
Where analog meets digitalWhere analog meets digitalMostly Digital?
AnalogFilter
ADC
ADC
Synch Detect
DigitalLogic
AnalogIntegrator
S Slicer
Synch Detect
DigitalLogic
23
217
200 (integrators, comparators)
17 (control)
Mostly Analog
174Total Power (uW)
17
125 (8-bit ADC @ 500KHz)
49 (correlate, control)
Mostly Digital
Analog Power (uW)
Header Length (symbs)
Digital Power (uW)
Versus Mostly Analog?
Courtesy Josie Ammer, Yanmei Li, and ASV
The power of exploration…
Towards a subTowards a sub--100 100 µµW Integrated NodeW Integrated Node
Baseband(mixed-signal)
RF+ Antenna
ClockGeneration
DigitalProcessor(s)
PowerSupply
NetworkSensors
64Kmemory DW8051
µc
BaseBand
SerialInterface
GPIOInterface
LocationingEngine
Neighbor List
SystemSupervisor
DLL
NetworkQueues
VoltageConv
• Simplest possible processor• Dedicated accelerators when needed• Aggressive power management• Minimizing supply voltage
Courtesy: Mike Sheets
Call a PlumberCall a Plumber……This Thing Leaks!This Thing Leaks!Block Area (um2) Logic MemoryLocationing 337990 39.9DW8051 63235 8.2 2880.0Interface 6098 0.8Neighborlist 21282 2.5 13.5Serial 2554 0.4NetQ 6296 0.7 108.0DLL 126846 17.4 13.5Supervisor 51094 6.4
Total 76.3 3015.0
Est. leakage @1V (uW)
64KB SRAM for SW code and data
30X the target power…just in leakage!!
Hey buddy, turn down
the voltage!
7X
05
1015202530
0 0.2 0.4 0.6 0.8 1Vdd (V)
Ele
akag
e
Leakage vs. Supply Voltage2
ddleakage VE ∝
(or turn it off altogether)
The SRAM Data Retention Voltage (DRV) The SRAM Data Retention Voltage (DRV)
Courtesy: Huifang Qin
0 0.1 0.2 0.3 0.40
0.1
0.2
0.3
0.4
V1 (V)
V 2(V
)
VTC1VTC2
VDD=0.18V
VDD=0.4V
VTC of SRAM cell inverters
0 0.2 0.4 0.6 0.8 10
10
20
30
40
50
60
Supply Voltage (V)
4KB
SR
AM
Lea
kage
Cur
rent
( µA
)
MeasuredDRV range DRV Spatial Distribution
(256*128 Cells)
Lowering the DRV:Sizing and/or correction
Introducing Introducing ““Power DomainsPower Domains””Similar to “clock domains”, but extended to includepower-down (really!) and local supply and threshold voltage management.
Power source
Active Power NetworkActive Power Network
Load Load Load
Power source
Active Power NetworkActive Power Network
Load Load Load
Who is in charge?Who is in charge?64K
memory DW8051µc
BaseBand
SerialInterface
GPIOInterface
LocationingEngine
Neighbor List
DLL
NetworkQueues
VoltageConv
SystemSupervisor
Chip Supervisor (or Chip O/S)• Initiates power up/down• Maintains global state and perspective• Maintains system timers• Alerts blocks of important events
Moving Forward? Moving Forward? UltraUltra--Low Voltage Digital DesignLow Voltage Digital Design
•• Aggressive voltage scalingAggressive voltage scaling the premier way of reducing energy dissipation (active and leakthe premier way of reducing energy dissipation (active and leakage!)age!)•• Design at Design at 250 mV250 mV or below is definitely doableor below is definitely doable•• Sacrifice in performance mitigated by careful threshold manipulaSacrifice in performance mitigated by careful threshold manipulation: tion: ““Leakage is good for you!Leakage is good for you!””
Challenges:• Leakage in non-active mode: power management• Wide variation in gate performance due to process variations
012345x 10-7
0
10
20
0.30.50.7-0.1
0.10.3VDD [V] V TH [V
]0.30.50.7
-0.10.1
0.3VDD [V] V TH [V]
Pow
er [W
/gat
e]
Del
ay [p
s]0.30.50.7
-0.10.1
0.3VDD [V] V TH [V]
Equi-delay
50nm node, FO3 INV
Courtesy: T. Sakurai,T. Kuroda
The Potential of Adaptive TuningThe Potential of Adaptive Tuning
5
10
15
20
25
30
35
40
45
50
1.0E+03 1.0E+04 1.0E+05 1.0E+06 1.0E+07
Path Delay (ps)
Esw
itchi
ng(fJ
) Adaptive TuningWorst Case, w/o Vth tuningWorst Case, w/ Vth tuningNominal, w/o Vth tuningNominal, w/ Vth tuning
Energy-performance trade-off
ModuleTest
Module
Vbb
Test inputsand responses
Tclock
Vdd
Explore circuit and Explore circuit and architecture techniques that architecture techniques that deal with performance deal with performance variations (e.g., GALS), are variations (e.g., GALS), are (somewhat) resilient to (somewhat) resilient to errors, and dynamically errors, and dynamically adjust leakage based on adjust leakage based on activity!activity!
Adaptive Body BiasingAdaptive Body BiasingSource: P. Gelsinger (DAC04)
Towards a subTowards a sub--100 100 µµW Integrated NodeW Integrated Node
Baseband(mixed-signal)
RF+ Antenna
ClockGeneration
DigitalProcessor(s)
PowerSupply
NetworkSensors
Energy generation and conversion network
Energy Source 1(solar)
Energy Source 2(vibration, …)
ConversionNetwork 1
ConversionNetwork 2
Reservoir 1(capacitor)
Reservoir 2(microbattery)
Anchor Spring flexure Comb fingers
Electrostatic MEMS vibration converters Microbattery
Example: OnExample: On--Chip Voltage Down ConverterChip Voltage Down ConverterSwitchedSwitched--capacitor regulator providescapacitor regulator provideshigh efficiency (> 80%) at low current levelshigh efficiency (> 80%) at low current levels
CLK
CLK
CLK
CLK
CLK
CLK
CLK
CLK
CLK_
CLK
CLK
CLK_
CLK
Clock frequency adapted to current loadClock frequency adapted to current loadCourtesy: Huifang Qin
Towards a subTowards a sub--100 100 µµW Integrated NodeW Integrated Node
Baseband(mixed-signal)
RF+ Antenna
ClockGeneration
DigitalProcessor(s)
PowerSupply
NetworkSensors
1 µW oscillatorWineglass MEMS resonator
MEMS resonator die flips directly onto CMOS for a compact, integrated clock
module.
The main trap on the road to ultraThe main trap on the road to ultra--low powerlow powerReliability!
•• NarrowNarrow--band radios increase sensitivity band radios increase sensitivity to fast fadingto fast fading
•• PowerPower--cycling deteriorates connectivitycycling deteriorates connectivity•• LowLow--voltage design opens the door for voltage design opens the door for
errors (timing, soft)errors (timing, soft)
But, unreliability is intrinsic to the disappearing electronics concept.
Nodes may appear at will, may move, may fail and (temporarily) run our of energy
The wrong answer: overThe wrong answer: over--designdesign
The right answer: use systemThe right answer: use system--level solutionslevel solutions
Example: Simple radioExample: Simple radio’’s tend to be bad radios tend to be bad radio’’ssSmall Change in Path Loss Has Dramatic Impact on Transmission Quality– Channel is either “good”
or “bad”
-36 -35 -34 -33 -32 -31 -3010-7
10-6
10-5
10-4
10-3
10-2
10-1
100
effective path loss
BE
R
20 kbps, +1.5dBm40 kbps, +3dBm80 kbps, +4.5dBm
6 db
Factor 105 inerror rate
-36 -35 -34 -33 -32 -31 -3010-7
10-6
10-5
10-4
10-3
10-2
10-1
100
effective path loss
BE
R
20 kbps, +1.5dBm40 kbps, +3dBm80 kbps, +4.5dBm
6 db
Factor 105 inerror rate
SolutionSolution: use spatial : use spatial diversity inherently present diversity inherently present in ambient intelligence in ambient intelligence networksnetworks
0.00
10.00
20.00
30.00
40.00
50.00
60.00
70.00
80.00
90.00
100.00
0 10 20 30 40 50 60 70 80 90 100 110 120 130 140 150 160 170 180 190 200 210
distance [cm]
Bro
adca
st s
ucce
ss ra
te [%
]
Deepfade due tomultipath
2 nodes
3 nodes
Data gathered usingPicoNodeI testbed
A SystemA System--Level Solution: Opportunistic Level Solution: Opportunistic RoutingRouting
One-hop neighbors
Forwarding region
• Network specifies forwarding region• Media-acces “randomly” chooses next-hop based on availability and connectivity • Improves reliability and energy efficiency
Probability of packet successE
nerg
y pe
r nod
e
Looking forward:Looking forward:Statistical CommunicationStatistical Communication
How to design “NanoNets” — networks of wireless communication nodes that are ~ 1 mm3, consume ~ 1 µW, and cost 1 cent?
• Operate them at very low voltages (< 250 mV)• Extensive use of passives• Absolutely no tuning!• Use statistical networking and density to provide reliability
Integrated GHzLC resonator(N. Pletcher, UCB)
Integrated Finfet NEMS resonator(King, Howe, UCB)
A Statistical Communication ParadigmA Statistical Communication Paradigm““Strength in NumbersStrength in Numbers””
1 2 3 … H
DestinationSource
“Random frequency multi-hopping”• Information packet traverses from source to destination in a multi-hop fashion.• Transmitter broadcasts signal to neighboring block on randomly selected channel.• Receivers randomly select channel to listen to.
Some Amazing Properties• Reliable communication over this unreliable platform indeed possible.• Even more, reliability improves EXPONENTIALLYwith a linear increase in network density.
Some Amazing Properties• Reliable communication over this unreliable platform indeed possible.• Even more, reliability improves EXPONENTIALLYwith a linear increase in network density.
Forwarding node
Summary and PerspectivesSummary and Perspectives• Scaling of technology leads to ever smaller
communication and computation nodes• True smart dust can only be met by ultra low-
power design of all components.• But …cutting on power and energy tends to
lead to unreliability.• An appealing solution: exploit the power of
the numbers, and avoid brittleness by embracing randomness
• An opportunity for bold innovation → a first glimpse at the world of nano …
The support of CEC, DARPA, GSRC Marco, and the BWRC sponsoring companies is greatly appreciated.
"Research is what I'm doing when I don't know what I'm doing."– W. Von Braun